From 2375879b3209effd1b04143ef02eb5bdcf49bc93 Mon Sep 17 00:00:00 2001 From: Akash Levy Date: Tue, 17 Dec 2024 04:19:16 -0800 Subject: [PATCH] Update peepopt_muldiv_c.pmg --- passes/pmgen/peepopt_muldiv_c.pmg | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/passes/pmgen/peepopt_muldiv_c.pmg b/passes/pmgen/peepopt_muldiv_c.pmg index 411ff3122ff..94b260d2842 100644 --- a/passes/pmgen/peepopt_muldiv_c.pmg +++ b/passes/pmgen/peepopt_muldiv_c.pmg @@ -61,6 +61,13 @@ code if (b_const_int_shifted % c_const_int != 0) reject; + // Check that every single output bit of the multiplier is connected consecutively to the div operator (offset accounted for) + for (int i = 0; i < mul_y.size(); i++) { + if (sigmap(mul_y[i]) != sigmap(div_a[i + offset])) { + reject; + } + } + // Rewire to only keep multiplier mul->setPort(\B, Const(b_const_int_shifted / c_const_int, b_const_width)); mul->setPort(\Y, div_y);