Merge pull request #4163 from QuantamHD/fix_write_verilog

write_verilog: Making sure BUF cells are converted to expressions.
YosysHQ · Jan 30, 2024 · 3537976 · 3537976
2 parents b572e1a + 3076875
commit 3537976
Showing 1 changed file with 9 additions and 0 deletions.
diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc
@@ -1053,6 +1053,15 @@ bool dump_cell_expr(std::ostream &f, std::string indent, RTLIL::Cell *cell)
 		f << stringf(";\n");
 		return true;
 	}
+
+	if (cell->type == ID($_BUF_)) {
+		f << stringf("%s" "assign ", indent.c_str());
+		dump_sigspec(f, cell->getPort(ID::Y));
+		f << stringf(" = ");
+		dump_cell_expr_port(f, cell, "A", false);
+		f << stringf(";\n");
+		return true;
+	}
 
 	if (cell->type.in(ID($_AND_), ID($_NAND_), ID($_OR_), ID($_NOR_), ID($_XOR_), ID($_XNOR_), ID($_ANDNOT_), ID($_ORNOT_))) {
 		f << stringf("%s" "assign ", indent.c_str());