opt_demorgan: skip zero width cells

YosysHQ · Sep 24, 2024 · 589d13b · 589d13b
1 parent 8e1e2b9
commit 589d13b
Showing 1 changed file with 7 additions and 0 deletions.
diff --git a/passes/opt/opt_demorgan.cc b/passes/opt/opt_demorgan.cc
@@ -39,6 +39,10 @@ void demorgan_worker(
 		return;
 
 	auto insig = sigmap(cell->getPort(ID::A));
+
+	if (GetSize(insig) < 1)
+		return;
+
 	log("Inspecting %s cell %s (%d inputs)\n", log_id(cell->type), log_id(cell->name), GetSize(insig));
 	int num_inverted = 0;
 	for(int i=0; i<GetSize(insig); i++)
@@ -106,6 +110,9 @@ void demorgan_worker(
 			insig[i] = srcinv->getPort(ID::A);
 	}
 
+
+	log("aaa");
+
 	//Cosmetic fixup: If our input is just a scrambled version of one bus, rearrange it
 	//Reductions are all commutative, so there's no point in having them in a weird order
 	bool same_signal = true;