diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index a809af21a75..dff9c777b84 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -351,7 +351,7 @@ RTLIL::SigBit VerificImporter::netToSigBit(Verific::Net *net) {
 	else if (net && net->IsX())
 		return RTLIL::State::Sx;
 	else if (net)
-			return net_map_at(net);
+		return net_map_at(net);
 	else
 		return RTLIL::State::Sz;
 }