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Another tool, SVDConv, was able to successfully generate both so I believe it's an edge case that regz was unable to handle here.
UPDATE:
I have also discovered that it failed to generate:
All the Interrupt Number Definitions
A large number of registers inside of the ARM GIC-400 Generic Interrupt Controller Distributor (GICD)
In this case a huge 3316 byte reserved block is generated, skipping from GICD_IIDR directly to GICD_PPISR. Everything in this range is either reserved or a subtype of related register. I'd expect for these subtypes to be correctly generated.
I'm sure there are others I missed, I will update as I find more
Commit Tested On: cca83d5
OS: Windows 10
Version: Zig 0.13.0
The text was updated successfully, but these errors were encountered:
I had some time and made quick test using that file. I checked only UART1 and found line that is causing issue because of which entrire UART1 section is ignored:
When I remove this line I am able to get UART1 in output zig file. I think same line is causing problems for other missing sections or maybe all of them as <enumeratedValues derivedFrom ... is used quite extensively in that file.
When generating a Zig header from the SVD found here: https://github.com/adafruit/broadcom-peripherals/blob/main-build/svd/gen/bcm2711_lpa.svd I noticed that it lacks the
GPIO
andUART1
types.Another tool, SVDConv, was able to successfully generate both so I believe it's an edge case that
regz
was unable to handle here.UPDATE:
I have also discovered that it failed to generate:
GICD_IIDR
directly toGICD_PPISR
. Everything in this range is either reserved or a subtype of related register. I'd expect for these subtypes to be correctly generated.Commit Tested On: cca83d5
OS: Windows 10
Version: Zig 0.13.0
The text was updated successfully, but these errors were encountered: