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Regz Fails To Generate Register Types #314

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Bud-ro opened this issue Dec 11, 2024 · 1 comment
Open

Regz Fails To Generate Register Types #314

Bud-ro opened this issue Dec 11, 2024 · 1 comment

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@Bud-ro
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Bud-ro commented Dec 11, 2024

When generating a Zig header from the SVD found here: https://github.com/adafruit/broadcom-peripherals/blob/main-build/svd/gen/bcm2711_lpa.svd I noticed that it lacks the GPIO and UART1 types.

Another tool, SVDConv, was able to successfully generate both so I believe it's an edge case that regz was unable to handle here.

UPDATE:
I have also discovered that it failed to generate:

  • All the Interrupt Number Definitions
  • A large number of registers inside of the ARM GIC-400 Generic Interrupt Controller Distributor (GICD)
    • In this case a huge 3316 byte reserved block is generated, skipping from GICD_IIDR directly to GICD_PPISR. Everything in this range is either reserved or a subtype of related register. I'd expect for these subtypes to be correctly generated.
  • I'm sure there are others I missed, I will update as I find more

Commit Tested On: cca83d5
OS: Windows 10
Version: Zig 0.13.0

@arkadiuszwojcik
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arkadiuszwojcik commented Dec 18, 2024

I had some time and made quick test using that file. I checked only UART1 and found line that is causing issue because of which entrire UART1 section is ignored:

<enumeratedValues derivedFrom="UART1.CNTL.CTS_ASSERT.ASSERT_LEVEL"></enumeratedValues>

When I remove this line I am able to get UART1 in output zig file. I think same line is causing problems for other missing sections or maybe all of them as <enumeratedValues derivedFrom ... is used quite extensively in that file.

CC: @mattnite

EDIT:

I think it might be related to this line in regz:

//.name = node.get_value("name"),

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