From 5376d998a4f849b8f27c1adc725d179b0ee323bb Mon Sep 17 00:00:00 2001
From: gagan <gaganbhardwaj014@gmail.com>
Date: Fri, 18 Oct 2024 23:49:50 +0530
Subject: [PATCH] changes made

---
 Wallace5x5/final_adder_tb.sv            | 27 +++++++++++++++
 Wallace5x5/wallace_tree_reduction.sv    | 46 ++++++++++++++++++++++---
 Wallace5x5/wallace_tree_reduction_tb.sv | 26 ++++++++++++++
 3 files changed, 95 insertions(+), 4 deletions(-)
 create mode 100644 Wallace5x5/final_adder_tb.sv
 create mode 100644 Wallace5x5/wallace_tree_reduction_tb.sv

diff --git a/Wallace5x5/final_adder_tb.sv b/Wallace5x5/final_adder_tb.sv
new file mode 100644
index 0000000..4bebea2
--- /dev/null
+++ b/Wallace5x5/final_adder_tb.sv
@@ -0,0 +1,27 @@
+module final_adder_testbench;
+    logic [9:0] a, b;
+    logic [9:0] s;
+
+    // Instantiate the final adder module
+    final_adder uut (
+        .a(a),
+        .b(b),
+        .s(s)
+    );
+
+    initial begin
+        // Test Case 1
+        a = 10'b0001101101; // 429
+        b = 10'b0001010011; // 339
+        #10;
+        $display("Test 1: a = %b, b = %b, Sum = %b", a, b, s);
+
+        // Test Case 2
+        a = 10'b1111111111; // 1023
+        b = 10'b1111111111; // 1023
+        #10;
+        $display("Test 2: a = %b, b = %b, Sum = %b", a, b, s);
+
+        #10 $finish;
+    end
+endmodule
diff --git a/Wallace5x5/wallace_tree_reduction.sv b/Wallace5x5/wallace_tree_reduction.sv
index e9e3616..abda800 100644
--- a/Wallace5x5/wallace_tree_reduction.sv
+++ b/Wallace5x5/wallace_tree_reduction.sv
@@ -1,5 +1,43 @@
-module wallace_tree_reduction(a, b, r1, r2);
-	input logic [4:0] a, b;
-	output logic [9:0] r1, r2;
-	// start your code here
+// wallace_tree_reduction.sv
+module wallace_tree_reduction(
+    input logic [4:0] a, b,
+    output logic [9:0] r1, r2
+);
+
+    wire [4:0] pp0, pp1, pp2, pp3, pp4;
+
+    // Generate partial products
+    assign pp0 = a & {5{b[0]}};
+    assign pp1 = a & {5{b[1]}};
+    assign pp2 = a & {5{b[2]}};
+    assign pp3 = a & {5{b[3]}};
+    assign pp4 = a & {5{b[4]}};
+
+    wire s11, c11, s12, c12, s13, c13, s14, c14;
+    wire s21, c21, s22, c22, s23, c23;
+
+    assign r1[0] = pp0[0]; 
+
+    // Half Adder for the first two bits
+    HA ha1(.a(pp0[1]), .b(pp1[0]), .sum(r1[1]), .carry(c11));
+
+    // Full Adders for the next levels
+    FA fa1(.a(pp0[2]), .b(pp1[1]), .c(pp2[0]), .sum(s12), .carry(c12));
+    FA fa2(.a(pp0[3]), .b(pp1[2]), .c(pp2[1]), .sum(s13), .carry(c13));
+    FA fa3(.a(pp0[4]), .b(pp1[3]), .c(pp2[2]), .sum(s14), .carry(c14));
+
+    // Connecting outputs of Full Adders
+    FA fa4(.a(s12), .b(pp3[0]), .c(c11), .sum(r1[2]), .carry(c21));
+    FA fa5(.a(s13), .b(pp3[1]), .c(c12), .sum(s22), .carry(c22));
+    FA fa6(.a(s14), .b(pp3[2]), .c(c13), .sum(s23), .carry(c23));
+
+    // Finalizing outputs
+    FA fa7(.a(s22), .b(pp4[0]), .c(c21), .sum(r1[3]), .carry(r2[3]));
+    FA fa8(.a(s23), .b(pp4[1]), .c(c22), .sum(r1[4]), .carry(r2[4]));
+
+    assign r1[5] = c14;
+    assign r2[0] = 0; // Initialize unused bits
+    assign r2[1] = c14;
+    assign r2[2] = 0;
+
 endmodule
diff --git a/Wallace5x5/wallace_tree_reduction_tb.sv b/Wallace5x5/wallace_tree_reduction_tb.sv
new file mode 100644
index 0000000..57fce4e
--- /dev/null
+++ b/Wallace5x5/wallace_tree_reduction_tb.sv
@@ -0,0 +1,26 @@
+
+module wallace_tree_testbench;
+
+    logic [4:0] a, b;
+    logic [9:0] r1, r2;
+    
+    wallace_tree_reduction uut (
+        .a(a),
+        .b(b),
+        .r1(r1),
+        .r2(r2)
+    );
+
+    initial begin
+        $monitor("Time = %0t | A = %b, B = %b | R1 = %b, R2 = %b", $time, a, b, r1, r2);
+        
+        a = 5; b = 3; #10;
+        a = 15; b = 7; #10;
+        a = 31; b = 31; #10;
+        a = 9; b = 12; #10;
+        a = 0; b = 0; #10;
+        a = 1; b = 1; #10;
+
+        $stop;
+    end
+endmodule
\ No newline at end of file