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Example of using SoC host program and SoC on FPGA failed #1

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zmh403 opened this issue Mar 13, 2021 · 6 comments
Open

Example of using SoC host program and SoC on FPGA failed #1

zmh403 opened this issue Mar 13, 2021 · 6 comments

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@zmh403
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zmh403 commented Mar 13, 2021

Hi, when I ran the flow I got the error message in both case.
I have checked the software requirements and version, then I used "$make check" to ensure that I don't miss any requirements.
Here are my running environment and the version of tools which installed through apt-get.
OS: Ubuntu 18.04
Verilator 3.916 2017-11-25 rev verilator_3_914-65-g0478dbd
g++ (Ubuntu 8.4.0-1ubuntu1~18.04) 8.4.0

(1). $ make EN_VCD=1 all WAVEFORM_VCD=output_verilator/dumpfile.vcd
/usr/share/verilator/include/verilated.cpp:1725:6: error: no declaration matches ‘void VerilatedAssertOneThread::fatal_different()’
void VerilatedAssertOneThread::fatal_different() VL_MT_SAFE {

(2). $ make fpga FPGA_BOARD=artix_a35
Building output_temp/vector.o
riscv32-unknown-elf-gcc -march=rv32im -mabi=ilp32 -Wall -Wno-unused -ffreestanding -O0 -g --specs=nano.specs -Wall -Wno-main -save-temps=obj -DVERILATOR=0 -I../common/API/inc -I../common/base -c init/vector.S -o output_temp/vector.o
riscv32-unknown-elf-gcc: error: nano.specs: No such file or directory

The riscv32-unknown-elf-gcc is the riscv toolchain I installed from the link

How cloud I pass the both flow??
, Thank you.

@aignacio
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Hey @zmh403,
would you mind to upgrade to the Verilator in the image below?
image

@KiranKanchi
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Hello Aignacio ,

I am a newbie and i am trying to run RISCV through verilator.
I installed all pre requisites and did make check to confirm i have everything need to build.
doing a make run has following problem due to the Riscv toolchain, is it possible for you to upload the prebuilt toolchain or check the following log ?

knki:~/Documents/RISCV_Verilator/riscv_verilator_model$ make run
make[1]: Entering directory '/home/knki/Documents/RISCV_Verilator/riscv_verilator_model/sw/hello_world'
Building output_temp/vector.o
riscv-none-embed-gcc -march=rv32imc -mabi=ilp32 -Wall -Wno-unused -ffreestanding -O0 -g --specs=nano.specs -Wall -Wno-main -save-temps=obj -DVERILATOR=1 -I../common/API/inc -I../common/base -c init/vector.S -o output_temp/vector.o
/opt/xpack-riscv-none-embed-gcc-10.1.0-1.1/bin/riscv-none-embed-gcc: 1: ������: not found
/opt/xpack-riscv-none-embed-gcc-10.1.0-1.1/bin/riscv-none-embed-gcc: 1: �: not found
/opt/xpack-riscv-none-embed-gcc-10.1.0-1.1/bin/riscv-none-embed-gcc: 2: ��H__PAGEZERO�__TEXT: not found
/opt/xpack-riscv-none-embed-gcc-10.1.0-1.1/bin/riscv-none-embed-gcc: 3: Syntax error: "(" unexpected
make[1]: *** [Makefile:76: output_temp/vector.o] Error 2
make[1]: Leaving directory '/home/knki/Documents/RISCV_Verilator/riscv_verilator_model/sw/hello_world'
make: *** [Makefile:304: sw] Error 2

Note:
knki:~/Documents/RISCV_Verilator/riscv_verilator_model$ which riscv-none-embed-gcc
/opt/xpack-riscv-none-embed-gcc-10.1.0-1.1/bin/riscv-none-embed-gcc
Many thanks in advance!

Kind regards,
Kiran Kanchi

@aignacio
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run with this:

make run PREFIX=/opt/xpack-riscv-none-embed-gcc-10.1.0-1.1/bin/riscv-none-embed-

@KiranKanchi
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KiranKanchi commented Aug 29, 2021 via email

@aignacio
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go in the hello_world and build the binary manually so...

@KiranKanchi
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KiranKanchi commented Aug 30, 2021 via email

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