Rename reference design to fpga_10g

Signed-off-by: Víctor Mayoral Vilches <[email protected]>
alexforencich · Mar 11, 2023 · 3259912 · 3259912
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diff --git a/example/KR260/fpga/Makefile → example/KR260/fpga_10g/Makefile b/example/KR260/fpga/Makefile → example/KR260/fpga_10g/Makefile
diff --git a/example/KR260/fpga/README.md → example/KR260/fpga_10g/README.md b/example/KR260/fpga/README.md → example/KR260/fpga_10g/README.md
diff --git a/example/KR260/fpga/common/vivado.mk → example/KR260/fpga_10g/common/vivado.mk b/example/KR260/fpga/common/vivado.mk → example/KR260/fpga_10g/common/vivado.mk
diff --git a/example/KR260/fpga/fpga.xdc → example/KR260/fpga_10g/fpga.xdc b/example/KR260/fpga/fpga.xdc → example/KR260/fpga_10g/fpga.xdc
diff --git a/example/KR260/fpga/fpga/Makefile → example/KR260/fpga_10g/fpga/Makefile b/example/KR260/fpga/fpga/Makefile → example/KR260/fpga_10g/fpga/Makefile
diff --git a/example/KR260/fpga/ip/eth_xcvr_gt.tcl → example/KR260/fpga_10g/ip/eth_xcvr_gt.tcl b/example/KR260/fpga/ip/eth_xcvr_gt.tcl → example/KR260/fpga_10g/ip/eth_xcvr_gt.tcl
diff --git a/example/KR260/fpga/lib/eth → example/KR260/fpga_10g/lib/eth b/example/KR260/fpga/lib/eth → example/KR260/fpga_10g/lib/eth
diff --git a/example/KR260/fpga/rtl/debounce_switch.v → example/KR260/fpga_10g/rtl/debounce_switch.v b/example/KR260/fpga/rtl/debounce_switch.v → example/KR260/fpga_10g/rtl/debounce_switch.v
diff --git a/...ple/KR260/fpga/rtl/eth_xcvr_phy_wrapper.v → ...KR260/fpga_10g/rtl/eth_xcvr_phy_wrapper.v b/...ple/KR260/fpga/rtl/eth_xcvr_phy_wrapper.v → ...KR260/fpga_10g/rtl/eth_xcvr_phy_wrapper.v
diff --git a/example/KR260/fpga/rtl/fpga.v → example/KR260/fpga_10g/rtl/fpga.v b/example/KR260/fpga/rtl/fpga.v → example/KR260/fpga_10g/rtl/fpga.v
diff --git a/example/KR260/fpga/rtl/fpga_core.v → example/KR260/fpga_10g/rtl/fpga_core.v b/example/KR260/fpga/rtl/fpga_core.v → example/KR260/fpga_10g/rtl/fpga_core.v
diff --git a/example/KR260/fpga/rtl/sync_signal.v → example/KR260/fpga_10g/rtl/sync_signal.v b/example/KR260/fpga/rtl/sync_signal.v → example/KR260/fpga_10g/rtl/sync_signal.v
diff --git a/example/KR260/fpga/tb/fpga_core/Makefile → example/KR260/fpga_10g/tb/fpga_core/Makefile b/example/KR260/fpga/tb/fpga_core/Makefile → example/KR260/fpga_10g/tb/fpga_core/Makefile
diff --git a/...KR260/fpga/tb/fpga_core/test_fpga_core.py → ...0/fpga_10g/tb/fpga_core/test_fpga_core.py b/...KR260/fpga/tb/fpga_core/test_fpga_core.py → ...0/fpga_10g/tb/fpga_core/test_fpga_core.py