From a05d1a45509153b81b201319b222db0eaf25c043 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 14 Jan 2024 15:45:38 -0800 Subject: [PATCH] Rename Arista_7132LB to DCS7132LB Signed-off-by: Alex Forencich --- example/{Arista_7132LB => DCS7132LB}/fpga_25g/README.md | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/common/vivado.mk | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga.xdc | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga/Makefile | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga/config.tcl | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga_10g/Makefile | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga_10g/config.tcl | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/ip/eth_xcvr_gt.tcl | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/lib/eth | 0 .../fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v | 0 .../fpga_25g/rtl/eth_xcvr_phy_wrapper.v | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/fpga.v | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/fpga_core.v | 0 example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/sync_signal.v | 0 .../{Arista_7132LB => DCS7132LB}/fpga_25g/tb/fpga_core/Makefile | 0 .../fpga_25g/tb/fpga_core/test_fpga_core.py | 0 .../fpga_25g/tb/fpga_core/test_fpga_core.v | 0 17 files changed, 0 insertions(+), 0 deletions(-) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/README.md (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/common/vivado.mk (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga.xdc (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga/Makefile (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga/config.tcl (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga_10g/Makefile (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/fpga_10g/config.tcl (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/ip/eth_xcvr_gt.tcl (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/lib/eth (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/eth_xcvr_phy_wrapper.v (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/fpga.v (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/fpga_core.v (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/rtl/sync_signal.v (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/tb/fpga_core/Makefile (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/tb/fpga_core/test_fpga_core.py (100%) rename example/{Arista_7132LB => DCS7132LB}/fpga_25g/tb/fpga_core/test_fpga_core.v (100%) diff --git a/example/Arista_7132LB/fpga_25g/README.md b/example/DCS7132LB/fpga_25g/README.md similarity index 100% rename from example/Arista_7132LB/fpga_25g/README.md rename to example/DCS7132LB/fpga_25g/README.md diff --git a/example/Arista_7132LB/fpga_25g/common/vivado.mk b/example/DCS7132LB/fpga_25g/common/vivado.mk similarity index 100% rename from example/Arista_7132LB/fpga_25g/common/vivado.mk rename to example/DCS7132LB/fpga_25g/common/vivado.mk diff --git a/example/Arista_7132LB/fpga_25g/fpga.xdc b/example/DCS7132LB/fpga_25g/fpga.xdc similarity index 100% rename from example/Arista_7132LB/fpga_25g/fpga.xdc rename to example/DCS7132LB/fpga_25g/fpga.xdc diff --git a/example/Arista_7132LB/fpga_25g/fpga/Makefile b/example/DCS7132LB/fpga_25g/fpga/Makefile similarity index 100% rename from example/Arista_7132LB/fpga_25g/fpga/Makefile rename to example/DCS7132LB/fpga_25g/fpga/Makefile diff --git a/example/Arista_7132LB/fpga_25g/fpga/config.tcl b/example/DCS7132LB/fpga_25g/fpga/config.tcl similarity index 100% rename from example/Arista_7132LB/fpga_25g/fpga/config.tcl rename to example/DCS7132LB/fpga_25g/fpga/config.tcl diff --git a/example/Arista_7132LB/fpga_25g/fpga_10g/Makefile b/example/DCS7132LB/fpga_25g/fpga_10g/Makefile similarity index 100% rename from example/Arista_7132LB/fpga_25g/fpga_10g/Makefile rename to example/DCS7132LB/fpga_25g/fpga_10g/Makefile diff --git a/example/Arista_7132LB/fpga_25g/fpga_10g/config.tcl b/example/DCS7132LB/fpga_25g/fpga_10g/config.tcl similarity index 100% rename from example/Arista_7132LB/fpga_25g/fpga_10g/config.tcl rename to example/DCS7132LB/fpga_25g/fpga_10g/config.tcl diff --git a/example/Arista_7132LB/fpga_25g/ip/eth_xcvr_gt.tcl b/example/DCS7132LB/fpga_25g/ip/eth_xcvr_gt.tcl similarity index 100% rename from example/Arista_7132LB/fpga_25g/ip/eth_xcvr_gt.tcl rename to example/DCS7132LB/fpga_25g/ip/eth_xcvr_gt.tcl diff --git a/example/Arista_7132LB/fpga_25g/lib/eth b/example/DCS7132LB/fpga_25g/lib/eth similarity index 100% rename from example/Arista_7132LB/fpga_25g/lib/eth rename to example/DCS7132LB/fpga_25g/lib/eth diff --git a/example/Arista_7132LB/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v b/example/DCS7132LB/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v similarity index 100% rename from example/Arista_7132LB/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v rename to example/DCS7132LB/fpga_25g/rtl/eth_xcvr_phy_quad_wrapper.v diff --git a/example/Arista_7132LB/fpga_25g/rtl/eth_xcvr_phy_wrapper.v b/example/DCS7132LB/fpga_25g/rtl/eth_xcvr_phy_wrapper.v similarity index 100% rename from example/Arista_7132LB/fpga_25g/rtl/eth_xcvr_phy_wrapper.v rename to example/DCS7132LB/fpga_25g/rtl/eth_xcvr_phy_wrapper.v diff --git a/example/Arista_7132LB/fpga_25g/rtl/fpga.v b/example/DCS7132LB/fpga_25g/rtl/fpga.v similarity index 100% rename from example/Arista_7132LB/fpga_25g/rtl/fpga.v rename to example/DCS7132LB/fpga_25g/rtl/fpga.v diff --git a/example/Arista_7132LB/fpga_25g/rtl/fpga_core.v b/example/DCS7132LB/fpga_25g/rtl/fpga_core.v similarity index 100% rename from example/Arista_7132LB/fpga_25g/rtl/fpga_core.v rename to example/DCS7132LB/fpga_25g/rtl/fpga_core.v diff --git a/example/Arista_7132LB/fpga_25g/rtl/sync_signal.v b/example/DCS7132LB/fpga_25g/rtl/sync_signal.v similarity index 100% rename from example/Arista_7132LB/fpga_25g/rtl/sync_signal.v rename to example/DCS7132LB/fpga_25g/rtl/sync_signal.v diff --git a/example/Arista_7132LB/fpga_25g/tb/fpga_core/Makefile b/example/DCS7132LB/fpga_25g/tb/fpga_core/Makefile similarity index 100% rename from example/Arista_7132LB/fpga_25g/tb/fpga_core/Makefile rename to example/DCS7132LB/fpga_25g/tb/fpga_core/Makefile diff --git a/example/Arista_7132LB/fpga_25g/tb/fpga_core/test_fpga_core.py b/example/DCS7132LB/fpga_25g/tb/fpga_core/test_fpga_core.py similarity index 100% rename from example/Arista_7132LB/fpga_25g/tb/fpga_core/test_fpga_core.py rename to example/DCS7132LB/fpga_25g/tb/fpga_core/test_fpga_core.py diff --git a/example/Arista_7132LB/fpga_25g/tb/fpga_core/test_fpga_core.v b/example/DCS7132LB/fpga_25g/tb/fpga_core/test_fpga_core.v similarity index 100% rename from example/Arista_7132LB/fpga_25g/tb/fpga_core/test_fpga_core.v rename to example/DCS7132LB/fpga_25g/tb/fpga_core/test_fpga_core.v