diff --git a/sdoc/Makefile b/sdoc/Makefile index d0c3cbf1..d3392f87 100644 --- a/sdoc/Makefile +++ b/sdoc/Makefile @@ -8,6 +8,8 @@ SPHINXBUILD ?= sphinx-build SOURCEDIR = source BUILDDIR = build +PYTHON = python + # Put it first so that "make" without argument is like "make help". help: @$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) @@ -18,3 +20,9 @@ help: # "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS). %: Makefile @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) + +gen_autodocs: + cd gen_pages ; \ + $(PYTHON) gen_sysobj_pages.py ; \ + $(PYTHON) gen_rd_svg.py ; \ + $(PYTHON) gen_hdl_refdesigns.py diff --git a/sdoc/README_doc.md b/sdoc/README_doc.md new file mode 100644 index 00000000..2a05a631 --- /dev/null +++ b/sdoc/README_doc.md @@ -0,0 +1,16 @@ +# Doc Creation + +Doc is create by leveraging Sphinx as the documentation engine. To create the entire documentation set you must generate the dynamic pages which document the system object APIs and the reference designs. Then the output targets can be run. This is done by running the following command from the root of the toolbox: + +```bash +make -C sdoc gen_hdl_refdesigns html +``` + +## Updating the System Object Documentation + +The system object documentation is generated from the MATLAB code and comments, which requires use of MATLAB itself. By running the script gen_sysobj_doc.m within the *gen_pages* folder, it will create the necessary sysobjs.json file which sphinx will then use to create the individual component pages. This is done by running the following command from the root of the toolbox in MATLAB: + +```matlab +cd sdoc/gen_pages +gen_sysobj_doc +``` diff --git a/sdoc/gen_pages/_templates/refdesign.html b/sdoc/gen_pages/_templates/refdesign.html index b8abebea..29ce9639 100644 --- a/sdoc/gen_pages/_templates/refdesign.html +++ b/sdoc/gen_pages/_templates/refdesign.html @@ -1,4 +1,3 @@ -{% include 'header.tmpl' %} {% block content %} # {{ obj.name }} Reference Design Integration @@ -18,16 +17,16 @@ ## Reference Design -
{% if obj.rd_image == "ad9361" %} - ![Reference Design](../assets/rd_ad9361_custom.svg) +```{figure} /_static/assets/rd_ad9361_custom.svg {% elif obj.rd_image == "adrv9001" %} - ![Reference Design](../assets/rd_adrv9001_custom.svg) +```{figure} /_static/assets/rd_adrv9001_custom.svg {% elif obj.rd_image == "jesd" %} - ![Reference Design](../assets/rd_jesd_custom.svg) +```{figure} /_static/assets/rd_jesd_custom.svg {% endif %} -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
+HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation. +``` + The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. ## HDL Worflow Advisor Port Mappings diff --git a/sdoc/gen_pages/_templates/sysobj.html b/sdoc/gen_pages/_templates/sysobj.html index 7a90f43f..c25d48ea 100644 --- a/sdoc/gen_pages/_templates/sysobj.html +++ b/sdoc/gen_pages/_templates/sysobj.html @@ -35,21 +35,24 @@ For more information on changing property values, see System Design in MATLAB Using System Objects. +
+ + +{% for prop in obj.props %} +:::{dropdown} {{ prop.prop_name }} +{{ prop.prop_description }} +::: +{% endfor -%} + + -{%- for prop in obj.props %} -
- - -
-{%- endfor -%} {% endblock %} +
Example Usage
-``` +```matlab {% if obj.type == "Tx" %} %% Configure device tx = {{ obj.name }}; diff --git a/sdoc/gen_pages/gen_rd_svg.py b/sdoc/gen_pages/gen_rd_svg.py index 70054e42..799fd521 100644 --- a/sdoc/gen_pages/gen_rd_svg.py +++ b/sdoc/gen_pages/gen_rd_svg.py @@ -78,7 +78,7 @@ def gen_rd_svg(): output += o continue # Add link wrapper - output += f'{gtag}{post_gtag}' + output += f'{gtag}{post_gtag}' # output += o # print(sec) # Add css to change fill color