diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index fa5ac550..a8cc1593 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -16,8 +16,8 @@ jobs: - name: Organize Toolbox Dependencies run: | make -C ./CI/scripts build - pip3 install -r requirements_doc.txt - make -C ./CI/gen_doc doc_ml + pip3 install -r CI/doc/requirements_doc.txt + make -C CI/doc gen_autodocs html make -C ./CI/scripts add_libad9361 - name: Set up MATLAB diff --git a/.github/workflows/doc.yml b/.github/workflows/doc.yml index b280d9c8..542bf01a 100644 --- a/.github/workflows/doc.yml +++ b/.github/workflows/doc.yml @@ -16,10 +16,10 @@ jobs: - name: Install dependencies run: | sudo apt install -y python3-numpy - pip install -r requirements_doc.txt + pip install -r CI/doc/requirements_doc.txt - name: Check doc build run: | - make -C CI/gen_doc doc + make -C CI/doc gen_autodocs html - name: Publish master doc if: github.ref == 'refs/heads/master' diff --git a/.gitignore b/.gitignore index 02778418..8a7e8a54 100644 --- a/.gitignore +++ b/.gitignore @@ -3,3 +3,4 @@ **/slprj/** AD9361_Filter_Wizard/*TestFiltWiz*.m AD9361_Filter_Wizard/.previous_ip_addr +_generated/* \ No newline at end of file diff --git a/CI/doc/ADITTBHome.m b/CI/doc/ADITTBHome.m deleted file mode 100644 index 2e33d2ab..00000000 --- a/CI/doc/ADITTBHome.m +++ /dev/null @@ -1,59 +0,0 @@ -%% ANALOG DEVICES INC. TRANSCEIVER TOOLBOX SUPPORT PACKAGE -% Analog Devices Inc. Transceiver Toolbox Support Package for Analog -% Devices transceivers enable the user in designing and prototyping -% practical wireless systems. Using MATLAB system objects provided with -% this support package, you can use ADI transceiver products to either -% capture streaming RF data and apply signal processing algorithms in -% MATLAB or utilize the provided HDL infrastructre to develop targetable -% designs that process RF data on the fly, thereby facilitating -% the design, development and testing of modem designs under real-world -% conditions. -% -% -%{ -Refer to existing documentation as much as possible. Only provide an -overview from a MATLAB perspective. -%} -% -% -%{ -Describe API in a unified manner to appeal to all users regardless of -whether Pluto, AD936x, AD937x, ADRV900x is being used to run code examples. -%} -% -% -%{ -What does HDL coder do? -IQ in IQ out -Valid in Valid out -Discussion on targeting from a non-AD9361 perspective since MATLAB -documentation has AD9361 perspective on HDL. Point to wiki page on -Transceiver toolbox. But, update it first. -%} -% -% -%{ -Streaming Examples -Targeting Examples (Workflow from MATLAB Algorithm implementation to FPGA -targeting) - point to the donut diagram -Show examples the way MATLAB doc shows - demos.xml, similarly, see if there is an apps.xml -published examples, -%} -% -% -% -%{ -State Management -- When you change an attribute, when does it take effect? -- What happens when you run the system object operator? -- CenterFrequency gets written to hardware immediately in ADITB, not so in -MWTB. Illustrate by sine wave, FFT plot or iio_attr commands. -Attributes -Debug Attributes -Fast lock/frequency hopping -... -... -AGC Tuning (For AD936x) -%} -% -% \ No newline at end of file diff --git a/CI/doc/Buffers.mlx b/CI/doc/Buffers.mlx deleted file mode 100644 index ad4d554a..00000000 Binary files a/CI/doc/Buffers.mlx and /dev/null differ diff --git a/CI/doc/CodeExamples.mlx b/CI/doc/CodeExamples.mlx deleted file mode 100644 index ff7027cc..00000000 Binary files a/CI/doc/CodeExamples.mlx and /dev/null differ diff --git a/CI/doc/Examples.mlx b/CI/doc/Examples.mlx deleted file mode 100644 index f593f56b..00000000 Binary files a/CI/doc/Examples.mlx and /dev/null differ diff --git a/CI/doc/ForDevs.mlx b/CI/doc/ForDevs.mlx deleted file mode 100644 index 9046205e..00000000 Binary files a/CI/doc/ForDevs.mlx and /dev/null differ diff --git a/CI/doc/HSP_Pluto_Attribute_Update.m b/CI/doc/HSP_Pluto_Attribute_Update.m deleted file mode 100644 index d380fcac..00000000 --- a/CI/doc/HSP_Pluto_Attribute_Update.m +++ /dev/null @@ -1,8 +0,0 @@ -clear all; - -rx = sdrrx('Pluto'); -y = rx(); -y = rx(); -rx.CenterFrequency = 2.45e9; -y = rx(); -release(rx); \ No newline at end of file diff --git a/CI/doc/Makefile b/CI/doc/Makefile new file mode 100644 index 00000000..d3392f87 --- /dev/null +++ b/CI/doc/Makefile @@ -0,0 +1,28 @@ +# Minimal makefile for Sphinx documentation +# + +# You can set these variables from the command line, and also +# from the environment for the first two. +SPHINXOPTS ?= +SPHINXBUILD ?= sphinx-build +SOURCEDIR = source +BUILDDIR = build + +PYTHON = python + +# Put it first so that "make" without argument is like "make help". +help: + @$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) + +.PHONY: help Makefile + +# Catch-all target: route all unknown targets to Sphinx using the new +# "make mode" option. $(O) is meant as a shortcut for $(SPHINXOPTS). +%: Makefile + @$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O) + +gen_autodocs: + cd gen_pages ; \ + $(PYTHON) gen_sysobj_pages.py ; \ + $(PYTHON) gen_rd_svg.py ; \ + $(PYTHON) gen_hdl_refdesigns.py diff --git a/CI/doc/README_doc.md b/CI/doc/README_doc.md new file mode 100644 index 00000000..b13505de --- /dev/null +++ b/CI/doc/README_doc.md @@ -0,0 +1,24 @@ +# Doc Creation + +Doc is create by leveraging Sphinx as the documentation engine. To create the entire documentation set you must generate the dynamic pages which document the system object APIs and the reference designs. Then the output targets can be run. Since doc gen requires sphinx and some plugins they need to be installed first and ideally in a virtual environment. The following commands will create a virtual environment and install the necessary packages: + +```bash +python3 -m venv venv +source venv/bin/activate +pip install -r CI/doc/requirements_doc.txt +``` + +Next we can build the documentation. The following commands will build the documentation and place it in the *build* folder under the *CI/doc* folder: + +```bash +make -C CI/doc gen_autodocs html +``` + +## Updating the System Object Documentation + +The system object documentation is generated from the MATLAB code and comments, which requires use of MATLAB itself. By running the script gen_sysobj_doc.m within the *gen_pages* folder, it will create the necessary sysobjs.json file which sphinx will then use to create the individual component pages. This is done by running the following command from the root of the toolbox in MATLAB: + +```matlab +cd CI/doc/gen_pages +gen_sysobj_doc +``` diff --git a/CI/doc/StateMgmt.mlx b/CI/doc/StateMgmt.mlx deleted file mode 100644 index e56d3aef..00000000 Binary files a/CI/doc/StateMgmt.mlx and /dev/null differ diff --git a/CI/doc/Support.mlx b/CI/doc/Support.mlx deleted file mode 100644 index f866727b..00000000 Binary files a/CI/doc/Support.mlx and /dev/null differ diff --git a/CI/doc/SupportedHardware.mlx b/CI/doc/SupportedHardware.mlx deleted file mode 100644 index fbdb86a9..00000000 Binary files a/CI/doc/SupportedHardware.mlx and /dev/null differ diff --git a/CI/doc/SysObjsProps.m b/CI/doc/SysObjsProps.m deleted file mode 100644 index 1f2bfd95..00000000 --- a/CI/doc/SysObjsProps.m +++ /dev/null @@ -1,18 +0,0 @@ -%% System Object Properties -% This section lists the system object properties for devices and -% evaluation boards supported by Transceiver Toolbox. -%%% Devices -% * AD9361 and -% * AD9363 and -% * AD9364 and -% * AD9371 and -% * ADRV9009 and -%%% Evaluation Boards -% * FMComms2 and -% * FMComms3 and -% * FMComms4 and -% * PackRF and -% * Pluto and -% * ADRV9361-Z7035 and -% * ADRV9364-Z7020 and -% * ADRV9371 and \ No newline at end of file diff --git a/CI/doc/SystemObjects.mlx b/CI/doc/SystemObjects.mlx deleted file mode 100644 index 3cdef169..00000000 Binary files a/CI/doc/SystemObjects.mlx and /dev/null differ diff --git a/CI/doc/adi_bsp.mlx b/CI/doc/adi_bsp.mlx deleted file mode 100644 index e7d7cad6..00000000 Binary files a/CI/doc/adi_bsp.mlx and /dev/null differ diff --git a/CI/doc/customDoc.m b/CI/doc/customDoc.m deleted file mode 100644 index 6d9071c9..00000000 --- a/CI/doc/customDoc.m +++ /dev/null @@ -1,163 +0,0 @@ -function html = customDoc(str) - % Make sure that we can support the doc command on this platform. - if ~usejava('mwt') - error(message('MATLAB:doc:UnsupportedPlatform', upper(mfilename))); - end - - % Examine the inputs to see what options are selected. - [showClassicDoc, topic, search, isVariable] = examineInputs(str); - if isVariable - varName = inputname(isVariable); - elseif ~isempty(topic) && nargin == 1 - wsVariables = evalin('caller', 'whos'); - [topic, isVariable, varName] = matlab.internal.help.getClassNameFromWS(topic, wsVariables, true); - end - if search - docsearch(topic); - return; - end - % Check this before checking docroot, the -classic option is used to show doc not under docroot. - if showClassicDoc - com.mathworks.mlservices.MLHelpServices.invokeClassicHelpBrowser(); - return; - end - - % Make sure docroot is valid. - if ~matlab.internal.help.isDocInstalled - % If m-file help is available for this topic, call helpwin. - if ~isempty(topic) - if showHelpwin(topic) - return; - end - end - - % Otherwise show the appropriate error page. - htmlFile = fullfile(matlabroot,'toolbox','local','helperr.html'); - - if exist(htmlFile, 'file') ~= 2 - error(message('MATLAB:doc:HelpErrorPageNotFound', htmlFile)); - end - displayFile(htmlFile); - return; - end - - % Case no topic specified. - if isempty(topic) - % Just open the help browser and display the default startup page. - com.mathworks.mlservices.MLHelpServices.invoke(); - return; - end - - if strncmpi(topic, 'mupad/', 6) - if ~mupaddoc(topic) - showNoReferencePageFound; - end - return; - end - - [operator,topic] = matlab.internal.language.introspective.isOperator(topic); - if ~operator - if topic(end) == '/' - topic = topic(1:end-1); - end - - if showProductPage(topic) - return; - end - - [possibleTopics, isPrimitive] = matlab.internal.help.resolveDocTopic(topic, isVariable); - - if isPrimitive - disp(matlab.internal.help.getInstanceIsa(varName, topic)); - return; - end - else - [~,possibleTopics.topic] = fileparts(topic); - possibleTopics.isElement = false; - end - - [foundTopic, html] = showHelpwin(topic); - if ~displayDocPage(possibleTopics) && ~foundTopic - docsearch(topic); - end -end - -function [showClassicDoc, topic, search, varIndex] = examineInputs(str) - showClassicDoc = 0; - topic = []; - search = 0; - varIndex = 0; - - % for i = 1:numel(str) - argName = str; % str{i}; - if isstring(argName) - if ~isscalar(argName) - MException(message('MATLAB:doc:MustBeSingleString')).throwAsCaller; - end - argName = char(strip(argName)); - elseif ischar(argName) - argName = strtrim(argName); - else - argName = class(argName); - % varIndex = i; - end - - if strcmp(argName, '-classic') - showClassicDoc = 1; - else - % assume this is the location. - if ~isempty(topic) - topic = sprintf('%s %s', topic, argName); - search = 1; - else - topic = argName; - end - end - % end -end - -function success = showProductPage(topic) - success = com.mathworks.mlservices.MLHelpServices.showProductPage(topic); -end - -function success = displayDocPage(possibleTopics) - success = false; - for topic = possibleTopics - if com.mathworks.mlservices.MLHelpServices.showReferencePage(topic.topic, topic.isElement) - success = true; - return; - end - end - - for topic = possibleTopics - if matlab.internal.doc.isLiveCodeAndHasDocumentation(topic.topic) - internal.help.livecodedoc.mlxdoc(topic.topic); - success = true; - return; - end - end -end - -function [foundTopic, html] = showHelpwin(topic) - % turn off the warning message about helpwin being removed in a future - % release - s = warning('off', 'MATLAB:helpwin:FunctionToBeRemoved'); - [foundTopic, html] = customHelpwin(topic, '', '', '-doc'); - - % turn the warning message back on if it was on to begin with - warning(s.state, 'MATLAB:helpwin:FunctionToBeRemoved'); -end - -function showNoReferencePageFound(topic) - noFuncPage = matlab.internal.help.underDocroot('nofunc.html'); - if ~isempty(noFuncPage) - displayFile(noFuncPage); - else - error(message('MATLAB:doc:InvalidTopic', topic)); - end -end - -function displayFile(htmlFile) - % Display the file inside the help browser. - web(htmlFile, '-helpbrowser'); -end diff --git a/CI/doc/customHelpwin.m b/CI/doc/customHelpwin.m deleted file mode 100644 index d9e1a747..00000000 --- a/CI/doc/customHelpwin.m +++ /dev/null @@ -1,188 +0,0 @@ -function [success, html] = customHelpwin(topic,pagetitle,helptitle,varargin) -%HELPWIN MATLAB file help displayed in a window -% HELPWIN TOPIC displays the help text for the specified TOPIC inside a -% window. Links are created to functions referenced in the 'See Also' -% line of the help text. -% -% HELPWIN(HELP_STR,TITLE) displays the string HELP_STR in the help -% window. HELP_STR may be passed in as a string with each line separated -% by carriage returns, a column vector cell array of strings with each cell -% (row) representing a line or as a string matrix with each row representing -% a line. The optional string TITLE will appear in the title banner. -% -% HELPWIN({TITLE1 HELP_STR1;TITLE2 HELP_STR2;...},PAGE) displays one page -% of multi-page help text. Note: this calling sequence is deprecated and -% is provided only for compatibility with previous versions of HELPWIN. -% The multi-page help text is passed in as a -% cell array of strings or cells containing TITLE and HELP_STR pairs. -% Each row of the multi-page help text cell array (dimensioned number of -% pages by 2) consists of a title string paired with a string, cell array -% or string matrix of help text. The second argument PAGE is a string -% which must match one of the TITLE entries in the multi-page help text. -% The matching TITLE represents the page that is to be displayed first. -% If no second argument is given, the first page is displayed. -% -% HELPWIN displays the default topic list in a window. -% -% HELPWIN will be removed in a future release. Use DOC instead. -% -% See also HELP, DOC. - -% Copyright 1984-2020 The MathWorks, Inc. - -if nargout - success = true; -end - -% Make sure that we can support the helpwin command on this platform. -if ~usejava('mwt') - error(message('MATLAB:doc:UnsupportedPlatform',upper(mfilename))); -end - -% This function has to support the old helpwin syntax, which -% provides for three disparate cases. -% Case 1: HELPWIN TOPIC, to display function or topic help (same as HELP function). -% Case 2: HELPWIN(HELP_STR,TITLE), to display an arbitrary help string. -% Case 3: HELPWIN({TITLE1 HELP_STR1;TITLE2 HELP_STR2;...},PAGE) -% to display multi-page help. - -% Is this multi-page help text? (case 3 above) -if nargin>0 && (iscell(topic) || isstring(topic)) && (size(topic,2) > 1) - if nargin < 2 - pagetitle = ''; - helptitle = ''; - elseif nargin < 3 - helptitle = pagetitle; - end - if nargin > 3 - displayOption = varargin{1}; - else - displayOption = ''; - end - handle_multipage_help(topic,pagetitle,helptitle,displayOption) - return; -end - -if (nargin == 0) - doc; - return; -elseif (nargin == 1) - html = help2html(topic); -elseif (nargin > 1) - if nargin > 3 - helpCommandOption = varargin{1}; - else - helpCommandOption = '-helpwin'; - end - html = help2html(topic,pagetitle,helpCommandOption); -end - -if isempty(html) && nargout - success = false; - %{ -else - displayFile(['text://' html]); - %} -end - -function handle_multipage_help(topic,pagetitle,helptitle,displayOption) -if (iscell(topic) || isstring(topic)) && numel(topic) == 2 - % This isn't really multipage help. Use a different helpwin syntax. - helpwin(topic{2},topic{1}); - return; -end - -pagetitle = char(pagetitle); -helptitle = char(helptitle); - -% Alternate between multiple temp files (starting with matlabTemp1.html). -% Multiple files are needed because a single file won't refresh properly, -% and to allow for a certain level of "Back" operations in the browser. -% You have to pass the browser a new file name each time to get it to reload. -dirName = char(com.mathworks.services.Prefs.getPropertyDirectory); -currFile = char(com.mathworks.mlservices.MLHelpServices.getCurrentLocation); -tempNum = regexp(currFile,'matlabTemp(\d).html','tokens','once'); -if ~isempty(tempNum) - tempNum = rem(str2double(tempNum),5) + 1; -else - tempNum = 1; -end -fileName = fullfile(dirName,['matlabTemp' num2str(tempNum) '.html']); - -% Workaround for ICE bug involving named anchors -fnPos = strfind(fileName, 'matlabTemp'); -shortName = fileName(fnPos:length(fileName)); - -% Starting building HTML output, beginning with optional title banner. -% At top put header with links to each page. -% Only show header if more than one page. -dom = com.mathworks.xml.XMLUtils.createDocument('help-info'); -dom.getDomConfig.setParameter('cdata-sections',true); -addTextNode(dom,dom.getDocumentElement,'title',helptitle); -addTextNode(dom,dom.getDocumentElement,'filename',shortName); - -helpdir = fileparts(mfilename('fullpath')); -helpdir = ['file:///' strrep(helpdir,'\','/')]; -addTextNode(dom,dom.getDocumentElement,'helptools-dir',helpdir); - -if ~strcmp(helptitle,pagetitle) - addTextNode(dom,dom.getDocumentElement,'pagetitle',pagetitle); -end -numpages = size(topic,1); -for x = 1:numpages - pgtitle = char(topic(x,1)); - helpNode = help2xml(dom,pgtitle,pgtitle,'-helpwin'); - addAttribute(dom,helpNode,'id',num2str(x)); -end - -addTextNode(dom,dom.getDocumentElement,'default-topics-text',getString(message('MATLAB:helpwin:sprintf_DefaultTopics'))); -addTextNode(dom,dom.getDocumentElement,'help-command-option','helpwin'); -xslfile = fullfile(fileparts(mfilename('fullpath')),'private','helpwin.xsl'); -html = xslt(dom,xslfile,'-tostring'); - -for x = 1:numpages - helpstr = char(topic(x,2)); - if (size(helpstr,1) > 1) - % Convert a 2-D char array to 1-D. - c = cellstr(helpstr); - helpstr = sprintf('%s\n',c{:}); - end - - html = regexprep(html,['\s*'], sprintf('\n\n%s',regexptranslate('escape',helpstr))); -end - -if strcmp(displayOption,'-nofile') - displayFile(['text://' html]); -else - fid = fopen(fileName,'w'); - fprintf(fid,'%s', html); - fclose(fid); - - % Get the index for the requested page from the cell array. - % Display the appropriate page. - ind = strmatch(pagetitle,topic(:,1),'exact'); - if isempty(ind), ind = 1; end - if ind == 1 - displayFile(fileName); - else - namedAnchor = sprintf('#topic%u',ind); - displayFile([fileName namedAnchor ]); - end -end - -function addTextNode(dom,parent,name,text) -child = dom.createElement(name); -child.appendChild(dom.createTextNode(text)); -parent.appendChild(child); - -function addAttribute(dom,elt,name,text) -att = dom.createAttribute(name); -att.appendChild(dom.createTextNode(text)); -elt.getAttributes.setNamedItem(att); - - -%------------------------------------------ -% Helper function that displays the HTML file in the web browser. -function displayFile(htmlFile) -web(htmlFile, '-helpbrowser'); - diff --git a/CI/doc/gen_pages/Makefile b/CI/doc/gen_pages/Makefile new file mode 100644 index 00000000..06e131f8 --- /dev/null +++ b/CI/doc/gen_pages/Makefile @@ -0,0 +1,14 @@ +# Define the Python interpreter +PYTHON = python + +# Define the targets and their dependencies +all: gen_sysobj_pages gen_rd_svg gen_hdl_refdesigns + +gen_sysobj_pages: + $(PYTHON) gen_sysobj_pages.py + +gen_rd_svg: + $(PYTHON) gen_rd_svg.py + +gen_hdl_refdesigns: + $(PYTHON) gen_hdl_refdesigns.py \ No newline at end of file diff --git a/CI/doc/gen_pages/_templates/allrefdesigns.tmpl b/CI/doc/gen_pages/_templates/allrefdesigns.tmpl new file mode 100644 index 00000000..cfb64a1b --- /dev/null +++ b/CI/doc/gen_pages/_templates/allrefdesigns.tmpl @@ -0,0 +1,20 @@ +{% include 'header.tmpl' %} +# HDL Reference Designs + +Available hardware streaming interfaces in HSX Toolbox: + + +```{eval-rst} +.. toctree:: + :maxdepth: 1 +{% for obj in designs %} + _generated/hdlrefdesigns/{{ obj }} +{%- endfor %} + +``` + + + +Click on left table of contents for individual component pages. \ No newline at end of file diff --git a/CI/gen_doc/docs/_templates/allsysobjs.tmpl b/CI/doc/gen_pages/_templates/allsysobjs.tmpl similarity index 75% rename from CI/gen_doc/docs/_templates/allsysobjs.tmpl rename to CI/doc/gen_pages/_templates/allsysobjs.tmpl index b8a4a7ad..33d37a1b 100644 --- a/CI/gen_doc/docs/_templates/allsysobjs.tmpl +++ b/CI/doc/gen_pages/_templates/allsysobjs.tmpl @@ -5,8 +5,16 @@ Available hardware streaming interfaces in HSX Toolbox: -{%- for obj in devices %} -- {{ obj }} + +```{eval-rst} +.. toctree:: + :maxdepth: 1 +{% for obj in devices %} + _generated/sysobjects/{{ obj }} {%- endfor %} +``` + + + Click on left table of contents for individual component pages. \ No newline at end of file diff --git a/CI/gen_doc/docs/_pages/header.tmpl b/CI/doc/gen_pages/_templates/header.tmpl similarity index 100% rename from CI/gen_doc/docs/_pages/header.tmpl rename to CI/doc/gen_pages/_templates/header.tmpl diff --git a/CI/gen_doc/docs/_templates/refdesign.html b/CI/doc/gen_pages/_templates/refdesign.html similarity index 83% rename from CI/gen_doc/docs/_templates/refdesign.html rename to CI/doc/gen_pages/_templates/refdesign.html index b8abebea..29ce9639 100644 --- a/CI/gen_doc/docs/_templates/refdesign.html +++ b/CI/doc/gen_pages/_templates/refdesign.html @@ -1,4 +1,3 @@ -{% include 'header.tmpl' %} {% block content %} # {{ obj.name }} Reference Design Integration @@ -18,16 +17,16 @@ ## Reference Design -
{% if obj.rd_image == "ad9361" %} - ![Reference Design](../assets/rd_ad9361_custom.svg) +```{figure} /_static/assets/rd_ad9361_custom.svg {% elif obj.rd_image == "adrv9001" %} - ![Reference Design](../assets/rd_adrv9001_custom.svg) +```{figure} /_static/assets/rd_adrv9001_custom.svg {% elif obj.rd_image == "jesd" %} - ![Reference Design](../assets/rd_jesd_custom.svg) +```{figure} /_static/assets/rd_jesd_custom.svg {% endif %} -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
+HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation. +``` + The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. ## HDL Worflow Advisor Port Mappings diff --git a/CI/gen_doc/docs/_templates/sysobj.html b/CI/doc/gen_pages/_templates/sysobj.html similarity index 80% rename from CI/gen_doc/docs/_templates/sysobj.html rename to CI/doc/gen_pages/_templates/sysobj.html index 7ee4f18c..c25d48ea 100644 --- a/CI/gen_doc/docs/_templates/sysobj.html +++ b/CI/doc/gen_pages/_templates/sysobj.html @@ -1,5 +1,5 @@ -{% include 'header.tmpl' %} {% block content %} +# {{ obj.name }} + +```{eval-rst} +.. toctree:: + :maxdepth: 1 + + _generated/hdlrefdesigns/adrv9361z7035 + _generated/hdlrefdesigns/adrv9364z7020 + _generated/hdlrefdesigns/pluto + _generated/hdlrefdesigns/fmcomms2 + _generated/hdlrefdesigns/fmcomms5 + _generated/hdlrefdesigns/adrv9371 + _generated/hdlrefdesigns/adrv9002 + _generated/hdlrefdesigns/adrv9009 + _generated/hdlrefdesigns/fmcomms8 + +``` + + + +Click on left table of contents for individual component pages. \ No newline at end of file diff --git a/CI/doc/source/conf.py b/CI/doc/source/conf.py new file mode 100644 index 00000000..d1dc5603 --- /dev/null +++ b/CI/doc/source/conf.py @@ -0,0 +1,146 @@ +# Configuration file for the Sphinx documentation builder. +# +# This file only contains a selection of the most common options. For a full +# list see the documentation: +# http://www.sphinx-doc.org/en/master/config + +# -- Path setup -------------------------------------------------------------- + +# If extensions (or modules to document with autodoc) are in another directory, +# add these directories to sys.path here. If the directory is relative to the +# documentation root, use os.path.abspath to make it absolute, like shown here. +# +import contextlib +import os +import shutil +import sys +from typing import List + +sys.path.insert(0, os.path.abspath("../..")) +sys.setrecursionlimit(1500) + +# Move logos over to doc directory +p = os.path.join("_static", "logos") +if not os.path.exists(p): + os.mkdir("_static/logos") + +for filename in os.listdir(os.path.join("..", "..", "..", "logos")): + if filename.endswith(".png"): + shutil.copy( + os.path.join("..", "..", "..", "logos", filename), + os.path.join("_static", "logos", filename), + ) + fn = os.path.join("_static", "logos", filename) + from PIL import Image + + im = Image.open(fn) + # Remove left 30% of image + #im = im.crop((int(im.size[0] * 0.45), 0, int(im.size[0] * 1), im.size[1])) + im = im.crop((int(im.size[0] * 0.32), 0, int(im.size[0] * 1), im.size[1])) + im.save(fn.replace(".png", "_cropped.png")) + + +# -- Project information ----------------------------------------------------- + +project = "Analog Devices, Inc. Transceiver Toolbox" +copyright = "2019-2022, Analog Devices, Inc" +author = "Analog Devices, Inc." + +# The full version, including alpha/beta/rc tags +release = "v22.2.1" + + +# -- General configuration --------------------------------------------------- + +# The master toctree document. +master_doc = "index" + +# Add any Sphinx extension module names here, as strings. They can be +# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom +# ones. +extensions = [ + # "sphinx.ext.autodoc", + "sphinx.ext.coverage", + "sphinx.ext.githubpages", + "myst_parser", + "sphinx_favicon", + "sphinxcontrib.mermaid", + # "sphinx_copybutton", + # "sphinx_togglebutton", # Using this? + "sphinx_design", +] + +myst_enable_extensions = [ + "colon_fence", +] + +# Add any paths that contain templates here, relative to this directory. +templates_path = ["_templates"] + +# List of patterns, relative to source directory, that match files and +# directories to ignore when looking for source files. +# This pattern also affects html_static_path and html_extra_path. +exclude_patterns: List[str] = [] + +# Configuration of sphinx.ext.coverage +#coverage_show_missing_items = True + +# -- Options for HTML output ------------------------------------------------- + +# The theme to use for HTML and HTML Help pages. See the documentation for +# a list of builtin themes. +# +html_theme = "furo" + +html_title = f"{project} {release}" +#favicons = ["favicon.png"] + +# Add any paths that contain custom static files (such as style sheets) here, +# relative to this directory. They are copied after the builtin static files, +# so a file named "default.css" will overwrite the builtin "default.css". +html_static_path = ["_static"] + +html_css_files = [ + "css/style.css", +] + +html_theme_options = { + "light_logo": os.path.join("logos", "logo_black_cropped.png"), + "dark_logo": os.path.join("logos", "logo_white_cropped.png"), + "dark_css_variables": { + "color-sidebar-item-background--current": "white", + "color-sidebar-link-text": "white", + "color-sidebar-link-text--top-level": "white", + }, + "light_css_variables": { + "color-sidebar-item-background--current": "black", + "color-sidebar-link-text": "black", + "color-sidebar-link-text--top-level": "black", + }, +} + +if os.getenv("DEV_BUILD"): + branch = os.getenv("GIT_BRANCH") + if branch is None: + with contextlib.suppress(Exception): + # Try to get branch from git + import subprocess + + branch = ( + subprocess.run( + args=["git", "rev-parse", "--abbrev-ref", "HEAD"], + capture_output=True, + ) + .stdout.decode("utf-8") + .strip() + ) + if branch is None: + branch = "_UNKNOWN_" # type: ignore + html_theme_options["announcement"] = ( + "WARNING: This is a development \ + build of branch: " + + branch + + ". Please use the latest stable release." + ) + html_theme_options["dark_css_variables"]["color-announcement-text"] = "red" + html_theme_options["light_css_variables"]["color-announcement-text"] = "red" diff --git a/CI/gen_doc/docs/_pages/dev_hdl_workflow.md b/CI/doc/source/dev_hdl_workflow.md similarity index 90% rename from CI/gen_doc/docs/_pages/dev_hdl_workflow.md rename to CI/doc/source/dev_hdl_workflow.md index d616b0b5..b372ff42 100644 --- a/CI/gen_doc/docs/_pages/dev_hdl_workflow.md +++ b/CI/doc/source/dev_hdl_workflow.md @@ -1,6 +1,8 @@ # HDL Workflow -!!! warning This content is meant for developers or advanced users and is not meant for general consumption. +:::{warning} +This content is meant for developers or advanced users and is not meant for general consumption. +::: This page discusses the HDL targeting support from the perspective of the HDL source repo and HDL-Coder itself. It is not necessary for users to understand these details but for those managing the toolbox or developers extending support to new platforms this information is valuable. @@ -25,7 +27,7 @@ HDL-Coder is limited to only interact with Vivado or Quartus. Therefore, it cann The orchestration of Vivado and calling of specific TCL scripts is managed through MathWork's [HWA](https://www.mathworks.com/help/hdlcoder/ug/overview-of-workflows-in-hdl-workflow-advisor.html). HWA generates HDL (Verilog is currently the only supported language) for specific Simulink blocks, calls a number of TCL scripts maintained by ADI to build a project and make room for IP, then inserts that IP and calls synthesis. This will be discussed from HWA and the generated scripts it creates. This is detailed from the scripting perspective first in the figure below: -``` mermaid +```{mermaid} graph LR A[1. Generate Verilog
From Simulink IP]-->B[2. Optional: Pre-Build
Project Script]; subgraph SS[vivado_create_prj.tcl] @@ -46,17 +48,18 @@ style D fill:#FF0,stroke:#333,stroke-width:4px,stroke-dasharray: 5 5 At a high-level there are six main steps, two of which are optional. From the far left stage "Generate Verilog From Simulink IP" occurs in Stage 3 "HDL Code Generation" within HWA as outlined in red below. This will create Verilog within the defined project folder and then be copied into the full HDL project later on. -
-![](../HWA_verilog_gen.png){ width=80% } -
Figure 2: HDL Workflow Advisor IP verilog generation.
-
+```{figure} /_static/assets/HWA_verilog_gen.png + +HDL Workflow Advisor IP verilog generation. +``` Within the largest central block of the flowchart labeled **vivado_create_prj.tcl** are all the core steps related the HWA Step 4.1, where the reference HDL project folder is built and necessary cores and nets removed to make room for IP from Simulink generated in HWA Step 3. This stage is highlighed in the figure below. The purple boxes are optional stages that are used in certain customized examples when additional work is required to prepare a reference design. The [Frequency Hopping example](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/targeting/frequency-hopping) leverages these stages. Once the project is prepared the IP is inserted and bitstream generated, which occurs through HWA Step 4.3. -
-![](../HWA_project_gen.png){ width=80% } -
Figure 3: HDL Workflow Advisor project generation step.
-
+ +```{figure} /_static/assets/HWA_project_gen.png + +HDL Workflow Advisor project generation step. +``` ### Vivado Project Perspective @@ -65,17 +68,20 @@ Based on the flow in Figure 1, there are a three main states the HDL reference d The first state is just the initial creation of the standard unmodified block design. Looking at Figure 4, the three IPs show the dataflow from the interface core (axi_ad9361), through the ADC FIFO, and finally into the pack core. In orange are the data buses and valid signal highlighted. These are important since the generated IP needs to be inserted where these nets are connected. Therefore, in the second state of the design these nets are removed to make room from the new IP. -
-![](../stock_reference_design.png){ width=80% } -
Figure 4: RX path in unmodified standard reference design.
-
+ +```{figure} /_static/assets/stock_reference_design.png + +RX path in unmodified standard reference design. +``` + + Once the IP is inserted into the project by HDL-Coder it is connected to the FIFO and pack cores where the nets in Figure 4 were highlighted. The new inserted and connected IP can be see in Figure 5. -
-![](../reference_design_with_IP.png){ width=80% } -
Figure 5: RX path with inserted IP from HDL-Coder.
-
+```{figure} /_static/assets/reference_design_with_IP.png + +RX path with inserted IP from HDL-Coder. +``` The connecting of the IPs and insertion are entirely managed by HDL-Coder and through the [add_io_ports](https://github.com/analogdevicesinc/TransceiverToolbox/blob/master/hdl/vendor/AnalogDevices/+AnalogDevices/add_io_ports.m) function and supporting [JSON port definition file](https://github.com/analogdevicesinc/TransceiverToolbox/blob/master/hdl/vendor/AnalogDevices/+AnalogDevices/ports.json). diff --git a/CI/gen_doc/docs/examples.md b/CI/doc/source/examples.md similarity index 100% rename from CI/gen_doc/docs/examples.md rename to CI/doc/source/examples.md index 3674c7c9..9dee6e37 100644 --- a/CI/gen_doc/docs/examples.md +++ b/CI/doc/source/examples.md @@ -9,8 +9,8 @@ doc adi They can also be viewed on GitHub: - - [Targeting examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/streaming) - - [Streaming examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/targeting) + - [Targeting examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/targeting) + - [Streaming examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/streaming) ## Highlighted Demos diff --git a/CI/gen_doc/docs/_pages/index.md b/CI/doc/source/index.md similarity index 76% rename from CI/gen_doc/docs/_pages/index.md rename to CI/doc/source/index.md index e05d9866..59ea15f3 100644 --- a/CI/gen_doc/docs/_pages/index.md +++ b/CI/doc/source/index.md @@ -1,4 +1,3 @@ -{% include 'header.tmpl' %} +
-
@@ -40,4 +42,28 @@ The following have device-specific implementations in MATLAB and Simulink. If a | ADRV9002 | ZCU102 | Yes | Yes | ADI (2020a) | | ADRV9009/8 | ZC706 | Yes | No | ADI (2018b) | | | ZCU102 | Yes | Yes | ADI (2018b) | -| ADRV9009-ZU11EG | | Yes | No | ADI (2020a) | \ No newline at end of file +| ADRV9009-ZU11EG | | Yes | No | ADI (2020a) | + + + +## Sections + +```{eval-rst} +.. toctree:: + :maxdepth: 1 + + install.md + streaming.md + targeting.md + examples.md + objects.md + allrefdesigns.md + +``` + +```{toctree} +:caption: Development + +dev_hdl_workflow.md +``` + diff --git a/CI/gen_doc/docs/_pages/install.md b/CI/doc/source/install.md similarity index 71% rename from CI/gen_doc/docs/_pages/install.md rename to CI/doc/source/install.md index ea7325ef..7f9eef97 100644 --- a/CI/gen_doc/docs/_pages/install.md +++ b/CI/doc/source/install.md @@ -1,4 +1,4 @@ -{% include 'header.tmpl' %} + # Installation ## Dependencies @@ -36,28 +36,32 @@ The Transceiver Toolbox itself can be installed either from: - [MATLAB's Add-On Explorer](https://www.mathworks.com/products/matlab/add-on-explorer.html) - [GitHub Releases page](https://github.com/analogdevicesinc/TransceiverToolbox/releases). -!!! warning "MATLAB Versions" - Before installing Transceiver Toolbox check the [Release Page](https://github.com/analogdevicesinc/TransceiverToolbox/releases) to check for the lasted supported of MATLAB. The latest version is the one which is available in [Add-on Explorer](https://www.mathworks.com/products/matlab/add-on-explorer.html), since Add-On Explorer does not currently support hosting multiple versions. If ypu have an older release of MATLAB, download the MLTBX installer from matching release on the [Release Page](https://github.com/analogdevicesinc/TransceiverToolbox/releases). +:::{admonition} MATLAB Versions +:class: warning + +Before installing Transceiver Toolbox check the [Release Page](https://github.com/analogdevicesinc/TransceiverToolbox/releases) to check for the lasted supported of MATLAB. The latest version is the one which is available in [Add-on Explorer](https://www.mathworks.com/products/matlab/add-on-explorer.html), since Add-On Explorer does not currently support hosting multiple versions. If ypu have an older release of MATLAB, download the MLTBX installer from matching release on the [Release Page](https://github.com/analogdevicesinc/TransceiverToolbox/releases). + +::: ### Add-On Explorer Walkthrough To install the toolbox from within MATLAB using the Add-On Explorer, first launch the Explorer from MATLAB's Home tab: - + Search for the toolbox: - + Select Transceiver Toolbox from results: - + Select add: - + \ No newline at end of file diff --git a/CI/doc/source/objects.md b/CI/doc/source/objects.md new file mode 100644 index 00000000..b588e11b --- /dev/null +++ b/CI/doc/source/objects.md @@ -0,0 +1,50 @@ + +# Hardware Interface APIs + +Available hardware streaming interfaces in HSX Toolbox: + + +```{eval-rst} +.. toctree:: + :maxdepth: 1 + + _generated/sysobjects/adi.AD9361.Tx + _generated/sysobjects/adi.AD9361.Rx + _generated/sysobjects/adi.AD9363.Tx + _generated/sysobjects/adi.AD9363.Rx + _generated/sysobjects/adi.AD9364.Tx + _generated/sysobjects/adi.AD9364.Rx + _generated/sysobjects/adi.AD9371.Tx + _generated/sysobjects/adi.AD9371.Rx + _generated/sysobjects/adi.ADRV9009.Tx + _generated/sysobjects/adi.ADRV9009.Rx + _generated/sysobjects/adi.ADRV9361Z7035.Tx + _generated/sysobjects/adi.ADRV9361Z7035.Rx + _generated/sysobjects/adi.ADRV9364Z7020.Tx + _generated/sysobjects/adi.ADRV9364Z7020.Rx + _generated/sysobjects/adi.ADRV9371.Tx + _generated/sysobjects/adi.ADRV9371.Rx + _generated/sysobjects/adi.FMComms2.Tx + _generated/sysobjects/adi.FMComms2.Rx + _generated/sysobjects/adi.FMComms3.Tx + _generated/sysobjects/adi.FMComms3.Rx + _generated/sysobjects/adi.FMComms4.Tx + _generated/sysobjects/adi.FMComms4.Rx + _generated/sysobjects/adi.PackRF.Tx + _generated/sysobjects/adi.PackRF.Rx + _generated/sysobjects/adi.Pluto.Tx + _generated/sysobjects/adi.Pluto.Rx + _generated/sysobjects/adi.ADRV9002.Tx + _generated/sysobjects/adi.ADRV9002.Rx + _generated/sysobjects/adi.FMComms8.Tx + _generated/sysobjects/adi.FMComms8.Rx + _generated/sysobjects/adi.ADRV9009ZU11EG.Tx + _generated/sysobjects/adi.ADRV9009ZU11EG.Rx + +``` + + + +Click on left table of contents for individual component pages. \ No newline at end of file diff --git a/CI/gen_doc/docs/_pages/streaming.md b/CI/doc/source/streaming.md similarity index 98% rename from CI/gen_doc/docs/_pages/streaming.md rename to CI/doc/source/streaming.md index e2b47357..700be051 100644 --- a/CI/gen_doc/docs/_pages/streaming.md +++ b/CI/doc/source/streaming.md @@ -1,11 +1,11 @@ -{% include 'header.tmpl' %} + # Receiving and Sending Data Remote data streaming to and from hardware is made available through [system object interfaces](https://www.mathworks.com/help/matlab/matlab_prog/what-are-system-objects.html), which are unique for each component or platform. The hardware interfacing system objects provide a since class to both configure a given platform and move data back and forth from the device. Command and control of hardware from MATLAB is accomplished by leveraging the [IIO drivers](https://wiki.analog.com/software/linux/docs/iio/iio) built into the target platform's kernel and [libiio](https://wiki.analog.com/resources/tools-software/linux-software/libiio) which provides remote backends to control drivers across different backends. Backends can be Ethernet, serial, or USB based. Below is a diagram of the different components in the stack for an FMComms based systems, but will be nearly identical for all transceiver based systems. -![MATLAB libiio Stack](assets/MATLAB_libiio_Stack.png) +![MATLAB libiio Stack](/_static/assets/MATLAB_libiio_Stack.png) Since libiio is cross-platform it can be used from Windows, Linux, or macOS based systems. It is also a lower level library independent of MATLAB, so when moving toward production or untethered systems similar APIs that are used in MATLAB can be used in C,C++,Python, or other languages. @@ -23,7 +23,7 @@ With the code above, the hardware is not contacted until the operator or step me The state of the object follows the flow of the diagram below triggered by line line 3 above. -``` mermaid +```{mermaid} graph LR Z[Operator Called] -->A; A[Connect To Board] --> B[Update Properties]; @@ -138,4 +138,3 @@ rx.DDSPhases = [0,90e3,0,90e3,0,0;0,0,0,0]; % Each in millidegrees [0,90000] Each of the above properties must be of size [2x(NumberOfPartDACs)], where each row is the first DDS of a given DAC (column) and the second row is the second DDS of a given DAC (column). - diff --git a/CI/gen_doc/docs/_pages/targeting.md b/CI/doc/source/targeting.md similarity index 91% rename from CI/gen_doc/docs/_pages/targeting.md rename to CI/doc/source/targeting.md index d7652a96..c2ab0792 100644 --- a/CI/gen_doc/docs/_pages/targeting.md +++ b/CI/doc/source/targeting.md @@ -1,13 +1,12 @@ -{% include 'header.tmpl' %} + # HDL Targeting with HDL-Coder Transceiver Toolbox supports the IP Core generation flow from MathWorks which allows for automated integration of DSP into HDL reference designs from Analog Devices. This workflow will take Simulink subsystems, run HDL-Coder to generate source Verilog, and then integrate that into a larger reference design. The figure below is a simplified block diagram of a SoC (Fabric+ARM) device, where specialized IP are inserted into the receive and transmit datapaths. This is supported on specific FPGA families and transceiver based reference designs. This support is based on the Zynq HDL-Coder and support - + ## Recommended Review - [Getting started with Zynq](https://www.mathworks.com/support/search.html/videos/getting-started-with-zynq-80338.html?fq%5B%5D=asset_type_name:video&fq%5B%5D=category:hdlcoder/index&page=1) ## Getting Started - diff --git a/CI/doc/use_local_css.m b/CI/doc/use_local_css.m deleted file mode 100644 index 364780e7..00000000 --- a/CI/doc/use_local_css.m +++ /dev/null @@ -1,10 +0,0 @@ -function use_local_css(html_file) - url_str = 'https://localhost:31515/static/help/includes/product/css/'; - contents = fileread(html_file); - str_loc = strfind(contents, url_str); - contents(str_loc:str_loc+numel(url_str)-1) = []; - - fid = fopen(html_file,'w'); - fprintf(fid, '%s', contents); - fclose(fid); -end \ No newline at end of file diff --git a/CI/gen_doc/Makefile b/CI/gen_doc/Makefile deleted file mode 100644 index 871353d4..00000000 --- a/CI/gen_doc/Makefile +++ /dev/null @@ -1,66 +0,0 @@ -# Usage: -# make MLRELEASE= HDLBRANCH= -# Example -# make build MLRELEASE=R2018b HDLBRANCH=hdl_2018_r1 - -SHELL := /bin/bash - -MLFLAGS := -nodisplay -nodesktop -nosplash - -ifeq ($(MLRELEASE),) -MLRELEASE := R2022b -endif - -ifeq ($(HDLBRANCH),) -HDLBRANCH := hdl_2021_r2 -endif - -ifeq ($(OS),Windows_NT) -MLPATH := /cygdrive/c/Program\ Files/MATLAB -MLFLAGS := $(MLFLAGS) -wait -else -UNAME_S := $(shell uname -s) -ifeq ($(UNAME_S),Linux) -MLPATH := /usr/local/MATLAB -endif -ifeq ($(UNAME_S),Darwin) -MLPATH := /Applications -MLRELEASE := MATLAB_${MLRELEASE}.app -endif -endif - -ifeq ($(BOARD),) -BOARD := -endif - -ifeq ($(INCLUDE_EXAMPLES),) -INCLUDE_EXAMPLES := 1 -endif - -GITTAG := $(shell git describe --tags HEAD) - -.ONESHELL: -doc_ml: - mkdir -p ../../doc ; \ - rm -rf ../../doc ; \ - cd docs ; \ - cp ../../scripts/ports.json . ; \ - cp ../../scripts/read_ports_json.py . ; \ - python3 read_ports_json.py ; \ - MATLAB=ON python3 gen_all_doc.py ; \ - cd .. ; \ - mkdocs build -d doc ; \ - mv doc ../../ - -doc: - mkdir -p ../../doc ; \ - rm -rf ../../doc ; \ - cd docs ; \ - cp ../../scripts/ports.json . ; \ - cp ../../scripts/read_ports_json.py . ; \ - python3 read_ports_json.py ; \ - python3 gen_all_doc.py ; \ - cd .. ; \ - mkdocs build -d doc ; \ - mkdir -p ../../doc ; \ - cp -r doc/* ../../doc/ ; \ diff --git a/CI/gen_doc/docs/_pages/examples.md b/CI/gen_doc/docs/_pages/examples.md deleted file mode 100644 index ec053c52..00000000 --- a/CI/gen_doc/docs/_pages/examples.md +++ /dev/null @@ -1,22 +0,0 @@ -{% include 'header.tmpl' %} -# Examples - -Examples for streaming data and targeting FPGAs are listed within the Toolbox documentation itself. To view run the following with MATLAB: - -``` -doc adi -``` - -They can also be viewed on GitHub: - - - [Targeting examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/targeting) - - [Streaming examples](https://github.com/analogdevicesinc/TransceiverToolbox/tree/master/trx_examples/streaming) - -## Highlighted Demos - -Certain examples have full articles that discuss different applications - -- [Frequency hopping](https://wiki.analog.com/resources/eval/user-guides/adrv936x_rfsom/tutorials/frequency_hopping) -- [Loopback delay estimation](https://wiki.analog.com/resources/eval/user-guides/adrv936x_rfsom/tutorials/loopback_delay_estimation) -- [AGC Optimization](https://wiki.analog.com/resources/eval/user-guides/ad9361_agc_tuning) -- [Pluto LTE App](https://wiki.analog.com/resources/tools-software/transceiver-toolbox/examples/pluto_lte_app) diff --git a/CI/gen_doc/docs/_pages/toc.tmpl b/CI/gen_doc/docs/_pages/toc.tmpl deleted file mode 100644 index 68eb3065..00000000 --- a/CI/gen_doc/docs/_pages/toc.tmpl +++ /dev/null @@ -1,13 +0,0 @@ - - - Analog Devices, Inc Transceiver Toolbox -{%- for page in pages %} - {{ page|capitalize }} -{%- endfor %} - Hardware Interface APIs -{%- for obj in devices %} - {{ obj }} -{%- endfor %} - - - diff --git a/CI/gen_doc/docs/_templates/header.tmpl b/CI/gen_doc/docs/_templates/header.tmpl deleted file mode 100644 index 1ded7471..00000000 --- a/CI/gen_doc/docs/_templates/header.tmpl +++ /dev/null @@ -1,7 +0,0 @@ -{%- if disable_nav -%} ---- -hide: - - navigation - - toc ---- -{%- endif -%} \ No newline at end of file diff --git a/CI/gen_doc/docs/_templates/mkdocs.tmpl b/CI/gen_doc/docs/_templates/mkdocs.tmpl deleted file mode 100644 index eb9816db..00000000 --- a/CI/gen_doc/docs/_templates/mkdocs.tmpl +++ /dev/null @@ -1,65 +0,0 @@ -site_name: Analog Devices, Inc. Transceiver Toolbox - -theme: - logo: assets/matlab_white_icon.svg - favicon: assets/matlab_white_icon.svg - name: material - palette: - - scheme: default - primary: blue - toggle: - icon: material/toggle-switch-off-outline - name: Switch to dark mode - - scheme: slate - primary: blue - toggle: - icon: material/toggle-switch - name: Switch to light mode - -nav: - - Overview: index.md - - Installation: install.md - - Data Streaming: streaming.md - - HDL Targeting: targeting.md - - Examples: examples.md - - Reference API: - - HDL Reference Designs: -{%- for design in designs %} - - {{ design }}: {{ designs[design] }} -{%- endfor %} - - Device Interfaces: -{%- for dev in devices %} - - {{ dev }}: {{ devices[dev] }} -{%- endfor %} - - Developers: - - HDL Workflow: dev_hdl_workflow.md - - -extra_css: - - stylesheets/style.css - - stylesheets/rd_style.css - -extra_javascript: - - js/sys_objects.js - -plugins: - - search - - awesome-pages - - mermaid2 - - inline-svg - -markdown_extensions: - - attr_list - - md_in_html - - admonition - - pymdownx.details - - pymdownx.highlight: - anchor_linenums: true - - pymdownx.inlinehilite - - pymdownx.snippets - - pymdownx.superfences: - # make exceptions to highlighting of code: - custom_fences: - - name: mermaid - class: mermaid - format: !!python/name:mermaid2.fence_mermaid \ No newline at end of file diff --git a/CI/gen_doc/docs/gen_all_doc.py b/CI/gen_doc/docs/gen_all_doc.py deleted file mode 100644 index 0ff1be82..00000000 --- a/CI/gen_doc/docs/gen_all_doc.py +++ /dev/null @@ -1,10 +0,0 @@ -from gen_md_pages import gen_pages_and_toc -from gen_sysobj_pages import gen_sys_obj_pages -from gen_rd_svg import gen_rd_svg -import os - -if __name__ == "__main__": - gen_rd_svg() - matlab = bool(os.environ.get("MATLAB")) - devices, designs = gen_sys_obj_pages(matlab) - gen_pages_and_toc(matlab, devices, designs) diff --git a/CI/gen_doc/docs/gen_md_pages.py b/CI/gen_doc/docs/gen_md_pages.py deleted file mode 100644 index fc3fa9f5..00000000 --- a/CI/gen_doc/docs/gen_md_pages.py +++ /dev/null @@ -1,59 +0,0 @@ -from jinja2 import Environment, FileSystemLoader -import os -from os import listdir - -# output_folder = "output" - -# if not os.path.exists(output_folder): -# os.makedirs(output_folder) - - -def gen_page(template_filename, disable_nav): - # Import template - loc = os.path.dirname(__file__) - loc = os.path.join(loc, "_pages") - print(loc) - file_loader = FileSystemLoader(loc) - env = Environment(loader=file_loader) - - template = env.get_template(template_filename) - - output = template.render(disable_nav=disable_nav) - - with open(template_filename, "w") as f: - f.write(output) - - -def gen_toc(pages, devices, designs): - # Import template - loc = os.path.dirname(__file__) - loc = os.path.join(loc, "_pages") - file_loader = FileSystemLoader(loc) - env = Environment(loader=file_loader) - - template = env.get_template("toc.tmpl") - - output = template.render(pages=pages, devices=devices, designs=designs) - - loc = os.path.dirname(__file__) - loc = os.path.join(loc, "helptoc.xml") - - with open(loc, "w") as f: - f.write(output) - - -def gen_pages_and_toc(matlab, devices, designs): - - template_filenames = listdir("_pages") - - pages = [] - for template_filename in template_filenames: - if matlab and template_filename == "models.md": - continue - if template_filename in ["header.tmpl", "toc.tmpl"]: - continue - gen_page(template_filename, matlab) - template_filename = template_filename.replace(".md", "") - pages.append(template_filename) - - gen_toc(pages, devices, designs) diff --git a/CI/gen_doc/docs/hdlrefdesigns/adrv9002.md b/CI/gen_doc/docs/hdlrefdesigns/adrv9002.md deleted file mode 100644 index 69ecaa99..00000000 --- a/CI/gen_doc/docs/hdlrefdesigns/adrv9002.md +++ /dev/null @@ -1,53 +0,0 @@ - - - -# adrv9002 Reference Design Integration - -This page outlines the HDL reference design integration for the *adrv9002* reference design for the Analog Devices -ADRV9002 component. The IP-Core Generation follow is available on the based on the following base HDL reference design for the following board and design variants: - -- [Base reference design documentation](https://wiki.analog.com/resources/eval/user-guides/adrv9001/reference_hdl) -- Supported FPGA carriers: - - ZCU102 -- Supported design variants: - - RX - - TX - - RX & TX - -## Reference Design - -
- - ![Reference Design](../assets/rd_adrv9001_custom.svg) - -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
-The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. - -## HDL Worflow Advisor Port Mappings - -When using the HDL Worflow Advisor, the following port mappings are used to connect the reference design to the HDL-Coder generated IP-Core: - -| Type | Target Platform Interface (MATLAB) | Reference Design Connection (Vivado) | Width | Reference Design Variant | -| ---- | ------------------------ | --------------------------- | ----- | ----------- | -| VALID-OUT | IP Data Valid OUT | util_adc_1_pack/fifo_wr_en | 1 | RX | -| VALID-IN | IP Valid Rx Data IN | axi_adrv9001/adc_1_valid_i0 | 1 | RX | -| DATA-OUT | IP Data 0 OUT | util_adc_1_pack/fifo_wr_data_0 | 16 | RX | -| DATA-OUT | IP Data 1 OUT | util_adc_1_pack/fifo_wr_data_1 | 16 | RX | -| DATA-OUT | IP Data 2 OUT | util_adc_1_pack/fifo_wr_data_2 | 16 | RX | -| DATA-OUT | IP Data 3 OUT | util_adc_1_pack/fifo_wr_data_3 | 16 | RX | -| DATA-IN | ADRV9002 ADC Data Q0 | axi_adrv9001/adc_1_data_i0 | 16 | RX | -| DATA-IN | ADRV9002 ADC Data I0 | axi_adrv9001/adc_1_data_i1 | 16 | RX | -| DATA-IN | ADRV9002 ADC Data Q0 | axi_adrv9001/adc_1_data_q0 | 16 | RX | -| DATA-IN | ADRV9002 ADC Data I0 | axi_adrv9001/adc_1_data_q1 | 16 | RX | -| VALID-IN | IP Valid Tx Data IN | util_dac_1_upack/fifo_rd_valid | 1 | TX | -| VALID-OUT | IP Load Tx Data OUT | util_dac_1_upack/fifo_rd_en | 1 | TX | -| DATA-OUT | ADRV9002 DAC Data Q0 | axi_adrv9001/dac_1_data_i0 | 16 | TX | -| DATA-OUT | ADRV9002 DAC Data I0 | axi_adrv9001/dac_1_data_i1 | 16 | TX | -| DATA-OUT | ADRV9002 DAC Data Q0 | axi_adrv9001/dac_1_data_q0 | 16 | TX | -| DATA-OUT | ADRV9002 DAC Data I0 | axi_adrv9001/dac_1_data_q1 | 16 | TX | -| DATA-IN | IP Data 0 IN | util_dac_1_upack/fifo_rd_data_0 | 16 | TX | -| DATA-IN | IP Data 1 IN | util_dac_1_upack/fifo_rd_data_1 | 16 | TX | -| DATA-IN | IP Data 2 IN | util_dac_1_upack/fifo_rd_data_2 | 16 | TX | -| DATA-IN | IP Data 3 IN | util_dac_1_upack/fifo_rd_data_3 | 16 | TX | - diff --git a/CI/gen_doc/docs/hdlrefdesigns/adrv9009.md b/CI/gen_doc/docs/hdlrefdesigns/adrv9009.md deleted file mode 100644 index b6d94062..00000000 --- a/CI/gen_doc/docs/hdlrefdesigns/adrv9009.md +++ /dev/null @@ -1,53 +0,0 @@ - - - -# adrv9009 Reference Design Integration - -This page outlines the HDL reference design integration for the *adrv9009* reference design for the Analog Devices -ADRV9009 component. The IP-Core Generation follow is available on the based on the following base HDL reference design for the following board and design variants: - -- [Base reference design documentation](https://wiki.analog.com/resources/eval/user-guides/adrv9009/reference_hdl) -- Supported FPGA carriers: - - ZCU102 -- Supported design variants: - - RX - - TX - - RX & TX - -## Reference Design - -
- - ![Reference Design](../assets/rd_jesd_custom.svg) - -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
-The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. - -## HDL Worflow Advisor Port Mappings - -When using the HDL Worflow Advisor, the following port mappings are used to connect the reference design to the HDL-Coder generated IP-Core: - -| Type | Target Platform Interface (MATLAB) | Reference Design Connection (Vivado) | Width | Reference Design Variant | -| ---- | ------------------------ | --------------------------- | ----- | ----------- | -| VALID-OUT | IP Data Valid OUT | util_adrv9009_rx_cpack/fifo_wr_en | 1 | RX | -| VALID-IN | IP Valid Rx Data IN | rx_adrv9009_tpl_core/adc_valid_0 | 1 | RX | -| DATA-OUT | IP Data 0 OUT | util_adrv9009_rx_cpack/fifo_wr_data_0 | 16 | RX | -| DATA-OUT | IP Data 1 OUT | util_adrv9009_rx_cpack/fifo_wr_data_1 | 16 | RX | -| DATA-OUT | IP Data 2 OUT | util_adrv9009_rx_cpack/fifo_wr_data_2 | 16 | RX | -| DATA-OUT | IP Data 3 OUT | util_adrv9009_rx_cpack/fifo_wr_data_3 | 16 | RX | -| DATA-IN | ADRV9009 ADC Data Q0 | rx_adrv9009_tpl_core/adc_data_0 | 16 | RX | -| DATA-IN | ADRV9009 ADC Data I0 | rx_adrv9009_tpl_core/adc_data_1 | 16 | RX | -| DATA-IN | ADRV9009 ADC Data Q1 | rx_adrv9009_tpl_core/adc_data_2 | 16 | RX | -| DATA-IN | ADRV9009 ADC Data I1 | rx_adrv9009_tpl_core/adc_data_3 | 16 | RX | -| VALID-IN | IP Valid Tx Data IN | util_adrv9009_tx_upack/fifo_rd_valid | 1 | TX | -| VALID-OUT | IP Load Tx Data OUT | util_adrv9009_tx_upack/fifo_rd_en | 1 | TX | -| DATA-OUT | ADRV9009 DAC Data Q0 | tx_adrv9009_tpl_core/dac_data_0 | 16 | TX | -| DATA-OUT | ADRV9009 DAC Data I0 | tx_adrv9009_tpl_core/dac_data_1 | 16 | TX | -| DATA-OUT | ADRV9009 DAC Data Q1 | tx_adrv9009_tpl_core/dac_data_2 | 16 | TX | -| DATA-OUT | ADRV9009 DAC Data I1 | tx_adrv9009_tpl_core/dac_data_3 | 16 | TX | -| DATA-IN | IP Data 0 IN | util_adrv9009_tx_upack/fifo_rd_data_0 | 16 | TX | -| DATA-IN | IP Data 1 IN | util_adrv9009_tx_upack/fifo_rd_data_1 | 16 | TX | -| DATA-IN | IP Data 2 IN | util_adrv9009_tx_upack/fifo_rd_data_2 | 16 | TX | -| DATA-IN | IP Data 3 IN | util_adrv9009_tx_upack/fifo_rd_data_3 | 16 | TX | - diff --git a/CI/gen_doc/docs/hdlrefdesigns/adrv9361z7035.md b/CI/gen_doc/docs/hdlrefdesigns/adrv9361z7035.md deleted file mode 100644 index 176e434e..00000000 --- a/CI/gen_doc/docs/hdlrefdesigns/adrv9361z7035.md +++ /dev/null @@ -1,57 +0,0 @@ - - - -# adrv9361z7035 Reference Design Integration - -This page outlines the HDL reference design integration for the *adrv9361z7035* reference design for the Analog Devices -AD9361 component. The IP-Core Generation follow is available on the based on the following base HDL reference design for the following board and design variants: - -- [Base reference design documentation](https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/reference_hdl) -- Supported FPGA carriers: - - CCBOB_CMOS - - CCBOB_LVDS - - CCBOX_LVDS - - CCFMC_LVDS - - CCPACKRF_LVDS -- Supported design variants: - - RX - - TX - - RX & TX - -## Reference Design - -
- - ![Reference Design](../assets/rd_ad9361_custom.svg) - -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
-The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. - -## HDL Worflow Advisor Port Mappings - -When using the HDL Worflow Advisor, the following port mappings are used to connect the reference design to the HDL-Coder generated IP-Core: - -| Type | Target Platform Interface (MATLAB) | Reference Design Connection (Vivado) | Width | Reference Design Variant | -| ---- | ------------------------ | --------------------------- | ----- | ----------- | -| VALID-OUT | IP Data Valid OUT | util_ad9361_adc_pack/fifo_wr_en | 1 | RX | -| VALID-IN | IP Valid Rx Data IN | util_ad9361_adc_fifo/dout_valid_0 | 1 | RX | -| DATA-OUT | IP Data 0 OUT | util_ad9361_adc_pack/fifo_wr_data_0 | 16 | RX | -| DATA-OUT | IP Data 1 OUT | util_ad9361_adc_pack/fifo_wr_data_1 | 16 | RX | -| DATA-OUT | IP Data 2 OUT | util_ad9361_adc_pack/fifo_wr_data_2 | 16 | RX | -| DATA-OUT | IP Data 3 OUT | util_ad9361_adc_pack/fifo_wr_data_3 | 16 | RX | -| DATA-IN | AD9361 ADC Data Q0 | util_ad9361_adc_fifo/dout_data_0 | 16 | RX | -| DATA-IN | AD9361 ADC Data I0 | util_ad9361_adc_fifo/dout_data_1 | 16 | RX | -| DATA-IN | AD9361 ADC Data Q1 | util_ad9361_adc_fifo/dout_data_2 | 16 | RX | -| DATA-IN | AD9361 ADC Data I1 | util_ad9361_adc_fifo/dout_data_3 | 16 | RX | -| VALID-IN | IP Valid Tx Data IN | util_ad9361_dac_upack/fifo_rd_valid | 1 | TX | -| VALID-OUT | IP Load Tx Data OUT | axi_ad9361_dac_fifo/din_valid_in_0 | 1 | TX | -| DATA-OUT | AD9361 DAC Data Q0 | axi_ad9361_dac_fifo/din_data_0 | 16 | TX | -| DATA-OUT | AD9361 DAC Data I0 | axi_ad9361_dac_fifo/din_data_1 | 16 | TX | -| DATA-OUT | AD9361 DAC Data Q1 | axi_ad9361_dac_fifo/din_data_2 | 16 | TX | -| DATA-OUT | AD9361 DAC Data I1 | axi_ad9361_dac_fifo/din_data_3 | 16 | TX | -| DATA-IN | IP Data 0 IN | util_ad9361_dac_upack/fifo_rd_data_0 | 16 | TX | -| DATA-IN | IP Data 1 IN | util_ad9361_dac_upack/fifo_rd_data_1 | 16 | TX | -| DATA-IN | IP Data 2 IN | util_ad9361_dac_upack/fifo_rd_data_2 | 16 | TX | -| DATA-IN | IP Data 3 IN | util_ad9361_dac_upack/fifo_rd_data_3 | 16 | TX | - diff --git a/CI/gen_doc/docs/hdlrefdesigns/adrv9364z7020.md b/CI/gen_doc/docs/hdlrefdesigns/adrv9364z7020.md deleted file mode 100644 index e2faa678..00000000 --- a/CI/gen_doc/docs/hdlrefdesigns/adrv9364z7020.md +++ /dev/null @@ -1,55 +0,0 @@ - - - -# adrv9364z7020 Reference Design Integration - -This page outlines the HDL reference design integration for the *adrv9364z7020* reference design for the Analog Devices -AD9364 component. The IP-Core Generation follow is available on the based on the following base HDL reference design for the following board and design variants: - -- [Base reference design documentation](https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/reference_hdl) -- Supported FPGA carriers: - - CCBOB_CMOS - - CCBOB_LVDS - - CCBOX_LVDS -- Supported design variants: - - RX - - TX - - RX & TX - -## Reference Design - -
- - ![Reference Design](../assets/rd_ad9361_custom.svg) - -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
-The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. - -## HDL Worflow Advisor Port Mappings - -When using the HDL Worflow Advisor, the following port mappings are used to connect the reference design to the HDL-Coder generated IP-Core: - -| Type | Target Platform Interface (MATLAB) | Reference Design Connection (Vivado) | Width | Reference Design Variant | -| ---- | ------------------------ | --------------------------- | ----- | ----------- | -| VALID-OUT | IP Data Valid OUT | util_ad9361_adc_pack/fifo_wr_en | 1 | RX | -| VALID-IN | IP Valid Rx Data IN | util_ad9361_adc_fifo/dout_valid_0 | 1 | RX | -| DATA-OUT | IP Data 0 OUT | util_ad9361_adc_pack/fifo_wr_data_0 | 16 | RX | -| DATA-OUT | IP Data 1 OUT | util_ad9361_adc_pack/fifo_wr_data_1 | 16 | RX | -| DATA-OUT | IP Data 2 OUT | util_ad9361_adc_pack/fifo_wr_data_2 | 16 | RX | -| DATA-OUT | IP Data 3 OUT | util_ad9361_adc_pack/fifo_wr_data_3 | 16 | RX | -| DATA-IN | AD9364 ADC Data Q0 | util_ad9361_adc_fifo/dout_data_0 | 16 | RX | -| DATA-IN | AD9364 ADC Data I0 | util_ad9361_adc_fifo/dout_data_1 | 16 | RX | -| DATA-IN | AD9364 ADC Data Q1 | util_ad9361_adc_fifo/dout_data_2 | 16 | RX | -| DATA-IN | AD9364 ADC Data I1 | util_ad9361_adc_fifo/dout_data_3 | 16 | RX | -| VALID-IN | IP Valid Tx Data IN | util_ad9361_dac_upack/fifo_rd_valid | 1 | TX | -| VALID-OUT | IP Load Tx Data OUT | axi_ad9361_dac_fifo/din_valid_in_0 | 1 | TX | -| DATA-OUT | AD9364 DAC Data Q0 | axi_ad9361_dac_fifo/din_data_0 | 16 | TX | -| DATA-OUT | AD9364 DAC Data I0 | axi_ad9361_dac_fifo/din_data_1 | 16 | TX | -| DATA-OUT | AD9364 DAC Data Q1 | axi_ad9361_dac_fifo/din_data_2 | 16 | TX | -| DATA-OUT | AD9364 DAC Data I1 | axi_ad9361_dac_fifo/din_data_3 | 16 | TX | -| DATA-IN | IP Data 0 IN | util_ad9361_dac_upack/fifo_rd_data_0 | 16 | TX | -| DATA-IN | IP Data 1 IN | util_ad9361_dac_upack/fifo_rd_data_1 | 16 | TX | -| DATA-IN | IP Data 2 IN | util_ad9361_dac_upack/fifo_rd_data_2 | 16 | TX | -| DATA-IN | IP Data 3 IN | util_ad9361_dac_upack/fifo_rd_data_3 | 16 | TX | - diff --git a/CI/gen_doc/docs/hdlrefdesigns/adrv9371.md b/CI/gen_doc/docs/hdlrefdesigns/adrv9371.md deleted file mode 100644 index b355eccd..00000000 --- a/CI/gen_doc/docs/hdlrefdesigns/adrv9371.md +++ /dev/null @@ -1,53 +0,0 @@ - - - -# adrv9371 Reference Design Integration - -This page outlines the HDL reference design integration for the *adrv9371* reference design for the Analog Devices -AD9371 component. The IP-Core Generation follow is available on the based on the following base HDL reference design for the following board and design variants: - -- [Base reference design documentation](https://wiki.analog.com/resources/eval/user-guides/mykonos/reference_hdl) -- Supported FPGA carriers: - - ZC706 - - ZCU102 -- Supported design variants: - - RX - - TX - -## Reference Design - -
- - ![Reference Design](../assets/rd_jesd_custom.svg) - -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
-The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. - -## HDL Worflow Advisor Port Mappings - -When using the HDL Worflow Advisor, the following port mappings are used to connect the reference design to the HDL-Coder generated IP-Core: - -| Type | Target Platform Interface (MATLAB) | Reference Design Connection (Vivado) | Width | Reference Design Variant | -| ---- | ------------------------ | --------------------------- | ----- | ----------- | -| VALID-OUT | IP Data Valid OUT | util_ad9371_rx_cpack/fifo_wr_en | 1 | RX | -| VALID-IN | IP Valid Rx Data IN | rx_ad9371_tpl_core/adc_valid_0 | 1 | RX | -| DATA-OUT | IP Data 0 OUT | util_ad9361_adc_pack/fifo_wr_data_0 | 16 | RX | -| DATA-OUT | IP Data 1 OUT | util_ad9361_adc_pack/fifo_wr_data_1 | 16 | RX | -| DATA-OUT | IP Data 2 OUT | util_ad9361_adc_pack/fifo_wr_data_2 | 16 | RX | -| DATA-OUT | IP Data 3 OUT | util_ad9361_adc_pack/fifo_wr_data_3 | 16 | RX | -| DATA-IN | AD9371 ADC Data Q0 | rx_ad9371_tpl_core/adc_data_0 | 16 | RX | -| DATA-IN | AD9371 ADC Data I0 | rx_ad9371_tpl_core/adc_data_1 | 16 | RX | -| DATA-IN | AD9371 ADC Data Q1 | rx_ad9371_tpl_core/adc_data_2 | 16 | RX | -| DATA-IN | AD9371 ADC Data I1 | rx_ad9371_tpl_core/adc_data_3 | 16 | RX | -| VALID-IN | IP Valid Tx Data IN | util_ad9371_tx_upack/fifo_rd_valid | 1 | TX | -| VALID-OUT | IP Load Tx Data OUT | util_ad9371_tx_upack/fifo_rd_en | 1 | TX | -| DATA-OUT | AD9371 DAC Data Q0 | tx_ad9371_tpl_core/dac_data_0 | 32 | TX | -| DATA-OUT | AD9371 DAC Data I0 | tx_ad9371_tpl_core/dac_data_1 | 32 | TX | -| DATA-OUT | AD9371 DAC Data Q1 | tx_ad9371_tpl_core/dac_data_2 | 32 | TX | -| DATA-OUT | AD9371 DAC Data I1 | tx_ad9371_tpl_core/dac_data_3 | 32 | TX | -| DATA-IN | IP Data 0 IN | util_ad9371_tx_upack/fifo_rd_data_0 | 32 | TX | -| DATA-IN | IP Data 1 IN | util_ad9371_tx_upack/fifo_rd_data_1 | 32 | TX | -| DATA-IN | IP Data 2 IN | util_ad9371_tx_upack/fifo_rd_data_2 | 32 | TX | -| DATA-IN | IP Data 3 IN | util_ad9371_tx_upack/fifo_rd_data_3 | 32 | TX | - diff --git a/CI/gen_doc/docs/hdlrefdesigns/fmcomms2.md b/CI/gen_doc/docs/hdlrefdesigns/fmcomms2.md deleted file mode 100644 index 1afff9e9..00000000 --- a/CI/gen_doc/docs/hdlrefdesigns/fmcomms2.md +++ /dev/null @@ -1,55 +0,0 @@ - - - -# fmcomms2 Reference Design Integration - -This page outlines the HDL reference design integration for the *fmcomms2* reference design for the Analog Devices -AD9361 component. The IP-Core Generation follow is available on the based on the following base HDL reference design for the following board and design variants: - -- [Base reference design documentation](https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/reference_hdl) -- Supported FPGA carriers: - - ZED - - ZC706 - - ZC702 -- Supported design variants: - - RX - - TX - - RX & TX - -## Reference Design - -
- - ![Reference Design](../assets/rd_ad9361_custom.svg) - -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
-The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. - -## HDL Worflow Advisor Port Mappings - -When using the HDL Worflow Advisor, the following port mappings are used to connect the reference design to the HDL-Coder generated IP-Core: - -| Type | Target Platform Interface (MATLAB) | Reference Design Connection (Vivado) | Width | Reference Design Variant | -| ---- | ------------------------ | --------------------------- | ----- | ----------- | -| VALID-OUT | IP Data Valid OUT | util_ad9361_adc_pack/fifo_wr_en | 1 | RX | -| VALID-IN | IP Valid Rx Data IN | util_ad9361_adc_fifo/dout_valid_0 | 1 | RX | -| DATA-OUT | IP Data 0 OUT | util_ad9361_adc_pack/fifo_wr_data_0 | 16 | RX | -| DATA-OUT | IP Data 1 OUT | util_ad9361_adc_pack/fifo_wr_data_1 | 16 | RX | -| DATA-OUT | IP Data 2 OUT | util_ad9361_adc_pack/fifo_wr_data_2 | 16 | RX | -| DATA-OUT | IP Data 3 OUT | util_ad9361_adc_pack/fifo_wr_data_3 | 16 | RX | -| DATA-IN | AD9361 ADC Data Q0 | util_ad9361_adc_fifo/dout_data_0 | 16 | RX | -| DATA-IN | AD9361 ADC Data I0 | util_ad9361_adc_fifo/dout_data_1 | 16 | RX | -| DATA-IN | AD9361 ADC Data Q1 | util_ad9361_adc_fifo/dout_data_2 | 16 | RX | -| DATA-IN | AD9361 ADC Data I1 | util_ad9361_adc_fifo/dout_data_3 | 16 | RX | -| VALID-IN | IP Valid Tx Data IN | util_ad9361_dac_upack/fifo_rd_valid | 1 | TX | -| VALID-OUT | IP Load Tx Data OUT | axi_ad9361_dac_fifo/din_valid_in_0 | 1 | TX | -| DATA-OUT | AD9361 DAC Data Q0 | axi_ad9361_dac_fifo/din_data_0 | 16 | TX | -| DATA-OUT | AD9361 DAC Data I0 | axi_ad9361_dac_fifo/din_data_1 | 16 | TX | -| DATA-OUT | AD9361 DAC Data Q1 | axi_ad9361_dac_fifo/din_data_2 | 16 | TX | -| DATA-OUT | AD9361 DAC Data I1 | axi_ad9361_dac_fifo/din_data_3 | 16 | TX | -| DATA-IN | IP Data 0 IN | util_ad9361_dac_upack/fifo_rd_data_0 | 16 | TX | -| DATA-IN | IP Data 1 IN | util_ad9361_dac_upack/fifo_rd_data_1 | 16 | TX | -| DATA-IN | IP Data 2 IN | util_ad9361_dac_upack/fifo_rd_data_2 | 16 | TX | -| DATA-IN | IP Data 3 IN | util_ad9361_dac_upack/fifo_rd_data_3 | 16 | TX | - diff --git a/CI/gen_doc/docs/hdlrefdesigns/pluto.md b/CI/gen_doc/docs/hdlrefdesigns/pluto.md deleted file mode 100644 index 55391551..00000000 --- a/CI/gen_doc/docs/hdlrefdesigns/pluto.md +++ /dev/null @@ -1,42 +0,0 @@ - - - -# pluto Reference Design Integration - -This page outlines the HDL reference design integration for the *pluto* reference design for the Analog Devices -AD9361 component. The IP-Core Generation follow is available on the based on the following base HDL reference design for the following board and design variants: - -- [Base reference design documentation](https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/reference_hdl) -- Supported FPGA carriers: -- Supported design variants: - - RX - - TX - -## Reference Design - -
- - ![Reference Design](../assets/rd_ad9361_custom.svg) - -
HDL Reference Design with Custom IP from HDL-Coder. Click on sub-blocks for more documentation.
-
-The IP-Core generation flow will integrate IP generated from Simulink subsystem into an ADI authored reference design. Depending on the FPGA carrier and FMC card or SoM, this will support different IP locations based on the diagram above. - -## HDL Worflow Advisor Port Mappings - -When using the HDL Worflow Advisor, the following port mappings are used to connect the reference design to the HDL-Coder generated IP-Core: - -| Type | Target Platform Interface (MATLAB) | Reference Design Connection (Vivado) | Width | Reference Design Variant | -| ---- | ------------------------ | --------------------------- | ----- | ----------- | -| VALID-OUT | IP Data Valid OUT | cpack/fifo_wr_en | 1 | RX | -| VALID-IN | IP Valid Rx Data IN | axi_ad9361/adc_valid_i0 | 1 | RX | -| DATA-OUT | IP Data 0 OUT | cpack/fifo_wr_data_0 | 16 | RX | -| DATA-OUT | IP Data 1 OUT | cpack/fifo_wr_data_1 | 16 | RX | -| DATA-IN | AD9361 ADC Data Q0 | axi_ad9361/adc_data_i0 | 16 | RX | -| DATA-IN | AD9361 ADC Data Q0 | axi_ad9361/adc_data_q0 | 16 | RX | -| VALID-IN | IP Valid Tx Data IN | tx_upack/fifo_rd_valid | 1 | TX | -| DATA-OUT | AD9361 DAC Data Q0 | axi_ad9361/dac_data_i0 | 16 | TX | -| DATA-OUT | AD9361 DAC Data Q0 | axi_ad9361/dac_data_q0 | 16 | TX | -| DATA-IN | IP Data 0 IN | util_ad9361_dac_upack/fifo_rd_data_0 | 16 | TX | -| DATA-IN | IP Data 1 IN | util_ad9361_dac_upack/fifo_rd_data_1 | 16 | TX | - diff --git a/CI/gen_doc/docs/js/sys_objects.js b/CI/gen_doc/docs/js/sys_objects.js deleted file mode 100644 index 44bcd99a..00000000 --- a/CI/gen_doc/docs/js/sys_objects.js +++ /dev/null @@ -1,43 +0,0 @@ -function collapse(id) { - console.log(id); - var el = document.getElementsByClassName('collapsible-property-' + id); - el[0].classList.toggle("active"); - var elb = el[0]; - - el = document.getElementsByClassName('content-'+id); - // console.log(el); - if (el.length > 0) { - el0 = el[0]; - console.log(el0.style); - console.log("Updating style") - // console.log(el0.style.display) - el0.style.display = (el0.style.display == 'none' ? 'block' : 'none'); - - console.log(elb.style.borderBottomLeftRadius) - elb.style.borderBottomLeftRadius = (el0.style.display == 'none' ? '5px' : '0px'); - // elb.style.borderBottomLeftRadius = (el0.style.display == 'none' ? '0px' : '25px'); - console.log(elb.style.borderBottomLeftRadius) - - el = document.getElementsByClassName('plus-'+id); - el[0].innerHTML = (el0.style.display == 'none' ? '+' : '-'); - - } -} - - -// var coll = document.getElementsByClassName("collapsible-property"); -// var i; - -// for (i = 0; i < coll.length; i++) { -// coll[i].addEventListener("click", function() { -// console.log("CALLED"); -// this.classList.toggle("active"); -// var content = this.nextElementSibling; -// console.log(content); -// if (content.style.display === "block") { -// content.style.display = "none"; -// } else { -// content.style.display = "block"; -// } -// }); -// } \ No newline at end of file diff --git a/CI/gen_doc/docs/stylesheets/style.css b/CI/gen_doc/docs/stylesheets/style.css deleted file mode 100644 index f2662fe3..00000000 --- a/CI/gen_doc/docs/stylesheets/style.css +++ /dev/null @@ -1,86 +0,0 @@ - - - - -[data-md-color-scheme="slate"] { - --prop-box-color: var(--md-code-bg-color); - --logo-light-mode: none; - --logo-dark-mode: block; - --rd-title-color: white; -} - -[data-md-color-scheme="default"] { - --prop-box-color: #f1f1f1; - --prop-box-color: var(--md-default-fg-color--dark); - --logo-light-mode: block; - --logo-dark-mode: none; - --rd-title-color: black; -} - - -.sysobj_desc_title { - border-bottom: 1px solid rgb(153, 153, 153); - margin-bottom: 10px; -} - -.property { - margin: 16px; -} - -/* Style the button that is used to open and close the collapsible content */ -.collapsible-property { - background-color: #eee; - color: #444; - cursor: pointer; - padding: 18px; - width: 100%; - border: rgb(153, 153, 153) 1px solid; - text-align: left; - outline: none; - font-size: 15px; - border-radius: 3px; -} - -/* Add a background color to the button if it is clicked on (add the .active class with JS), and when you move the mouse over it (hover) */ -.active, -.collapsible-property:hover { - background-color: #ccc; -} - -/* Style the collapsible content. Note: hidden by default */ -.content { - padding: 0 18px; - display: none; - overflow: hidden; - background-color: var(--prop-box-color); - border-radius: 0px; - border-bottom-left-radius: 3px; - border-bottom-right-radius: 3px; - border: rgb(153, 153, 153) 1px solid; -} - -.screenshot { - box-shadow: 0px 6px 5px #ccc; - width: 80%; -} - -/* Logo dark/light */ -.dark-logo { - display: var(--logo-light-mode); -} - -.light-logo { - display: var(--logo-dark-mode); -} - -:root { - --md-primary-fg-color: #1E68D8; - --md-primary-fg-color--light: #1E68D8; - --md-primary-fg-color--dark: #1E68D8; -} - -[data-md-color-scheme="blue"] { - --md-primary-fg-color: #1E68D8; - --md-primary-fg-color--light: #1E68D8; - --md-primary-fg-color--dark: #1E68D8; -} \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/.pages b/CI/gen_doc/docs/sysobjects/.pages deleted file mode 100644 index 7835617d..00000000 --- a/CI/gen_doc/docs/sysobjects/.pages +++ /dev/null @@ -1 +0,0 @@ -title: Device Interfaces diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9361.Rx.md b/CI/gen_doc/docs/sysobjects/adi.AD9361.Rx.md deleted file mode 100644 index fe858d5b..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9361.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.AD9361.Rx System object is a signal source that can receive
complex data from the AD9361.

rx = adi.AD9361.Rx;
rx = adi.AD9361.Rx('uri','ip:192.168.2.1');

AD9361 Datasheet

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9361.Rx -dev = adi.AD9361.Rx(Name, Value) -``` - -
Properties
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- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.AD9361.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9361.Tx.md b/CI/gen_doc/docs/sysobjects/adi.AD9361.Tx.md deleted file mode 100644 index a1e5ce1e..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9361.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.AD9361.Tx System object is a signal sink that can tranmsit
complex data from the AD9361.

tx = adi.AD9361.Tx;
tx = adi.AD9361.Tx('uri','ip:192.168.2.1');

AD9361 Datasheet

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9361.Tx -dev = adi.AD9361.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.AD9361.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9363.Rx.md b/CI/gen_doc/docs/sysobjects/adi.AD9363.Rx.md deleted file mode 100644 index 6c8861d2..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9363.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.AD9363.Rx System object is a signal source that can receive
complex data from the AD9364.

rx = adi.AD9363.Rx;
rx = adi.AD9363.Rx('uri','ip:192.168.2.1');

AD9363 Datasheet

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9363.Rx -dev = adi.AD9363.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.AD9363.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9363.Tx.md b/CI/gen_doc/docs/sysobjects/adi.AD9363.Tx.md deleted file mode 100644 index 395e4b8b..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9363.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.AD9363.Tx System object is a signal sink that can
transmit complex data from the AD9364.

tx = adi.AD9363.Tx;
tx = adi.AD9363.Tx('uri','ip:192.168.2.1');

AD9363 Datasheet

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9363.Tx -dev = adi.AD9363.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.AD9363.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9364.Rx.md b/CI/gen_doc/docs/sysobjects/adi.AD9364.Rx.md deleted file mode 100644 index 7537c379..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9364.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.AD9361.Rx System object is a signal source that can receive
complex data from the AD9364.

rx = adi.AD9364.Rx;
rx = adi.AD9364.Rx('uri','ip:192.168.2.1');

AD9364 Datasheet

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9364.Rx -dev = adi.AD9364.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.AD9364.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9364.Tx.md b/CI/gen_doc/docs/sysobjects/adi.AD9364.Tx.md deleted file mode 100644 index e1d0866b..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9364.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.AD9361.Rx System object is a signal sink that can
transmit complex data from the AD9364.

tx = adi.AD9364.Tx;
tx = adi.AD9364.Tx('uri','ip:192.168.2.1');

AD9364 Datasheet

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9364.Tx -dev = adi.AD9364.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

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Example Usage
- -``` - -%% Configure device -tx = adi.adi.AD9364.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9371.Rx.md b/CI/gen_doc/docs/sysobjects/adi.AD9371.Rx.md deleted file mode 100644 index 44817684..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9371.Rx.md +++ /dev/null @@ -1,133 +0,0 @@ - - - - - - - - -
- - The adi.AD9371.Rx System object is a signal source that can receive
complex data from the AD9371.

rx = adi.AD9371.Rx;
rx = adi.AD9371.Rx('uri','ip:192.168.2.1');

AD9371 Datasheet
- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9371.Rx -dev = adi.AD9371.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Rx set up -rx = adi.adi.AD9371.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.AD9371.Tx.md b/CI/gen_doc/docs/sysobjects/adi.AD9371.Tx.md deleted file mode 100644 index 1d306dd1..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.AD9371.Tx.md +++ /dev/null @@ -1,144 +0,0 @@ - - - - - - - - -
- - The adi.AD9371.Tx System object is a signal sink that can tranmsit
complex data from the AD9371.

tx = adi.AD9371.Tx;
tx = adi.AD9371.Tx('uri','ip:192.168.2.1');

AD9371 Datasheet
- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.AD9371.Tx -dev = adi.AD9371.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Configure device -tx = adi.adi.AD9371.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9002.Rx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9002.Rx.md deleted file mode 100644 index 56e03111..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9002.Rx.md +++ /dev/null @@ -1,307 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9002.Rx System object is a signal source that can receive
complex data from the ADRV9002.

rx = adi.ADRV9002.Rx;
rx = adi.ADRV9002.Rx('uri','ip:192.168.2.1');

ADRV9002 Datasheet
- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9002.Rx -dev = adi.ADRV9002.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.ADRV9002.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9002.Tx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9002.Tx.md deleted file mode 100644 index 3d4da106..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9002.Tx.md +++ /dev/null @@ -1,270 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9002.Tx System object is a signal sink that can tranmsit
complex data from the ADRV9002.

tx = adi.ADRV9002.Tx;
tx = adi.ADRV9002.Tx('uri','ip:192.168.2.1');

ADRV9002 Datasheet
- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9002.Tx -dev = adi.ADRV9002.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.ADRV9002.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9009.Rx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9009.Rx.md deleted file mode 100644 index d9163f34..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9009.Rx.md +++ /dev/null @@ -1,169 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9009.Rx System object is a signal source that can receive
complex data from the ADRV9009.

rx = adi.ADRV9009.Rx;
rx = adi.ADRV9009.Rx('uri','ip:192.168.2.1');

ADRV9009 Datasheet
- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9009.Rx -dev = adi.ADRV9009.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.ADRV9009.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9009.Tx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9009.Tx.md deleted file mode 100644 index dd7a3a2e..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9009.Tx.md +++ /dev/null @@ -1,204 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9009.Tx System object is a signal sink that can tranmsit
complex data from the ADRV9009.

tx = adi.ADRV9009.Tx;
tx = adi.ADRV9009.Tx('uri','ip:192.168.2.1');

ADRV9009 Datasheet
- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9009.Tx -dev = adi.ADRV9009.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.ADRV9009.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9361Z7035.Rx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9361Z7035.Rx.md deleted file mode 100644 index a31a2dbc..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9361Z7035.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9361Z7035.Rx System object is a signal source that can
receive complex data from the ADRV9361Z7035.

rx = adi.ADRV9361Z7035.Rx;
rx = adi.ADRV9361Z7035.Rx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9361Z7035.Rx -dev = adi.ADRV9361Z7035.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.ADRV9361Z7035.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9361Z7035.Tx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9361Z7035.Tx.md deleted file mode 100644 index c5db48b0..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9361Z7035.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9361Z7035.Tx System object is a signal source that can
send complex data to the FMComms2.

tx = adi.ADRV9361Z7035.Tx;
tx = adi.ADRV9361Z7035.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9361Z7035.Tx -dev = adi.ADRV9361Z7035.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.ADRV9361Z7035.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9364Z7020.Rx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9364Z7020.Rx.md deleted file mode 100644 index c5940fa6..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9364Z7020.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9364Z7020.Tx System object is a signal source that can
send complex data to the FMComms4.

tx = adi.ADRV9364Z7020.Tx;
tx = adi.ADRV9364Z7020.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9364Z7020.Rx -dev = adi.ADRV9364Z7020.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.ADRV9364Z7020.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9364Z7020.Tx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9364Z7020.Tx.md deleted file mode 100644 index aad50fd4..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9364Z7020.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9364Z7020.Tx System object is a signal sink that can
transmit complex data from the FMComms4.

tx = adi.ADRV9364Z7020.Tx;
tx = adi.ADRV9364Z7020.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9364Z7020.Tx -dev = adi.ADRV9364Z7020.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.ADRV9364Z7020.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9371.Rx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9371.Rx.md deleted file mode 100644 index 830c9a45..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9371.Rx.md +++ /dev/null @@ -1,133 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9371.Rx System object is a signal source that can receive
complex data from the ADRV9371.

rx = adi.AD9371.Rx;
rx = adi.AD9371.Rx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9371.Rx -dev = adi.ADRV9371.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.ADRV9371.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.ADRV9371.Tx.md b/CI/gen_doc/docs/sysobjects/adi.ADRV9371.Tx.md deleted file mode 100644 index 9c81c563..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.ADRV9371.Tx.md +++ /dev/null @@ -1,144 +0,0 @@ - - - - - - - - -
- - The adi.ADRV9371.Tx System object is a signal sink that can send
complex data to the ADRV9371.

tx = adi.AD9371.Tx;
tx = adi.AD9371.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.ADRV9371.Tx -dev = adi.ADRV9371.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.ADRV9371.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.FMComms2.Rx.md b/CI/gen_doc/docs/sysobjects/adi.FMComms2.Rx.md deleted file mode 100644 index a97c13ed..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.FMComms2.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.FMComms2.Rx System object is a signal source that can
receive complex data from the FMComms2.

rx = adi.FMComms2.Rx;
rx = adi.FMComms2.Rx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.FMComms2.Rx -dev = adi.FMComms2.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Rx set up -rx = adi.adi.FMComms2.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.FMComms2.Tx.md b/CI/gen_doc/docs/sysobjects/adi.FMComms2.Tx.md deleted file mode 100644 index 73bca8f0..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.FMComms2.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.FMComms2.Tx System object is a signal source that can
send complex data to the FMComms2.

tx = adi.FMComms2.Tx;
tx = adi.FMComms2.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.FMComms2.Tx -dev = adi.FMComms2.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Configure device -tx = adi.adi.FMComms2.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.FMComms3.Rx.md b/CI/gen_doc/docs/sysobjects/adi.FMComms3.Rx.md deleted file mode 100644 index a70125a4..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.FMComms3.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.FMComms3.Rx System object is a signal source that can
receive complex data from the FMComms2.

rx = adi.FMComms3.Rx;
rx = adi.FMComms3.Rx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.FMComms3.Rx -dev = adi.FMComms3.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Rx set up -rx = adi.adi.FMComms3.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.FMComms3.Tx.md b/CI/gen_doc/docs/sysobjects/adi.FMComms3.Tx.md deleted file mode 100644 index 7bb82856..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.FMComms3.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.FMComms3.Tx System object is a signal source that can
send complex data to the FMComms2.

tx = adi.FMComms3.Tx;
tx = adi.FMComms3.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.FMComms3.Tx -dev = adi.FMComms3.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Configure device -tx = adi.adi.FMComms3.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.FMComms4.Rx.md b/CI/gen_doc/docs/sysobjects/adi.FMComms4.Rx.md deleted file mode 100644 index c7bd5485..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.FMComms4.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.FMComms4.Tx System object is a signal source that can
send complex data to the FMComms4.

tx = adi.FMComms4.Tx;
tx = adi.FMComms4.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.FMComms4.Rx -dev = adi.FMComms4.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.FMComms4.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.FMComms4.Tx.md b/CI/gen_doc/docs/sysobjects/adi.FMComms4.Tx.md deleted file mode 100644 index 706a1993..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.FMComms4.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.FMComms4.Tx System object is a signal sink that can
transmit complex data from the FMComms4.

tx = adi.FMComms4.Tx;
tx = adi.FMComms4.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.FMComms4.Tx -dev = adi.FMComms4.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.FMComms4.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.PackRF.Rx.md b/CI/gen_doc/docs/sysobjects/adi.PackRF.Rx.md deleted file mode 100644 index 2eee1f77..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.PackRF.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
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Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.PackRF.Rx -dev = adi.PackRF.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Rx set up -rx = adi.adi.PackRF.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.PackRF.Tx.md b/CI/gen_doc/docs/sysobjects/adi.PackRF.Tx.md deleted file mode 100644 index b70a387e..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.PackRF.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
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Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.PackRF.Tx -dev = adi.PackRF.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Configure device -tx = adi.adi.PackRF.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.Pluto.Rx.md b/CI/gen_doc/docs/sysobjects/adi.Pluto.Rx.md deleted file mode 100644 index 75a9d6e8..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.Pluto.Rx.md +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - -
- - The adi.Pluto.Tx System object is a signal source that can
send complex data to the Pluto.

tx = adi.Pluto.Tx;
tx = adi.Pluto.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.Pluto.Rx -dev = adi.Pluto.Rx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- -``` - -%% Rx set up -rx = adi.adi.Pluto.Rx.Rx('uri','ip:analog.local'); -rx.CenterFrequency = 1e9; -rx.EnabledChannels = 1; -%% Run -for k=1:10 - valid = false; - while ~valid - [out, valid] = rx(); - end -end - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/adi.Pluto.Tx.md b/CI/gen_doc/docs/sysobjects/adi.Pluto.Tx.md deleted file mode 100644 index c577a5fb..00000000 --- a/CI/gen_doc/docs/sysobjects/adi.Pluto.Tx.md +++ /dev/null @@ -1,162 +0,0 @@ - - - - - - - - -
- - The adi.Pluto.Tx System object is a signal sink that can
transmit complex data from the Pluto.

tx = adi.Pluto.Tx;
tx = adi.Pluto.Tx('uri','ip:192.168.2.1');

Product Page

- - -
- -
Creation
- -The class can be instantiated in the following way with and without property name value pairs. - -```matlab -dev = adi.Pluto.Tx -dev = adi.Pluto.Tx(Name, Value) -``` - -
Properties
- -
- -Unless otherwise indicated, properties are non-tunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. -

-If a property is tunable, you can change its value at any time. -

-For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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Example Usage
- -``` - -%% Configure device -tx = adi.adi.Pluto.Tx; -tx.uri = "ip:analog.local"; -tx.CenterFrequency = 1e9; -tx.DataSource = 'DMA'; -tx.EnableCyclicBuffers = true; -tx.EnabledChannels = 1; -%% Generate tone -amplitude = 2^15; frequency = 0.12e6; -swv1 = dsp.SineWave(amplitude, frequency); -swv1.ComplexOutput = true; -swv1.SamplesPerFrame = 2^14; -swv1.SampleRate = tx.SamplingRate; -y = swv1(); -% Send -tx(y); - -``` \ No newline at end of file diff --git a/CI/gen_doc/docs/sysobjects/output1.md b/CI/gen_doc/docs/sysobjects/output1.md deleted file mode 100644 index 7d992e54..00000000 --- a/CI/gen_doc/docs/sysobjects/output1.md +++ /dev/null @@ -1,308 +0,0 @@ -
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adi.Pluto.Rx
- -
-Receive data from Analog Devices AD9361 transceiver -
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Description
- -
-The comm.SDRRxPluto System object™ is a signal source that receives data from an Analog Devices® ADALM-PLUTO radio. This connection enables you to simulate and develop various software-defined radio applications. - -The following diagram shows the interaction between MATLAB®, the comm.SDRRxPluto System object, and the radio hardware. - -
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Creation
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Properties
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-Unless otherwise indicated, properties are nontunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them. - -If a property is tunable, you can change its value at any time. - -For more information on changing property values, see System Design in MATLAB Using System Objects. - -
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- RF center frequency, specified in Hz as a scalar. The default is 2.4e9. This property is tunable.Help for adi.Pluto.Rx/CenterFrequency is inherited from superclass ADI.AD9361.RX -
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- specified as one of the following: 'slow_attack' — For signals with slowly changing power levels 'fast_attack' — For signals with rapidly changing power levels 'manual' — For setting the gain manually with the Gain property 'hybrid' — For configuring hybrid AGC modeHelp for adi.Pluto.Rx/GainControlModeChannel0 is inherited from superclass ADI.AD9361.RX -
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- Channel 0 gain, specified as a scalar from -3 dB to 71 dB. The acceptable minimum and maximum gain setting depends on the center frequency.Help for adi.Pluto.Rx/GainChannel0 is inherited from superclass ADI.AD9361.RX -
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- specified as one of the following: 'slow_attack' — For signals with slowly changing power levels 'fast_attack' — For signals with rapidly changing power levels 'manual' — For setting the gain manually with the Gain property 'hybrid' — For configuring hybrid AGC modeHelp for adi.Pluto.Rx/GainControlModeChannel1 is inherited from superclass ADI.AD9361.RX -
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- Option to set digital loopback mode, specified as 0, 1 or 2. Allows either to digitally loopback TX data into the RX path or vice versa. Value | Mode --------------------------- 0 | Disable 1 | Digital TX -> Digital RX 2 | RF RX -> RF TX Help for adi.Pluto.Rx/LoopbackMode is inherited from superclass ADI.AD9361.RX -
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- Option to enable quadrature tracking, specified as true or false. When this property is true, IQ imbalance compensation is applied to the input signal.Help for adi.Pluto.Rx/EnableQuadratureTracking is inherited from superclass ADI.AD9361.RX -
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- Option to enable RF DC tracking, specified as true or false. When this property is true, an RF DC blocking filter is applied to the input signal.Help for adi.Pluto.Rx/EnableRFDCTracking is inherited from superclass ADI.AD9361.RX -
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- 'A_BALANCED' 'B_BALANCED' 'C_BALANCED' 'A_N' 'A_P' 'B_N' 'B_P' 'C_N' 'C_P' 'TX_MONITOR1' 'TX_MONITOR2' 'TX_MONITOR1_2'Help for adi.Pluto.Rx/RFPortSelect is inherited from superclass ADI.AD9361.RX -
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- Number of samples per frame, specified as an even positive integer from 2 to 16,777,216. Using values less than 3660 can yield poor performance. -
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- Enable use of custom filter file to set SamplingRate, RFBandwidth, and FIR in datapaths -
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- Hostname or IP address of remote libIIO deviceHelp for adi.Pluto.Rx/uri is inherited from superclass MATLABSHARED.LIBIIO.BASE -
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- If true, connects to libIIO device during simulationHelp for adi.Pluto.Rx/enIO is inherited from superclass MATLABSHARED.LIBIIO.BASE -
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-
-
- - diff --git a/CI/gen_doc/gen_pages.py b/CI/gen_doc/gen_pages.py deleted file mode 100644 index 4eb18d98..00000000 --- a/CI/gen_doc/gen_pages.py +++ /dev/null @@ -1,64 +0,0 @@ -import glob - -# Get list of HTML files -root = "source/_mlpages" -target = "source" - - -files = glob.glob(root + "/**/*.html", recursive=True) -files = sorted(files) - -titles = { - "SysObjsProps": "System Objects and Properties", - "SystemObjects": "System Objects", - "StateMgmt": "State Management", - "ForDevs": "For Developers", -} - -for f in files: - filename = f.split("/")[-1] - rstfile = filename[:-5] + ".rst" - - # Skip - if filename in ["adi_bsp.html", "adi_ttb_home.html"]: - continue - - # Handle devices - if f.split("/")[-2] == "devices": - # Create RST - with open(target + "/" + rstfile, "w") as file: - title = filename[:-4] + "\n" - l = "*" * len(title) + "\n" - file.write(title) - file.write(l) - file.write(".. raw:: html\n") - file.write(f" :file: _mlpages/devices/{filename}\n") - with open(target + "/devices.rst", "a") as file: - file.write(f" {title[:-2]} <{rstfile}>\n") - continue - - # Handle other pages - with open(target + "/" + rstfile, "w") as file: - sfile = filename.split(".")[0] - if sfile in titles.keys(): - title = titles[sfile] + "\n" - else: - title = sfile + "\n" - l = "*" * len(title) + "\n" - file.write(title) - file.write(l) - file.write(".. raw:: html\n") - file.write(f" :file: _mlpages/{filename}\n") - if rstfile in ["ForDevs.rst"]: - continue - with open(target + "/index.rst", "a") as file: - file.write(f" {title[:-1]} <{rstfile}>\n") - -# Add to end -with open(target + "/index.rst", "a") as file: - file.write(f" Devices \n") - -with open(target + "/index.rst", "a") as file: - file.write(f" Developers \n") - - diff --git a/CI/gen_doc/gen_pages.sh b/CI/gen_doc/gen_pages.sh deleted file mode 100644 index c2ccf2b6..00000000 --- a/CI/gen_doc/gen_pages.sh +++ /dev/null @@ -1,14 +0,0 @@ - - -cp source/devices.tmpl source/devices.rst -cp source/index.tmpl source/index.rst - -mkdir -p source/_mlpages/devices -cp ../../doc/*.html source/_mlpages/ -mv source/_mlpages/AD*.html source/_mlpages/devices/ -mv source/_mlpages/FMComms*.html source/_mlpages/devices/ -mv source/_mlpages/Pluto*.html source/_mlpages/devices/ -mv source/_mlpages/Pack*.html source/_mlpages/devices/ - -python3 gen_pages.py -make html diff --git a/CI/scripts/bsp.tmpl b/CI/scripts/bsp.tmpl index 019f6c9e..a25926fc 100644 --- a/CI/scripts/bsp.tmpl +++ b/CI/scripts/bsp.tmpl @@ -8,7 +8,7 @@ Scripts and tools created by ADI to be used with MATLAB and Simulink with ADI transceivers Documentation: https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/matlab_bsp Support: https://ez.analog.com/ - __REPO-ROOT__/CI/doc/ADI_Logo_AWP_Large.png + __REPO-ROOT__/CI/doc/source/_static/assets/ADI_Logo_AWP_Large.png __VERSION__ ${PROJECT_ROOT}/Analog Devices Board Support Packages.mltbx diff --git a/CI/scripts/bsp_noexamples.tmpl b/CI/scripts/bsp_noexamples.tmpl index 8c8b2e1d..e34f347b 100644 --- a/CI/scripts/bsp_noexamples.tmpl +++ b/CI/scripts/bsp_noexamples.tmpl @@ -8,7 +8,7 @@ Scripts and tools created by ADI to be used with MATLAB and Simulink with ADI transceivers Documentation: https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/matlab_bsp Support: https://ez.analog.com/ - __REPO-ROOT__/CI/doc/ADI_Logo_AWP_Large.png + __REPO-ROOT__/CI/doc/source/_static/assets/ADI_Logo_AWP_Large.png __VERSION__ ${PROJECT_ROOT}/AnalogDevicesTransceiverToolbox.mltbx diff --git a/requirements_doc.txt b/requirements_doc.txt deleted file mode 100644 index 5e8bb2c1..00000000 --- a/requirements_doc.txt +++ /dev/null @@ -1,7 +0,0 @@ -numpy -mkdocs -mkdocs-material -mkdocs-awesome-pages-plugin -mkdocs-mermaid2-plugin -mkdocs-plugin-inline-svg -jinja2