From 0691edf6b1ebd5aafba282fe61127bdd215dbcab Mon Sep 17 00:00:00 2001 From: Jorge Marques Date: Fri, 8 Nov 2024 10:16:08 -0300 Subject: [PATCH] i3c_controller: Fix I2C RX Stop I2C RX transfers should stop with last ACK-bit as a NACK and then a stop, previously, the controller would ACK all bytes and then stop. Signed-off-by: Jorge Marques --- .../i3c_controller_core/i3c_controller_word.v | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/library/i3c_controller/i3c_controller_core/i3c_controller_word.v b/library/i3c_controller/i3c_controller_core/i3c_controller_word.v index 3585818153..130e69b683 100644 --- a/library/i3c_controller/i3c_controller_core/i3c_controller_word.v +++ b/library/i3c_controller/i3c_controller_core/i3c_controller_word.v @@ -262,9 +262,13 @@ module i3c_controller_word ( // In I2C, the peripheral cannot stop the SM_TRANSFER. cmd_r <= `MOD_BIT_CMD_WRITE_; if (sdi_ready) begin - cmd_wr <= 1'b0; // ACK - end else begin - cmd_wr <= 1'b1; // NACK + if (cmdw_header == `CMDW_STOP_OD) begin + // Peek next command to see if the controller wishes to + // end the SM_TRANSFER. + cmd_wr <= 1'b1; // NACK + end else begin + cmd_wr <= 1'b0; // ACK + end end end else begin // SDI