ad469x/de10nano: Change spi_clk to 160MHz

analogdevicesinc · Nov 12, 2024 · 949ee6b · 949ee6b
1 parent 08dd9f9
commit 949ee6b
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/projects/ad469x_evb/common/ad469x_qsys.tcl b/projects/ad469x_evb/common/ad469x_qsys.tcl
@@ -6,6 +6,9 @@
 # receive dma
 set_instance_parameter_value sys_hps {F2SDRAM_Width} {128 64}
 
+# set spi_clk to 160MHz
+set_instance_parameter_value sys_hps {S2FCLK_USER0CLK_FREQ} {160.0}
+
 add_instance axi_dmac_0 axi_dmac
 set_instance_parameter_value axi_dmac_0 {DMA_TYPE_SRC} {1}
 set_instance_parameter_value axi_dmac_0 {DMA_TYPE_DEST} {0}