+ +
+

AD9739A-FMC HDL project#

+
+

Overview#

+

The AD9739A is a 14-bit, 2.5 GSPS high performance RF DAC +capable of synthesizing wideband signals with up to 1.25GHz of bandwidth, from +DC up to 3 GHz.

+

This reference design includes a single tone sine generator (DDS) and allows +programming the device and monitoring its internal status registers. It also +programs the ADF4350 clock chip which can generate a 1.6G Hz +to 2.5 GHz clock for the AD9739A from the on-board 25MHz +crystal. An alternate clock path using an ADCLK914 is +available for driving the clock externally.

+
+
+

Supported boards#

+ +
+
+

Supported devices#

+ +
+
+

Supported carriers#

+
    +

  • ZC706 on FMC LPC slot

    • +
+
+
+

Block design#

+
+

Block diagram#

+

The reference design consists of two functional modules, a DDS/LVDS interface +and a SPI interface. It is part of an AXI based microblaze system as shown in +the block diagram below. It is designed to support linux running on microblaze. +All other peripherals are available from Xilinx as IP cores.

+

The data path and clock domains are depicted in the below diagrams:

+
+

Xilinx block diagram#

+AD9739A-FMC/ZC706 xlilinx block diagram +
+
+

AD9739A FMC Card block diagram#

+AD9739A-FMC/ZC706 fmc card block diagram +

The DDS consists of a Xilinx DDS IP core and a DDR based data generator. The +core generates 6 samples at every fDAC/3 clock cycles for each port of +AD9739A.

+

The SPI interface allows programming the ADF4350 and/or +AD9739A. The provided SDK software shows the initial setup +required for both the devices for a 2.5GHz DAC clock with a 300MHz single tone +DDS.

+
+
+
+

Clock scheme#

+

Two clock paths are available to drive the clock input on the +AD9739A:

+
    +

  • The factory default option connects the ADF4350 to +the AD9739A. The ADF4350 is able to +synthesize a clock over the entire specified range of +the AD9739A (1.6GHz to 2.5GHz)

    +
    +
      +

    • Jumper CLOCK SOURCE (S1) must be moved to the ADF4350 +position

      • +
    +
    +
    • +

  • Alternatively, an external clock can be provided via the SMA CLKIN (J3) jack

    +
    +
      +

    • Jumper CLOCK SOURCE (S1) must be moved to the ADCLK914 +position. C102 and C99 on the back of the board also need to be removed +from their default position, and then soldered into the vertical position +from the large square pad they were previously soldered to and the narrow +pads closer to the ADCLK914 (U3). Observe the +orientation of the caps before removing them; they must be soldered with +their narrow edge against the PCB, and not the wide side as is common +with most components.

      • +
    +
    +
    • +
+
+
+

CPU/Memory interconnects addresses#

+
+ + + + + + + + + + + + + + +

Instance

Zynq/Microblaze

axi_ad9739a

0x7420_0000

axi_ad9739a_dma

0x7c42_0000

+
+
+
+

SPI connections#

+
+ ++++++ + + + + + + + + + + + + + + + + + + + +

SPI type

SPI manager instance

SPI subordinate

CS

PS

SPI 0

ADF4350

0

PS

SPI 0

ADCLK914

0

+
+
+
+
+

Building the HDL project#

+

The design is built upon ADI’s generic HDL reference design framework. +ADI distributes the bit/elf files of these projects as part of the +ADI Kuiper Linux. +If you want to build the sources, ADI makes them available on the HDL repository. +To get the source you must +clone +the HDL repository.

+
1user@analog:~$ cd hdl/projects/ad9739a_fmc/zc706
+2user@analog:~/hdl/projects/ad9739a_fmc/zc706$ make
+
+
+

A more comprehensive build guide can be found in the Build an HDL project user +guide.

+
+
+

Resources#

+ + + + +
+
+

More information#

+ +
+
+

Support#

+

Analog Devices, Inc. will provide limited online support for anyone +using the reference design with ADI components via the +EngineerZone FPGA reference designs forum.

+

For questions regarding the ADI Linux device drivers, device trees, etc. +from our Linux GitHub repository, the team will offer support +on the EngineerZone Linux software drivers forum.

+

For questions concerning the ADI No-OS drivers, from our +No-OS GitHub repository, the team will offer support on the +EngineerZone microcontroller No-OS drivers forum.

+

It should be noted, that the older the tools’ versions and release branches +are, the lower the chances to receive support from ADI engineers.

+
+
+ + + +