diff --git a/Libraries/PeriphDrivers/Source/UART/uart_revb.c b/Libraries/PeriphDrivers/Source/UART/uart_revb.c
index 14a98f7cbf..49522049c4 100644
--- a/Libraries/PeriphDrivers/Source/UART/uart_revb.c
+++ b/Libraries/PeriphDrivers/Source/UART/uart_revb.c
@@ -636,7 +636,7 @@ int MXC_UART_RevB_Transaction(mxc_uart_revb_req_t *req)
 
         while (req->txCnt < req->txLen) {
             while (!(MXC_UART_GetFlags((mxc_uart_regs_t *)(req->uart)) &
-                     (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OR)) &&
+                     (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OB)) &&
                    !(req->uart->status & MXC_F_UART_REVB_STATUS_TX_EM)) {}
 
             numToWrite = MXC_UART_GetTXFIFOAvailable((mxc_uart_regs_t *)(req->uart));
@@ -645,7 +645,7 @@ int MXC_UART_RevB_Transaction(mxc_uart_revb_req_t *req)
             req->txCnt += MXC_UART_WriteTXFIFO((mxc_uart_regs_t *)(req->uart),
                                                &req->txData[req->txCnt], numToWrite);
             MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart),
-                                (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OR));
+                                (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OB));
         }
     }
 
@@ -711,7 +711,7 @@ int MXC_UART_RevB_TransactionAsync(mxc_uart_revb_req_t *req)
         } else {
             /* Else enable the half empty interrupt */
             MXC_UART_EnableInt((mxc_uart_regs_t *)(req->uart),
-                               (MXC_F_UART_REVB_INT_EN_TX_HE | MXC_F_UART_REVB_INT_EN_TX_OR));
+                               (MXC_F_UART_REVB_INT_EN_TX_HE | MXC_F_UART_REVB_INT_EN_TX_OB));
         }
     }
 
@@ -786,7 +786,7 @@ int MXC_UART_RevB_AsyncCallback(mxc_uart_revb_regs_t *uart, int retVal)
 int MXC_UART_RevB_AsyncStopTx(mxc_uart_revb_regs_t *uart)
 {
     MXC_UART_DisableInt((mxc_uart_regs_t *)uart,
-                        (MXC_F_UART_REVB_INT_EN_TX_HE | MXC_F_UART_REVB_INT_EN_TX_OR));
+                        (MXC_F_UART_REVB_INT_EN_TX_HE | MXC_F_UART_REVB_INT_EN_TX_OB));
 
     return E_NO_ERROR;
 }
@@ -842,7 +842,7 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart)
                                           numToWrite);
         req->txCnt += numToWrite;
         MXC_UART_ClearFlags(req->uart,
-                            (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OR));
+                            (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OB));
     }
 
     req = (mxc_uart_req_t *)AsyncRxRequests[uart_num];
diff --git a/Libraries/PeriphDrivers/Source/UART/uart_revb_regs.h b/Libraries/PeriphDrivers/Source/UART/uart_revb_regs.h
index d5a7cbe37b..ff2e8c77e9 100644
--- a/Libraries/PeriphDrivers/Source/UART/uart_revb_regs.h
+++ b/Libraries/PeriphDrivers/Source/UART/uart_revb_regs.h
@@ -239,8 +239,8 @@ typedef struct {
  #define MXC_F_UART_REVB_INT_EN_RX_THD_POS              4 /**< INT_EN_RX_THD Position */
  #define MXC_F_UART_REVB_INT_EN_RX_THD                  ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_EN_RX_THD_POS)) /**< INT_EN_RX_THD Mask */
 
- #define MXC_F_UART_REVB_INT_EN_TX_OR_POS               5 /**< INT_EN_TX_OR Position */
- #define MXC_F_UART_REVB_INT_EN_TX_OR                   ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_EN_TX_OR_POS)) /**< INT_EN_TX_OR Mask */
+ #define MXC_F_UART_REVB_INT_EN_TX_OB_POS               5 /**< INT_EN_TX_OB Position */
+ #define MXC_F_UART_REVB_INT_EN_TX_OB                   ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_EN_TX_OB_POS)) /**< INT_EN_TX_OB Mask */
 
  #define MXC_F_UART_REVB_INT_EN_TX_HE_POS               6 /**< INT_EN_TX_HE Position */
  #define MXC_F_UART_REVB_INT_EN_TX_HE                   ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_EN_TX_HE_POS)) /**< INT_EN_TX_HE Mask */
@@ -268,8 +268,8 @@ typedef struct {
  #define MXC_F_UART_REVB_INT_FL_RX_THD_POS              4 /**< INT_FL_RX_THD Position */
  #define MXC_F_UART_REVB_INT_FL_RX_THD                  ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_FL_RX_THD_POS)) /**< INT_FL_RX_THD Mask */
 
- #define MXC_F_UART_REVB_INT_FL_TX_OR_POS               5 /**< INT_FL_TX_OR Position */
- #define MXC_F_UART_REVB_INT_FL_TX_OR                   ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_FL_TX_OR_POS)) /**< INT_FL_TX_OR Mask */
+ #define MXC_F_UART_REVB_INT_FL_TX_OB_POS               5 /**< INT_FL_TX_OB Position */
+ #define MXC_F_UART_REVB_INT_FL_TX_OB                   ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_FL_TX_OB_POS)) /**< INT_FL_TX_OB Mask */
 
  #define MXC_F_UART_REVB_INT_FL_TX_HE_POS               6 /**< INT_FL_TX_HE Position */
  #define MXC_F_UART_REVB_INT_FL_TX_HE                   ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_FL_TX_HE_POS)) /**< INT_FL_TX_HE Mask */