diff --git a/examples/adrv9002_profile_example.py b/examples/adrv9002_profile_example.py new file mode 100644 index 000000000..5b76e6701 --- /dev/null +++ b/examples/adrv9002_profile_example.py @@ -0,0 +1,177 @@ +"""This example demonstrates how to load a prebuilt profile or create a custom +profile for the ADRV9002 transceiver. If you have libadrv9002-iio installed, +you can create a custom profile. Otherwise, you can use a prebuilt profile that +was generated using libadrv9002-iio or TES. +""" + +import time +import argparse +import os + +import adi +import matplotlib.pyplot as plt +import numpy as np +from scipy import signal + +# Find the location of this script since the profile folder is relative to it +loc = os.path.dirname(os.path.realpath(__file__)) + +try: + # Try using libadrv9002 to load profiles + # Available at: https://analogdevicesinc.github.io/libadrv9002-iio/ + import adrv9002 as libadrv9002 + import copy + + use_prebuilt_profiles = False +except ImportError: + print("libadrv9002 not found. Using prebuilt profiles.") + use_prebuilt_profiles = True + profile_folder = os.path.join(loc, "adrv9002_profiles") + +# Add CLI argument for URI +parser = argparse.ArgumentParser() +parser.add_argument( + "uri", help="URI for IIO context with ADRV9002-EVAL or AD-JUPITER-EZ" +) +args = parser.parse_args() + +# Create ADRV9002 interface +uri = args.uri +sdr = adi.adrv9002(uri=uri) + +# Read back radio settings +current_profile = sdr.profile +interface_mode = current_profile["SSI interface"].lower() +api_version = sdr.api_version + +print("\nCurrent radio settings:") +print(f"Interface mode: {interface_mode}") +print(f"API version: {api_version}") + + +# Configure ADRV9002 +# See here for more information on the ADRV9002 python API: +# https://analogdevicesinc.github.io/pyadi-iio/devices/adi.adrv9002.html +if use_prebuilt_profiles: + api_version = api_version.replace(".", "_") + rate = 40 if interface_mode == "lvds" else 5 + name = f"lte_{rate}_{interface_mode}_api_{api_version}" + + print(f"\nLoading prebuilt profile: {name}") +else: + # Create profile configuration + print("\nCreating custom profile") + rx1 = libadrv9002.rx_radio_channel_config() + rx1.enabled = True + rx1.adc_high_performance_mode = True + rx1.frequency_offset_correction_enable = False + rx1.analog_filter_power_mode = 2 # High power/performance + rx1.analog_filter_biquad = False + rx1.analog_filter_bandwidth_hz = 18000000 + rx1.channel_bandwidth_hz = 18000000 + rx1.sample_rate_hz = 30720000 + rx1.nco_enable = False + rx1.nco_frequency_hz = 0 + rx1.rf_port = 0 # RX-A + + rx2 = copy.deepcopy(rx1) + + tx1 = libadrv9002.tx_radio_channel_config() + tx1.enabled = True + tx1.sample_rate_hz = 30720000 + tx1.frequency_offset_correction_enable = False + tx1.analog_filter_power_mode = 2 # High power/performance + tx1.channel_bandwidth_hz = 18000000 + tx1.orx_enabled = True + tx1.elb_type = 2 + + tx2 = copy.deepcopy(tx1) + + r_cfg = libadrv9002.radio_config() + r_cfg.adc_rate_mode = 3 # High Performance + r_cfg.fdd = False + r_cfg.lvds = True + r_cfg.ssi_lanes = 2 + r_cfg.ddr = True + r_cfg.adc_rate_mode = 3 # High Performance + r_cfg.short_strobe = True + r_cfg.rx_config[0] = rx1 + r_cfg.rx_config[1] = rx2 + r_cfg.tx_config[0] = tx1 + r_cfg.tx_config[1] = tx2 + + clk_cfg = libadrv9002.clock_config() + clk_cfg.device_clock_frequency_khz = 38400 + clk_cfg.clock_pll_high_performance_enable = True + clk_cfg.clock_pll_power_mode = 2 # High power/performance + clk_cfg.processor_clock_divider = 1 + + adrv_cfg = libadrv9002.adrv9002_config() + adrv_cfg.clk_cfg = clk_cfg + adrv_cfg.radio_cfg = r_cfg + + # Generate profile and stream binary + profile, stream = libadrv9002.generate_profile(adrv_cfg) + + # Save profile and stream + name = "custom_profile" + profile_folder = os.path.join(loc, "adrv9002_profiles") + if not os.path.exists(profile_folder): + os.makedirs(profile_folder) + + with open(os.path.join(profile_folder, f"{name}.json"), "w") as f: + f.write(str(profile)) + with open(os.path.join(profile_folder, f"{name}.stream"), "wb") as f: + f.write(stream) + + print(f"\nProfile and stream saved to {profile_folder}") + + +# Load profile +sdr.write_stream_profile( + os.path.join(profile_folder, f"{name}.stream"), + os.path.join(profile_folder, f"{name}.json"), +) + + +sdr.rx_enabled_channels = [0] +sdr.rx_ensm_mode_chan0 = "rf_enabled" +sdr.rx_ensm_mode_chan1 = "rf_enabled" +sdr.tx_hardwaregain_chan0 = -20 +sdr.tx_ensm_mode_chan0 = "rf_enabled" +sdr.tx_cyclic_buffer = True + +sdr.rx0_lo = 1000000000 +sdr.tx0_lo = 1000000000 + +fs = int(sdr.rx0_sample_rate) + +# Set single DDS tone for TX on one transmitter +sdr.dds_single_tone(1000000, 0.9, channel=0) + +# Create a sinewave waveform +# fc = 1000000 +# N = 1024 +# ts = 1 / float(fs) +# t = np.arange(0, N * ts, ts) +# i = np.cos(2 * np.pi * t * fc) * 2 ** 14 +# q = np.sin(2 * np.pi * t * fc) * 2 ** 14 +# iq = i + 1j * q +# +# # Send data +# sdr.tx(iq) + +sdr.rx_buffer_size = 2**18 + +# Collect data +for r in range(20): + x = sdr.rx() + f, Pxx_den = signal.periodogram(x, fs) + plt.clf() + plt.semilogy(f, Pxx_den) + # plt.ylim([1e-9, 1e2]) + plt.xlabel("frequency [Hz]") + plt.ylabel("PSD [V**2/Hz]") + plt.draw() + plt.pause(0.05) + time.sleep(0.1) diff --git a/examples/adrv9002_profiles/custom_profile.json b/examples/adrv9002_profiles/custom_profile.json new file mode 100644 index 000000000..7e87cc74b --- /dev/null +++ b/examples/adrv9002_profiles/custom_profile.json @@ -0,0 +1 @@ +b'{\n "clocks": {\n "deviceClock_kHz": 38400,\n "clkPllVcoFreq_daHz": 884736000,\n "clkPllHsDiv": 0,\n "clkPllMode": 0,\n "clk1105Div": 2,\n "armClkDiv": 6,\n "armPowerSavingClkDiv": 1,\n "refClockOutEnable": true,\n "auxPllPower": 2,\n "clkPllPower": 2,\n "padRefClkDrv": 0,\n "extLo1OutFreq_kHz": 0,\n "extLo2OutFreq_kHz": 0,\n "rfPll1LoMode": 0,\n "rfPll2LoMode": 0,\n "ext1LoType": 0,\n "ext2LoType": 0,\n "rx1RfInputSel": 0,\n "rx2RfInputSel": 0,\n "extLo1Divider": 2,\n "extLo2Divider": 2,\n "rfPllPhaseSyncMode": 0,\n "rx1LoSelect": 1,\n "rx2LoSelect": 1,\n "tx1LoSelect": 1,\n "tx2LoSelect": 1,\n "rx1LoDivMode": 1,\n "rx2LoDivMode": 1,\n "tx1LoDivMode": 1,\n "tx2LoDivMode": 1,\n "loGen1Select": 1,\n "loGen2Select": 1\n },\n "rx": {\n "rxInitChannelMask": 1011,\n "rxChannelCfg": [ {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 20000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 40000,\n "rxCorner3dBLp_kHz": 40000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 1,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 4,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 0,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 1\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n }, {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 20000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 40000,\n "rxCorner3dBLp_kHz": 40000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 2,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 4,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 2,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 1\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n }, {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 50000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 100000,\n "rxCorner3dBLp_kHz": 100000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 16,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 2,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 1,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 0\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n }, {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 50000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 100000,\n "rxCorner3dBLp_kHz": 100000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 32,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 2,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 3,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 0\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n }, {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 50000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 100000,\n "rxCorner3dBLp_kHz": 100000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 64,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 2,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 1,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 0\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n }, {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 50000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 100000,\n "rxCorner3dBLp_kHz": 100000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 128,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 2,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 3,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 0\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n }, {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 50000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 100000,\n "rxCorner3dBLp_kHz": 100000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 256,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 2,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 1,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 0\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n }, {\n "profile": {\n "primarySigBandwidth_Hz": 18000000,\n "rxOutputRate_Hz": 30720000,\n "rxInterfaceSampleRate_Hz": 30720000,\n "rxOffsetLo_kHz": 0,\n "rxNcoEnable": false,\n "outputSignaling": 0,\n "filterOrder": 1,\n "filterOrderLp": 1,\n "hpAdcCorner": 50000000,\n "lpAdcCorner": 0,\n "adcClk_kHz": 2211840,\n "rxCorner3dB_kHz": 100000,\n "rxCorner3dBLp_kHz": 100000,\n "tiaPower": 2,\n "tiaPowerLp": 2,\n "channelType": 512,\n "adcType": 1,\n "lpAdcCalMode": 0,\n "gainTableType": 0,\n "rxDpProfile": {\n "rxNbDecTop": {\n "scicBlk23En": 0,\n "scicBlk23DivFactor": 1,\n "scicBlk23LowRippleEn": 0,\n "decBy2Blk35En": 0,\n "decBy2Blk37En": 0,\n "decBy2Blk39En": 0,\n "decBy2Blk41En": 0,\n "decBy2Blk43En": 0,\n "decBy3Blk45En": 0,\n "decBy2Blk47En": 0\n },\n "rxWbDecTop": {\n "decBy2Blk25En": 0,\n "decBy2Blk27En": 0,\n "decBy2Blk29En": 0,\n "decBy2Blk31En": 0,\n "decBy2Blk33En": 1,\n "wbLpfBlk33p1En": 0\n },\n "rxDecTop": {\n "decBy3Blk15En": 1,\n "decBy2Hb3Blk17p1En": 0,\n "decBy2Hb4Blk17p2En": 0,\n "decBy2Hb5Blk19p1En": 0,\n "decBy2Hb6Blk19p2En": 0\n },\n "rxSincHBTop": {\n "sincGainMux": 1,\n "sincMux": 4,\n "hbMux": 2,\n "isGainCompEnabled": 0,\n "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ],\n "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ]\n },\n "rxNbDem": {\n "dpInFifo": {\n "dpInFifoEn": 0,\n "dpInFifoMode": 0,\n "dpInFifoTestDataSel": 0\n },\n "rxNbNco": {\n "rxNbNcoEn": 0,\n "rxNbNcoConfig": {\n "freq": 0,\n "sampleFreq": 0,\n "phase": 0,\n "realOut": 0\n }\n },\n "rxWbNbCompPFir": {\n "bankSel": 3,\n "rxWbNbCompPFirInMuxSel": 0,\n "rxWbNbCompPFirEn": 0\n },\n "resamp": {\n "rxResampEn": 0,\n "resampPhaseI": 0,\n "resampPhaseQ": 0\n },\n "gsOutMuxSel": 1,\n "rxOutSel": 0,\n "rxRoundMode": 0,\n "dpArmSel": 0\n }\n },\n "lnaConfig": {\n "externalLnaPresent": false,\n "gpioSourceSel": 0,\n "externalLnaPinSel": 0,\n "settlingDelay": 0,\n "numberLnaGainSteps": 0,\n "lnaGainSteps_mdB": [ 0, 0, 0, 0 ],\n "lnaDigitalGainDelay": 0,\n "minGainIndex": 0,\n "lnaType": 0\n },\n "rxSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 0,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }\n } ]\n },\n "tx": {\n "txInitChannelMask": 12,\n "txProfile": [ {\n "primarySigBandwidth_Hz": 18000000,\n "txInputRate_Hz": 30720000,\n "txInterfaceSampleRate_Hz": 30720000,\n "txOffsetLo_kHz": 0,\n "validDataDelay": 0,\n "txBbf3dBCorner_kHz": 50000,\n "outputSignaling": 0,\n "txPdBiasCurrent": 1,\n "txPdGainEnable": 0,\n "txPrePdRealPole_kHz": 1000000,\n "txPostPdRealPole_kHz": 530000,\n "txBbfPower": 2,\n "txExtLoopBackType": 2,\n "txExtLoopBackForInitCal": 0,\n "txPeakLoopBackPower": 0,\n "frequencyDeviation_Hz": 0,\n "txDpProfile": {\n "txPreProc": {\n "txPreProcSymbol0": 0,\n "txPreProcSymbol1": 0,\n "txPreProcSymbol2": 0,\n "txPreProcSymbol3": 0,\n "txPreProcSymMapDivFactor": 1,\n "txPreProcMode": 1,\n "txPreProcWbNbPfirIBankSel": 0,\n "txPreProcWbNbPfirQBankSel": 1\n },\n "txWbIntTop": {\n "txInterpBy2Blk30En": 0,\n "txInterpBy2Blk28En": 0,\n "txInterpBy2Blk26En": 0,\n "txInterpBy2Blk24En": 0,\n "txInterpBy2Blk22En": 1,\n "txWbLpfBlk22p1En": 0\n },\n "txNbIntTop": {\n "txInterpBy2Blk20En": 0,\n "txInterpBy2Blk18En": 0,\n "txInterpBy2Blk16En": 0,\n "txInterpBy2Blk14En": 0,\n "txInterpBy2Blk12En": 0,\n "txInterpBy3Blk10En": 0,\n "txInterpBy2Blk8En": 0,\n "txScicBlk32En": 0,\n "txScicBlk32DivFactor": 1\n },\n "txIntTop": {\n "interpBy3Blk44p1En": 1,\n "sinc3Blk44En": 0,\n "sinc2Blk42En": 0,\n "interpBy3Blk40En": 1,\n "interpBy2Blk38En": 0,\n "interpBy2Blk36En": 0\n },\n "txIntTopFreqDevMap": {\n "rrc2Frac": 0,\n "mpll": 0,\n "nchLsw": 0,\n "nchMsb": 0,\n "freqDevMapEn": 0,\n "txRoundEn": 1\n },\n "txIqdmDuc": {\n "iqdmDucMode": 0,\n "iqdmDev": 0,\n "iqdmDevOffset": 0,\n "iqdmScalar": 0,\n "iqdmThreshold": 0,\n "iqdmNco": {\n "freq": 0,\n "sampleFreq": 61440000,\n "phase": 0,\n "realOut": 0\n }\n }\n },\n "txSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 1,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n }, {\n "primarySigBandwidth_Hz": 18000000,\n "txInputRate_Hz": 30720000,\n "txInterfaceSampleRate_Hz": 30720000,\n "txOffsetLo_kHz": 0,\n "validDataDelay": 0,\n "txBbf3dBCorner_kHz": 50000,\n "outputSignaling": 0,\n "txPdBiasCurrent": 1,\n "txPdGainEnable": 0,\n "txPrePdRealPole_kHz": 1000000,\n "txPostPdRealPole_kHz": 530000,\n "txBbfPower": 2,\n "txExtLoopBackType": 2,\n "txExtLoopBackForInitCal": 0,\n "txPeakLoopBackPower": 0,\n "frequencyDeviation_Hz": 0,\n "txDpProfile": {\n "txPreProc": {\n "txPreProcSymbol0": 0,\n "txPreProcSymbol1": 0,\n "txPreProcSymbol2": 0,\n "txPreProcSymbol3": 0,\n "txPreProcSymMapDivFactor": 1,\n "txPreProcMode": 1,\n "txPreProcWbNbPfirIBankSel": 2,\n "txPreProcWbNbPfirQBankSel": 3\n },\n "txWbIntTop": {\n "txInterpBy2Blk30En": 0,\n "txInterpBy2Blk28En": 0,\n "txInterpBy2Blk26En": 0,\n "txInterpBy2Blk24En": 0,\n "txInterpBy2Blk22En": 1,\n "txWbLpfBlk22p1En": 0\n },\n "txNbIntTop": {\n "txInterpBy2Blk20En": 0,\n "txInterpBy2Blk18En": 0,\n "txInterpBy2Blk16En": 0,\n "txInterpBy2Blk14En": 0,\n "txInterpBy2Blk12En": 0,\n "txInterpBy3Blk10En": 0,\n "txInterpBy2Blk8En": 0,\n "txScicBlk32En": 0,\n "txScicBlk32DivFactor": 1\n },\n "txIntTop": {\n "interpBy3Blk44p1En": 1,\n "sinc3Blk44En": 0,\n "sinc2Blk42En": 0,\n "interpBy3Blk40En": 1,\n "interpBy2Blk38En": 0,\n "interpBy2Blk36En": 0\n },\n "txIntTopFreqDevMap": {\n "rrc2Frac": 0,\n "mpll": 0,\n "nchLsw": 0,\n "nchMsb": 0,\n "freqDevMapEn": 0,\n "txRoundEn": 1\n },\n "txIqdmDuc": {\n "iqdmDucMode": 0,\n "iqdmDev": 0,\n "iqdmDevOffset": 0,\n "iqdmScalar": 0,\n "iqdmThreshold": 0,\n "iqdmNco": {\n "freq": 0,\n "sampleFreq": 61440000,\n "phase": 0,\n "realOut": 0\n }\n }\n },\n "txSsiConfig": {\n "ssiType": 2,\n "ssiDataFormatSel": 4,\n "numLaneSel": 1,\n "strobeType": 0,\n "lsbFirst": 0,\n "qFirst": 0,\n "txRefClockPin": 1,\n "lvdsIBitInversion": false,\n "lvdsQBitInversion": false,\n "lvdsStrobeBitInversion": false,\n "lvdsUseLsbIn12bitMode": 0,\n "lvdsRxClkInversionEn": false,\n "cmosDdrPosClkEn": false,\n "cmosClkInversionEn": false,\n "ddrEn": true,\n "rxMaskStrobeEn": false\n }\n } ]\n },\n "sysConfig": {\n "duplexMode": 0,\n "fhModeOn": 0,\n "numDynamicProfiles": 1,\n "mcsMode": 0,\n "mcsInterfaceType": 0,\n "adcTypeMonitor": 1,\n "pllLockTime_us": 750,\n "pllPhaseSyncWait_us": 0,\n "pllModulus": {\n "modulus": [ 8388593, 8388593, 8388593, 8388593, 8388593 ],\n "dmModulus": [ 8388593, 8388593 ]\n },\n "warmBootEnable": false\n },\n "pfirBuffer": {\n "pfirRxWbNbChFilterCoeff_A": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 475, 312, -782, -39, 1201, -777, -1182, 1981, 177, -2874, 1941, 2393, -4416, 225, 5594, -4581, -3668, 8650, -1992, -9342, 9646, 4213, -15137, 6404, 13615, -18199, -2610, 23969, -15142, -17198, 31204, -3269, -34604, 30213, 17955, -49337, 16361, 45636, -53954, -12567, 72920, -40769, -54562, 89506, -4148, -102269, 83183, 57280, -142874, 41767, 139213, -158628, -45955, 231679, -125964, -193870, 320642, -4532, -442087, 390927, 347244, -1055854, 429729, 4391599, 4391599, 429729, -1055854, 347244, 390927, -442087, -4532, 320642, -193870, -125964, 231679, -45955, -158628, 139213, 41767, -142874, 57280, 83183, -102269, -4148, 89506, -54562, -40769, 72920, -12567, -53954, 45636, 16361, -49337, 17955, 30213, -34604, -3269, 31204, -17198, -15142, 23969, -2610, -18199, 13615, 6404, -15137, 4213, 9646, -9342, -1992, 8650, -3668, -4581, 5594, 225, -4416, 2393, 1941, -2874, 177, 1981, -1182, -777, 1201, -39, -782, 312, 0 ]\n },\n "pfirRxWbNbChFilterCoeff_B": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8388608, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n },\n "pfirRxWbNbChFilterCoeff_C": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 475, 312, -782, -39, 1201, -777, -1182, 1981, 177, -2874, 1941, 2393, -4416, 225, 5594, -4581, -3668, 8650, -1992, -9342, 9646, 4213, -15137, 6404, 13615, -18199, -2610, 23969, -15142, -17198, 31204, -3269, -34604, 30213, 17955, -49337, 16361, 45636, -53954, -12567, 72920, -40769, -54562, 89506, -4148, -102269, 83183, 57280, -142874, 41767, 139213, -158628, -45955, 231679, -125964, -193870, 320642, -4532, -442087, 390927, 347244, -1055854, 429729, 4391599, 4391599, 429729, -1055854, 347244, 390927, -442087, -4532, 320642, -193870, -125964, 231679, -45955, -158628, 139213, 41767, -142874, 57280, 83183, -102269, -4148, 89506, -54562, -40769, 72920, -12567, -53954, 45636, 16361, -49337, 17955, 30213, -34604, -3269, 31204, -17198, -15142, 23969, -2610, -18199, 13615, 6404, -15137, 4213, 9646, -9342, -1992, 8650, -3668, -4581, 5594, 225, -4416, 2393, 1941, -2874, 177, 1981, -1182, -777, 1201, -39, -782, 312, 0 ]\n },\n "pfirRxWbNbChFilterCoeff_D": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8388608, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n },\n "pfirTxWbNbPulShpCoeff_A": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n },\n "pfirTxWbNbPulShpCoeff_B": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n },\n "pfirTxWbNbPulShpCoeff_C": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n },\n "pfirTxWbNbPulShpCoeff_D": {\n "numCoeff": 128,\n "symmetricSel": 0,\n "tapsSel": 3,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n },\n "pfirRxNbPulShp": [ {\n "numCoeff": 128,\n "symmetricSel": 0,\n "taps": 128,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8388608, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n }, {\n "numCoeff": 128,\n "symmetricSel": 0,\n "taps": 128,\n "gainSel": 2,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8388608, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n } ],\n "pfirRxMagLowTiaLowSRHp": [ {\n "numCoeff": 21,\n "coefficients": [ -12, 83, -293, 734, -1489, 2594, -3965, 5403, -6516, 5868, 27957, 5868, -6516, 5403, -3965, 2594, -1489, 734, -293, 83, -12 ]\n }, {\n "numCoeff": 21,\n "coefficients": [ -12, 83, -293, 734, -1489, 2594, -3965, 5403, -6516, 5868, 27957, 5868, -6516, 5403, -3965, 2594, -1489, 734, -293, 83, -12 ]\n } ],\n "pfirRxMagLowTiaHighSRHp": [ {\n "numCoeff": 21,\n "coefficients": [ -62, 194, 80, -829, 201, 1857, -179, -4602, -1259, 11431, 19102, 11431, -1259, -4602, -179, 1857, 201, -829, 80, 194, -62 ]\n }, {\n "numCoeff": 21,\n "coefficients": [ -62, 194, 80, -829, 201, 1857, -179, -4602, -1259, 11431, 19102, 11431, -1259, -4602, -179, 1857, 201, -829, 80, 194, -62 ]\n } ],\n "pfirRxMagHighTiaHighSRHp": [ {\n "numCoeff": 21,\n "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ]\n }, {\n "numCoeff": 21,\n "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ]\n } ],\n "pfirRxMagLowTiaLowSRLp": [ {\n "numCoeff": 21,\n "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ]\n }, {\n "numCoeff": 21,\n "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ]\n } ],\n "pfirRxMagLowTiaHighSRLp": [ {\n "numCoeff": 21,\n "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ]\n }, {\n "numCoeff": 21,\n "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ]\n } ],\n "pfirRxMagHighTiaHighSRLp": [ {\n "numCoeff": 21,\n "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ]\n }, {\n "numCoeff": 21,\n "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ]\n } ],\n "pfirTxMagComp1": {\n "numCoeff": 21,\n "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ]\n },\n "pfirTxMagComp2": {\n "numCoeff": 21,\n "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ]\n },\n "pfirTxMagCompNb": [ {\n "numCoeff": 13,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n }, {\n "numCoeff": 13,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n } ],\n "pfirRxMagCompNb": [ {\n "numCoeff": 13,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n }, {\n "numCoeff": 13,\n "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]\n } ]\n }\n}' \ No newline at end of file diff --git a/examples/adrv9002_profiles/custom_profile.stream b/examples/adrv9002_profiles/custom_profile.stream new file mode 100644 index 000000000..f25a75bff Binary files /dev/null and b/examples/adrv9002_profiles/custom_profile.stream differ diff --git a/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.json b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.json new file mode 100644 index 000000000..b3a90ac8d --- /dev/null +++ b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.json @@ -0,0 +1,1320 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + "profile": { + "primarySigBandwidth_Hz": 9000000, + "rxOutputRate_Hz": 15360000, + "rxInterfaceSampleRate_Hz": 15360000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 20000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 10000, + "rxCorner3dBLp_kHz": 10000, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 1, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 1, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 1, + "decBy2Blk33En": 1, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 1, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 4, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 1, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 15360000, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 9000000, + "rxOutputRate_Hz": 15360000, + "rxInterfaceSampleRate_Hz": 15360000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 20000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 10000, + "rxCorner3dBLp_kHz": 10000, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 2, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 1, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 1, + "decBy2Blk33En": 1, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 1, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 4, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 1, + "rxNbNcoConfig": { + "freq": 0, + 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-5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ], + "pfirRxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} diff --git a/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.stream b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.stream new file mode 100644 index 000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_0_6.stream differ diff --git a/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_10_1.json b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_10_1.json new file mode 100644 index 000000000..a5a761107 --- /dev/null +++ b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_10_1.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + "profile": { + "primarySigBandwidth_Hz": 9000000, + "rxOutputRate_Hz": 15360000, + "rxInterfaceSampleRate_Hz": 15360000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + 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16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 1, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 15360000, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + 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}, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 12500, + "rxOutputRate_Hz": 0, + "rxInterfaceSampleRate_Hz": 0, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 0, + "lpAdcCorner": 0, + "adcClk_kHz": 0, + "rxCorner3dB_kHz": 0, + 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false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 12500, + "rxOutputRate_Hz": 0, + "rxInterfaceSampleRate_Hz": 0, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 0, + "lpAdcCorner": 0, + "adcClk_kHz": 0, + "rxCorner3dB_kHz": 0, + "rxCorner3dBLp_kHz": 0, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 0, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 0, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 0, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + 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-1485, 714, -229, 39 ] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ] + } ], + "pfirRxMagLowTiaLowSRLp": [ { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + }, { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + } ], + "pfirRxMagLowTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + }, { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + } ], + "pfirRxMagHighTiaHighSRLp": [ { + "numCoeff": 21, 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0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} \ No newline at end of file diff --git a/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_10_1.stream b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_10_1.stream new file mode 100644 index 000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_10_1.stream differ diff --git a/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_13_7.json b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_13_7.json new file mode 100644 index 000000000..2401536e7 --- /dev/null +++ b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_13_7.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + 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"realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + 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100644 index 000000000..79bfb3e61 Binary files /dev/null and b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_13_7.stream differ diff --git a/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_8_1.json b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_8_1.json new file mode 100644 index 000000000..1e6548f2b --- /dev/null +++ b/examples/adrv9002_profiles/lte_10_lvds_nco_api_68_8_1.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + 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b/examples/adrv9002_profiles/lte_20_lvds_api_68_0_6.json @@ -0,0 +1,1320 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + "profile": { + "primarySigBandwidth_Hz": 18000000, + "rxOutputRate_Hz": 30720000, + "rxInterfaceSampleRate_Hz": 30720000, + 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30720000, + "rxInterfaceSampleRate_Hz": 30720000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 50000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 100000, + "rxCorner3dBLp_kHz": 100000, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 128, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 1, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 1, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 1, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 4, + "hbMux": 2, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 3, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 12500, + "rxOutputRate_Hz": 0, + "rxInterfaceSampleRate_Hz": 0, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 0, + "lpAdcCorner": 0, + "adcClk_kHz": 0, + "rxCorner3dB_kHz": 0, + "rxCorner3dBLp_kHz": 0, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 0, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 0, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 0, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 0, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 0, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 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"lpAdcCorner": 0, + "adcClk_kHz": 0, + "rxCorner3dB_kHz": 0, + "rxCorner3dBLp_kHz": 0, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 0, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 0, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 0, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 0, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 0, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { 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"lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + } + } ] + }, + "tx": { + "txInitChannelMask": 12, + "txProfile": [ { + "primarySigBandwidth_Hz": 18000000, + "txInputRate_Hz": 30720000, + "txInterfaceSampleRate_Hz": 30720000, + "txOffsetLo_kHz": 0, + "validDataDelay": 0, + "txBbf3dBCorner_kHz": 50000, + "outputSignaling": 0, + "txPdBiasCurrent": 1, + "txPdGainEnable": 0, + "txPrePdRealPole_kHz": 1000000, + "txPostPdRealPole_kHz": 530000, + "txBbfPower": 2, + "txExtLoopBackType": 0, + "txExtLoopBackForInitCal": 0, + "txPeakLoopBackPower": 0, + "frequencyDeviation_Hz": 0, + "txDpProfile": { + "txPreProc": { + "txPreProcSymbol0": 0, + "txPreProcSymbol1": 0, + "txPreProcSymbol2": 0, + "txPreProcSymbol3": 0, + "txPreProcSymMapDivFactor": 1, + "txPreProcMode": 1, + "txPreProcWbNbPfirIBankSel": 0, + "txPreProcWbNbPfirQBankSel": 1 + }, + "txWbIntTop": { + "txInterpBy2Blk30En": 0, + "txInterpBy2Blk28En": 0, + "txInterpBy2Blk26En": 0, + "txInterpBy2Blk24En": 0, + "txInterpBy2Blk22En": 1, + "txWbLpfBlk22p1En": 0 + }, + "txNbIntTop": { + "txInterpBy2Blk20En": 0, + "txInterpBy2Blk18En": 0, + "txInterpBy2Blk16En": 0, + "txInterpBy2Blk14En": 0, + "txInterpBy2Blk12En": 0, + "txInterpBy3Blk10En": 0, + "txInterpBy2Blk8En": 0, + "txScicBlk32En": 0, + "txScicBlk32DivFactor": 1 + }, + "txIntTop": { + "interpBy3Blk44p1En": 1, + "sinc3Blk44En": 0, + "sinc2Blk42En": 0, + "interpBy3Blk40En": 1, + "interpBy2Blk38En": 0, + "interpBy2Blk36En": 0 + }, + "txIntTopFreqDevMap": { + "rrc2Frac": 0, + "mpll": 0, + "nchLsw": 0, + "nchMsb": 0, + "freqDevMapEn": 0, + "txRoundEn": 1 + }, + "txIqdmDuc": { + "iqdmDucMode": 0, + "iqdmDev": 0, + "iqdmDevOffset": 0, + "iqdmScalar": 0, + "iqdmThreshold": 0, + "iqdmNco": { + "freq": 0, + "sampleFreq": 61440000, + "phase": 0, + "realOut": 0 + } + } + }, + "txSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 1, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + }, { + "primarySigBandwidth_Hz": 18000000, + "txInputRate_Hz": 30720000, + "txInterfaceSampleRate_Hz": 30720000, + "txOffsetLo_kHz": 0, + "validDataDelay": 0, + "txBbf3dBCorner_kHz": 50000, + "outputSignaling": 0, + "txPdBiasCurrent": 1, + "txPdGainEnable": 0, + "txPrePdRealPole_kHz": 1000000, + "txPostPdRealPole_kHz": 530000, + "txBbfPower": 2, + "txExtLoopBackType": 0, + "txExtLoopBackForInitCal": 0, + "txPeakLoopBackPower": 0, + "frequencyDeviation_Hz": 0, + "txDpProfile": { + "txPreProc": { + "txPreProcSymbol0": 0, + "txPreProcSymbol1": 0, + "txPreProcSymbol2": 0, + "txPreProcSymbol3": 0, + "txPreProcSymMapDivFactor": 1, + "txPreProcMode": 1, + "txPreProcWbNbPfirIBankSel": 2, + "txPreProcWbNbPfirQBankSel": 3 + }, + "txWbIntTop": { + "txInterpBy2Blk30En": 0, + "txInterpBy2Blk28En": 0, + "txInterpBy2Blk26En": 0, + "txInterpBy2Blk24En": 0, + "txInterpBy2Blk22En": 1, + "txWbLpfBlk22p1En": 0 + }, + "txNbIntTop": { + "txInterpBy2Blk20En": 0, + "txInterpBy2Blk18En": 0, + "txInterpBy2Blk16En": 0, + "txInterpBy2Blk14En": 0, + "txInterpBy2Blk12En": 0, + "txInterpBy3Blk10En": 0, + "txInterpBy2Blk8En": 0, + "txScicBlk32En": 0, + "txScicBlk32DivFactor": 1 + }, + "txIntTop": { + "interpBy3Blk44p1En": 1, + "sinc3Blk44En": 0, + "sinc2Blk42En": 0, + "interpBy3Blk40En": 1, + "interpBy2Blk38En": 0, + "interpBy2Blk36En": 0 + }, + "txIntTopFreqDevMap": { + "rrc2Frac": 0, + "mpll": 0, + "nchLsw": 0, + "nchMsb": 0, + "freqDevMapEn": 0, + "txRoundEn": 1 + }, + "txIqdmDuc": { + "iqdmDucMode": 0, + "iqdmDev": 0, + "iqdmDevOffset": 0, + "iqdmScalar": 0, + "iqdmThreshold": 0, + "iqdmNco": { + "freq": 0, + "sampleFreq": 61440000, + "phase": 0, + "realOut": 0 + } + } + }, + "txSsiConfig": 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] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ] + } ], + "pfirRxMagLowTiaLowSRLp": [ { + "numCoeff": 21, + "coefficients": [ -346, 1329, -1178, -1281, 1308, 2727, -1341, -5851, -1018, 12236, 19599, 12236, -1018, -5851, -1341, 2727, 1308, -1281, -1178, 1329, -346 ] + }, { + "numCoeff": 21, + "coefficients": [ -346, 1329, -1178, -1281, 1308, 2727, -1341, -5851, -1018, 12236, 19599, 12236, -1018, -5851, -1341, 2727, 1308, -1281, -1178, 1329, -346 ] + } ], + "pfirRxMagLowTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ -2473, 892, 6048, 4321, -7598, -15879, -6072, 13306, 18924, 6338, -2843, 6338, 18924, 13306, -6072, -15879, -7598, 4321, 6048, 892, -2473 ] + }, { + "numCoeff": 21, + "coefficients": [ -2473, 892, 6048, 4321, -7598, -15879, -6072, 13306, 18924, 6338, -2843, 6338, 18924, 13306, -6072, -15879, -7598, 4321, 6048, 892, -2473 ] + } ], + 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"numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} diff --git a/examples/adrv9002_profiles/lte_20_lvds_api_68_0_6.stream b/examples/adrv9002_profiles/lte_20_lvds_api_68_0_6.stream new file mode 100644 index 000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_20_lvds_api_68_0_6.stream differ diff --git a/examples/adrv9002_profiles/lte_20_lvds_api_68_10_1.json b/examples/adrv9002_profiles/lte_20_lvds_api_68_10_1.json new file mode 100644 index 000000000..52201cede --- /dev/null +++ b/examples/adrv9002_profiles/lte_20_lvds_api_68_10_1.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + 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} + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 18000000, + 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000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_20_lvds_api_68_10_1.stream differ diff --git a/examples/adrv9002_profiles/lte_20_lvds_api_68_13_7.json b/examples/adrv9002_profiles/lte_20_lvds_api_68_13_7.json new file mode 100644 index 000000000..55b3aaed8 --- /dev/null +++ b/examples/adrv9002_profiles/lte_20_lvds_api_68_13_7.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + "profile": { + "primarySigBandwidth_Hz": 18000000, + "rxOutputRate_Hz": 30720000, + "rxInterfaceSampleRate_Hz": 30720000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 20000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 40000, + "rxCorner3dBLp_kHz": 40000, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 1, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 1, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 1, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 1, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 4, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 18000000, + "rxOutputRate_Hz": 30720000, + "rxInterfaceSampleRate_Hz": 30720000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 20000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 40000, + "rxCorner3dBLp_kHz": 40000, + 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"rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 2, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 12500, + "rxOutputRate_Hz": 0, + "rxInterfaceSampleRate_Hz": 0, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 0, + "lpAdcCorner": 0, + "adcClk_kHz": 0, + "rxCorner3dB_kHz": 0, + "rxCorner3dBLp_kHz": 0, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 0, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 0, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 0, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 0, + "decBy2Hb3Blk17p1En": 0, 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2, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 1, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + 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-62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + }, { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + } ], + "pfirRxMagHighTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ] + } ], + "pfirTxMagComp1": { + "numCoeff": 21, + "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagComp2": { + "numCoeff": 21, + "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ], + "pfirRxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} diff --git a/examples/adrv9002_profiles/lte_20_lvds_api_68_13_7.stream b/examples/adrv9002_profiles/lte_20_lvds_api_68_13_7.stream new file mode 100644 index 000000000..79bfb3e61 Binary files /dev/null and b/examples/adrv9002_profiles/lte_20_lvds_api_68_13_7.stream differ diff --git a/examples/adrv9002_profiles/lte_20_lvds_api_68_8_1.json b/examples/adrv9002_profiles/lte_20_lvds_api_68_8_1.json new file mode 100644 index 000000000..29890f3d6 --- /dev/null +++ b/examples/adrv9002_profiles/lte_20_lvds_api_68_8_1.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + "profile": { + "primarySigBandwidth_Hz": 18000000, + "rxOutputRate_Hz": 30720000, + "rxInterfaceSampleRate_Hz": 30720000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 20000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 40000, + "rxCorner3dBLp_kHz": 40000, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 1, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 1, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 1, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 1, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 4, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 18000000, + "rxOutputRate_Hz": 30720000, + "rxInterfaceSampleRate_Hz": 30720000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 20000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 40000, + "rxCorner3dBLp_kHz": 40000, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 2, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 1, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 1, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 1, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 4, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 2, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": true, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 12500, + "rxOutputRate_Hz": 0, + "rxInterfaceSampleRate_Hz": 0, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 0, + "lpAdcCorner": 0, + "adcClk_kHz": 0, + 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"dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 0, + "ssiDataFormatSel": 0, + "numLaneSel": 0, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + 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-1485, 714, -229, 39 ] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ] + } ], + "pfirRxMagLowTiaLowSRLp": [ { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + }, { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + } ], + "pfirRxMagLowTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + }, { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + } ], + "pfirRxMagHighTiaHighSRLp": [ { + "numCoeff": 21, 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0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} diff --git a/examples/adrv9002_profiles/lte_20_lvds_api_68_8_1.stream b/examples/adrv9002_profiles/lte_20_lvds_api_68_8_1.stream new file mode 100644 index 000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_20_lvds_api_68_8_1.stream differ diff --git a/examples/adrv9002_profiles/lte_40_lvds_api_68_0_6.json b/examples/adrv9002_profiles/lte_40_lvds_api_68_0_6.json new file mode 100644 index 000000000..ec94d6fee --- /dev/null +++ b/examples/adrv9002_profiles/lte_40_lvds_api_68_0_6.json @@ -0,0 +1,1320 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + 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-2089, 1125, -384, 69 ] + }, + "pfirTxMagComp2": { + "numCoeff": 21, + "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ], + "pfirRxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} diff --git a/examples/adrv9002_profiles/lte_40_lvds_api_68_0_6.stream b/examples/adrv9002_profiles/lte_40_lvds_api_68_0_6.stream new file mode 100644 index 000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_40_lvds_api_68_0_6.stream differ diff --git a/examples/adrv9002_profiles/lte_40_lvds_api_68_10_1.json b/examples/adrv9002_profiles/lte_40_lvds_api_68_10_1.json new file mode 100644 index 000000000..d1e125942 --- /dev/null +++ b/examples/adrv9002_profiles/lte_40_lvds_api_68_10_1.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + 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8388593 ] + }, + "warmBootEnable": false + }, + "pfirBuffer": { + "pfirRxWbNbChFilterCoeff_A": { + "numCoeff": 128, + "symmetricSel": 0, + "tapsSel": 3, + "gainSel": 2, + "coefficients": [ 475, 312, -782, -39, 1201, -777, -1182, 1981, 177, -2874, 1941, 2393, -4416, 225, 5594, -4581, -3668, 8650, -1992, -9342, 9646, 4213, -15137, 6404, 13615, -18199, -2610, 23969, -15142, -17198, 31204, -3269, -34604, 30213, 17955, -49337, 16361, 45636, -53954, -12567, 72920, -40769, -54562, 89506, -4148, -102269, 83183, 57280, -142874, 41767, 139213, -158628, -45955, 231679, -125964, -193870, 320642, -4532, -442087, 390927, 347244, -1055854, 429729, 4391599, 4391599, 429729, -1055854, 347244, 390927, -442087, -4532, 320642, -193870, -125964, 231679, -45955, -158628, 139213, 41767, -142874, 57280, 83183, -102269, -4148, 89506, -54562, -40769, 72920, -12567, -53954, 45636, 16361, -49337, 17955, 30213, -34604, -3269, 31204, -17198, -15142, 23969, -2610, -18199, 13615, 6404, -15137, 4213, 9646, -9342, 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80, 194, -62 ] + } ], + "pfirRxMagHighTiaHighSRHp": [ { + "numCoeff": 21, + "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ] + } ], + "pfirRxMagLowTiaLowSRLp": [ { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + }, { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + } ], + "pfirRxMagLowTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + }, { + "numCoeff": 21, + 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ], + "pfirRxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} \ No newline at end of file diff --git a/examples/adrv9002_profiles/lte_40_lvds_api_68_10_1.stream b/examples/adrv9002_profiles/lte_40_lvds_api_68_10_1.stream new file mode 100644 index 000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_40_lvds_api_68_10_1.stream differ diff --git a/examples/adrv9002_profiles/lte_40_lvds_api_68_13_7.json b/examples/adrv9002_profiles/lte_40_lvds_api_68_13_7.json new file mode 100644 index 000000000..c8148ce6a --- /dev/null +++ b/examples/adrv9002_profiles/lte_40_lvds_api_68_13_7.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + "profile": { + "primarySigBandwidth_Hz": 38000000, + "rxOutputRate_Hz": 61440000, + "rxInterfaceSampleRate_Hz": 61440000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 20000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + 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0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 2, + "ssiDataFormatSel": 4, + "numLaneSel": 1, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} diff --git a/examples/adrv9002_profiles/lte_40_lvds_api_68_13_7.stream b/examples/adrv9002_profiles/lte_40_lvds_api_68_13_7.stream new file mode 100644 index 000000000..79bfb3e61 Binary files /dev/null and b/examples/adrv9002_profiles/lte_40_lvds_api_68_13_7.stream differ diff --git a/examples/adrv9002_profiles/lte_40_lvds_api_68_8_1.json b/examples/adrv9002_profiles/lte_40_lvds_api_68_8_1.json new file mode 100644 index 000000000..ed024a316 --- /dev/null +++ b/examples/adrv9002_profiles/lte_40_lvds_api_68_8_1.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + 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a/examples/adrv9002_profiles/lte_5_cmos_api_68_0_6.json b/examples/adrv9002_profiles/lte_5_cmos_api_68_0_6.json new file mode 100644 index 000000000..8b5bc3f88 --- /dev/null +++ b/examples/adrv9002_profiles/lte_5_cmos_api_68_0_6.json @@ -0,0 +1,1320 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + 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"dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 1, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0 + }, + "rxSsiConfig": { + "ssiType": 1, + "ssiDataFormatSel": 4, + "numLaneSel": 2, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 4500000, + "rxOutputRate_Hz": 7680000, + "rxInterfaceSampleRate_Hz": 7680000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 50000000, + "lpAdcCorner": 0, + "adcClk_kHz": 2211840, + "rxCorner3dB_kHz": 100000, + "rxCorner3dBLp_kHz": 100000, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 128, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 1, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 1, + "decBy2Blk31En": 1, + "decBy2Blk33En": 1, + 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} + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0 + }, + "rxSsiConfig": { + "ssiType": 0, + "ssiDataFormatSel": 0, + "numLaneSel": 0, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 12500, + "rxOutputRate_Hz": 0, + "rxInterfaceSampleRate_Hz": 0, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 0, + "lpAdcCorner": 0, + "adcClk_kHz": 0, + "rxCorner3dB_kHz": 0, + "rxCorner3dBLp_kHz": 0, + "tiaPower": 2, + "tiaPowerLp": 2, + "channelType": 0, + "adcType": 1, + "lpAdcCalMode": 0, + "gainTableType": 0, + "rxDpProfile": { + "rxNbDecTop": { + "scicBlk23En": 0, + "scicBlk23DivFactor": 0, + "scicBlk23LowRippleEn": 0, + "decBy2Blk35En": 0, + "decBy2Blk37En": 0, + "decBy2Blk39En": 0, + "decBy2Blk41En": 0, + "decBy2Blk43En": 0, + "decBy3Blk45En": 0, + "decBy2Blk47En": 0 + }, + "rxWbDecTop": { + "decBy2Blk25En": 0, + "decBy2Blk27En": 0, + "decBy2Blk29En": 0, + "decBy2Blk31En": 0, + "decBy2Blk33En": 0, + "wbLpfBlk33p1En": 0 + }, + "rxDecTop": { + "decBy3Blk15En": 0, + "decBy2Hb3Blk17p1En": 0, + "decBy2Hb4Blk17p2En": 0, + "decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 0, + "hbMux": 4, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 0, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0 + }, + "rxSsiConfig": { + "ssiType": 0, + "ssiDataFormatSel": 0, + "numLaneSel": 0, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + } + } ] + }, + "tx": { + "txInitChannelMask": 12, + "txProfile": [ { + "primarySigBandwidth_Hz": 4500000, + "txInputRate_Hz": 7680000, + "txInterfaceSampleRate_Hz": 7680000, + "txOffsetLo_kHz": 0, + "validDataDelay": 0, + "txBbf3dBCorner_kHz": 50000, + "outputSignaling": 0, + "txPdBiasCurrent": 1, + "txPdGainEnable": 0, + "txPrePdRealPole_kHz": 1000000, + "txPostPdRealPole_kHz": 530000, + "txBbfPower": 2, + "txExtLoopBackType": 0, + "txExtLoopBackForInitCal": 0, + "txPeakLoopBackPower": 0, + "frequencyDeviation_Hz": 0, + "txDpProfile": { + "txPreProc": { + "txPreProcSymbol0": 0, + "txPreProcSymbol1": 0, + "txPreProcSymbol2": 0, + "txPreProcSymbol3": 0, + "txPreProcSymMapDivFactor": 1, + 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"phase": 0, + "realOut": 0 + } + } + }, + "txSsiConfig": { + "ssiType": 1, + "ssiDataFormatSel": 4, + "numLaneSel": 2, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 1, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + }, { + "primarySigBandwidth_Hz": 4500000, + "txInputRate_Hz": 7680000, + "txInterfaceSampleRate_Hz": 7680000, + "txOffsetLo_kHz": 0, + "validDataDelay": 0, + "txBbf3dBCorner_kHz": 50000, + "outputSignaling": 0, + "txPdBiasCurrent": 1, + "txPdGainEnable": 0, + "txPrePdRealPole_kHz": 1000000, + "txPostPdRealPole_kHz": 530000, + "txBbfPower": 2, + "txExtLoopBackType": 0, + "txExtLoopBackForInitCal": 0, + "txPeakLoopBackPower": 0, + "frequencyDeviation_Hz": 0, + "txDpProfile": { + "txPreProc": { + "txPreProcSymbol0": 0, + "txPreProcSymbol1": 0, + "txPreProcSymbol2": 0, + "txPreProcSymbol3": 0, + "txPreProcSymMapDivFactor": 1, + "txPreProcMode": 1, + "txPreProcWbNbPfirIBankSel": 2, + "txPreProcWbNbPfirQBankSel": 3 + }, + "txWbIntTop": { + "txInterpBy2Blk30En": 0, + "txInterpBy2Blk28En": 0, + "txInterpBy2Blk26En": 1, + "txInterpBy2Blk24En": 1, + "txInterpBy2Blk22En": 1, + "txWbLpfBlk22p1En": 0 + }, + "txNbIntTop": { + "txInterpBy2Blk20En": 0, + "txInterpBy2Blk18En": 0, + "txInterpBy2Blk16En": 0, + "txInterpBy2Blk14En": 0, + "txInterpBy2Blk12En": 0, + "txInterpBy3Blk10En": 0, + "txInterpBy2Blk8En": 0, + "txScicBlk32En": 0, + "txScicBlk32DivFactor": 1 + }, + "txIntTop": { + "interpBy3Blk44p1En": 1, + "sinc3Blk44En": 0, + "sinc2Blk42En": 0, + "interpBy3Blk40En": 1, + "interpBy2Blk38En": 0, + "interpBy2Blk36En": 0 + }, + "txIntTopFreqDevMap": { + "rrc2Frac": 0, + "mpll": 0, + "nchLsw": 0, + "nchMsb": 0, + "freqDevMapEn": 0, + "txRoundEn": 1 + }, + "txIqdmDuc": { + "iqdmDucMode": 0, + "iqdmDev": 0, + "iqdmDevOffset": 0, + "iqdmScalar": 0, + "iqdmThreshold": 0, + "iqdmNco": { + "freq": 0, + "sampleFreq": 61440000, + "phase": 0, + "realOut": 0 + } + } + }, + "txSsiConfig": { + "ssiType": 1, + "ssiDataFormatSel": 4, + "numLaneSel": 2, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 1, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + } ] + }, + "sysConfig": { + "duplexMode": 1, + "fhModeOn": 0, + "numDynamicProfiles": 1, + "mcsMode": 0, + "mcsInterfaceType": 0, + "adcTypeMonitor": 1, + "pllLockTime_us": 750, + "pllPhaseSyncWait_us": 0, + "pllModulus": { + "modulus": [ 8388593, 8388593, 8388593, 8388593, 8388593 ], + "dmModulus": [ 8388593, 8388593 ] + }, + "warmBootEnable": false + }, + "pfirBuffer": { + "pfirRxWbNbChFilterCoeff_A": { + "numCoeff": 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-6516, 5868, 27957, 5868, -6516, 5403, -3965, 2594, -1489, 734, -293, 83, -12 ] + }, { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 734, -1489, 2594, -3965, 5403, -6516, 5868, 27957, 5868, -6516, 5403, -3965, 2594, -1489, 734, -293, 83, -12 ] + } ], + "pfirRxMagLowTiaHighSRHp": [ { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -829, 201, 1857, -179, -4602, -1259, 11431, 19102, 11431, -1259, -4602, -179, 1857, 201, -829, 80, 194, -62 ] + }, { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -829, 201, 1857, -179, -4602, -1259, 11431, 19102, 11431, -1259, -4602, -179, 1857, 201, -829, 80, 194, -62 ] + } ], + "pfirRxMagHighTiaHighSRHp": [ { + "numCoeff": 21, + "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 714, -1485, 2134, -1844, -219, 4147, -8514, 8496, 26292, 8496, -8514, 4147, -219, -1844, 2134, -1485, 714, -229, 39 ] + } ], + "pfirRxMagLowTiaLowSRLp": [ { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + }, { + "numCoeff": 21, + "coefficients": [ -12, 83, -293, 733, -1488, 2593, -3963, 5401, -6514, 5870, 27953, 5870, -6514, 5401, -3963, 2593, -1488, 733, -293, 83, -12 ] + } ], + "pfirRxMagLowTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + }, { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + } ], + "pfirRxMagHighTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ] + } ], + "pfirTxMagComp1": { + "numCoeff": 21, + "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagComp2": { + "numCoeff": 21, + "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ], + "pfirRxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} \ No newline at end of file diff --git a/examples/adrv9002_profiles/lte_5_cmos_api_68_10_1.stream b/examples/adrv9002_profiles/lte_5_cmos_api_68_10_1.stream new file mode 100644 index 000000000..a1bfa376f Binary files /dev/null and b/examples/adrv9002_profiles/lte_5_cmos_api_68_10_1.stream differ diff --git a/examples/adrv9002_profiles/lte_5_cmos_api_68_13_7.json b/examples/adrv9002_profiles/lte_5_cmos_api_68_13_7.json new file mode 100644 index 000000000..03ddbe022 --- /dev/null +++ b/examples/adrv9002_profiles/lte_5_cmos_api_68_13_7.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + 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1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 1, + "ssiDataFormatSel": 4, + "numLaneSel": 2, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + "lvdsUseLsbIn12bitMode": 0, + "lvdsRxClkInversionEn": false, + "cmosDdrPosClkEn": false, + "cmosClkInversionEn": false, + "ddrEn": false, + "rxMaskStrobeEn": false + } + } + }, { + "profile": { + "primarySigBandwidth_Hz": 4500000, + "rxOutputRate_Hz": 7680000, + "rxInterfaceSampleRate_Hz": 7680000, + "rxOffsetLo_kHz": 0, + "rxNcoEnable": false, + "outputSignaling": 0, + "filterOrder": 1, + "filterOrderLp": 1, + "hpAdcCorner": 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0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 2, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 1 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, + "rxSsiConfig": { + "ssiType": 1, + "ssiDataFormatSel": 4, + "numLaneSel": 2, + "strobeType": 0, + "lsbFirst": 0, + "qFirst": 0, + "txRefClockPin": 0, + "lvdsIBitInversion": false, + "lvdsQBitInversion": false, + "lvdsStrobeBitInversion": false, + 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"decBy2Hb5Blk19p1En": 0, + "decBy2Hb6Blk19p2En": 0 + }, + "rxSincHBTop": { + "sincGainMux": 1, + "sincMux": 4, + "hbMux": 2, + "isGainCompEnabled": 0, + "gainComp9GainI": [ 16384, 16384, 16384, 16384, 16384, 16384 ], + "gainComp9GainQ": [ 0, 0, 0, 0, 0, 0 ] + }, + "rxNbDem": { + "dpInFifo": { + "dpInFifoEn": 0, + "dpInFifoMode": 0, + "dpInFifoTestDataSel": 0 + }, + "rxNbNco": { + "rxNbNcoEn": 0, + "rxNbNcoConfig": { + "freq": 0, + "sampleFreq": 0, + "phase": 0, + "realOut": 0 + } + }, + "rxWbNbCompPFir": { + "bankSel": 1, + "rxWbNbCompPFirInMuxSel": 0, + "rxWbNbCompPFirEn": 0 + }, + "resamp": { + "rxResampEn": 0, + "resampPhaseI": 0, + "resampPhaseQ": 0 + }, + "gsOutMuxSel": 1, + "rxOutSel": 0, + "rxRoundMode": 0, + "dpArmSel": 0 + } + }, + "lnaConfig": { + "externalLnaPresent": false, + "gpioSourceSel": 0, + "externalLnaPinSel": 0, + "settlingDelay": 0, + "numberLnaGainSteps": 0, + "lnaGainSteps_mdB": [ 0, 0, 0, 0 ], + "lnaDigitalGainDelay": 0, + "minGainIndex": 0, + "lnaType": 0 + }, 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2593, -1488, 733, -293, 83, -12 ] + } ], + "pfirRxMagLowTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + }, { + "numCoeff": 21, + "coefficients": [ -62, 194, 80, -828, 201, 1855, -180, -4597, -1254, 11428, 19093, 11428, -1254, -4597, -180, 1855, 201, -828, 80, 194, -62 ] + } ], + "pfirRxMagHighTiaHighSRLp": [ { + "numCoeff": 21, + "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ] + }, { + "numCoeff": 21, + "coefficients": [ 39, -229, 712, -1481, 2128, -1841, -215, 4131, -8490, 8497, 26266, 8497, -8490, 4131, -215, -1841, 2128, -1481, 712, -229, 39 ] + } ], + "pfirTxMagComp1": { + "numCoeff": 21, + "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagComp2": { + "numCoeff": 21, + "coefficients": [ 69, -384, 1125, -2089, 2300, -165, -5248, 12368, -13473, 4864, 34039, 4864, -13473, 12368, -5248, -165, 2300, -2089, 1125, -384, 69 ] + }, + "pfirTxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ], + "pfirRxMagCompNb": [ { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + }, { + "numCoeff": 13, + "coefficients": [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] + } ] + } +} diff --git a/examples/adrv9002_profiles/lte_5_cmos_api_68_13_7.stream b/examples/adrv9002_profiles/lte_5_cmos_api_68_13_7.stream new file mode 100644 index 000000000..79bfb3e61 Binary files /dev/null and b/examples/adrv9002_profiles/lte_5_cmos_api_68_13_7.stream differ diff --git a/examples/adrv9002_profiles/lte_5_cmos_api_68_8_1.json b/examples/adrv9002_profiles/lte_5_cmos_api_68_8_1.json new file mode 100644 index 000000000..edb2e0344 --- /dev/null +++ b/examples/adrv9002_profiles/lte_5_cmos_api_68_8_1.json @@ -0,0 +1,1328 @@ +{ + "clocks": { + "deviceClock_kHz": 38400, + "clkPllVcoFreq_daHz": 884736000, + "clkPllHsDiv": 0, + "clkPllMode": 0, + "clk1105Div": 2, + "armClkDiv": 6, + "armPowerSavingClkDiv": 1, + "refClockOutEnable": true, + "auxPllPower": 2, + "clkPllPower": 2, + "padRefClkDrv": 0, + "extLo1OutFreq_kHz": 0, + "extLo2OutFreq_kHz": 0, + "rfPll1LoMode": 0, + "rfPll2LoMode": 0, + "ext1LoType": 0, + "ext2LoType": 0, + "rx1RfInputSel": 0, + "rx2RfInputSel": 0, + "extLo1Divider": 2, + "extLo2Divider": 2, + "rfPllPhaseSyncMode": 0, + "rx1LoSelect": 2, + "rx2LoSelect": 2, + "tx1LoSelect": 1, + "tx2LoSelect": 1, + "rx1LoDivMode": 1, + "rx2LoDivMode": 1, + "tx1LoDivMode": 1, + "tx2LoDivMode": 1, + "loGen1Select": 1, + "loGen2Select": 1 + }, + "rx": { + "rxInitChannelMask": 195, + "rxChannelCfg": [ { + "profile": { + "primarySigBandwidth_Hz": 4500000, + "rxOutputRate_Hz": 7680000, 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