diff --git a/adi/ad4080.py b/adi/ad4080.py
index a51400032..a9ba8ef6b 100644
--- a/adi/ad4080.py
+++ b/adi/ad4080.py
@@ -42,7 +42,16 @@ def test_mode(self):
     @test_mode.setter
     def test_mode(self, value):
         self._set_iio_attr_str("voltage0", "test_mode", False, value, self._rxadc)
-
+        
+    @property
+    def lvds_sync(self):
+        """test_mode: Select Test Mode. Options are:
+        off midscale_short pos_fullscale neg_fullscale checkerboard pn_long pn_short one_zero_toggle user ramp"""
+        return self._get_iio_attr_str("voltage0", "lvds_sync", False)
+    @lvds_sync.setter
+    def lvds_sync(self, value):
+        self._set_iio_attr_str("voltage0", "lvds_sync", False, value, self._rxadc)
+    
     @property
     def test_mode_available(self):
         """test_mode_available: Options are:
@@ -63,3 +72,13 @@ def scale_available(self):
     def sampling_frequency(self):
         """sampling_frequency: Sampling frequency value"""
         return self._get_iio_attr("voltage0", "sampling_frequency", False)
+    
+    def ad4080_register_read(self, reg):
+        """Direct Register Access via debugfs"""
+        self._set_iio_debug_attr_str("direct_reg_access", reg, self._ctrl)
+        ret = self._get_iio_debug_attr_str("direct_reg_access", self._ctrl)
+        return ret
+
+    def ad4080_register_write(self, reg, value):
+        """Direct Register Access via debugfs"""
+        self._set_iio_debug_attr_str("direct_reg_access", f"{reg} {value}", self._ctrl)
diff --git a/examples/ad9213_instrumentation_example.py b/examples/ad9213_instrumentation_example.py
new file mode 100755
index 000000000..0da0c37c0
--- /dev/null
+++ b/examples/ad9213_instrumentation_example.py
@@ -0,0 +1,81 @@
+# Copyright (C) 2019 Analog Devices, Inc.
+#
+# SPDX short identifier: ADIBSD
+
+# Copyright (C) 2019 Analog Devices, Inc.
+#
+# SPDX short identifier: ADIBSD
+
+import time
+import sys
+import adi
+import matplotlib.pyplot as plt
+import numpy as np
+from scipy import signal
+
+my_uri = sys.argv[1] if len(sys.argv) >= 2 else "local:"
+print("uri: " + str(my_uri))
+
+# Create contexts
+
+ad9213_transport = adi.ad9213(uri=my_uri,device_name="axi-adrv9213-rx-hpc")
+ad9213_phy       = adi.ad9213(uri=my_uri,device_name="ad9213") 
+ad4080_dev       = adi.ad4080(uri=my_uri)
+gpio_controller  = adi.one_bit_adc_dac(uri=my_uri, name="one-bit-adc-dac")
+ltc2664_dev      = adi.ltc2664(uri=my_uri)
+
+# Control the GPIO's
+
+gpio_controller.gpio_ltc2664_clr  = 1
+gpio_controller.gpio_ltc2664_ldac = 0
+gpio_controller.gpio_ltc2664_tgp  = 0
+
+gpio_controller.gpio_ada4945_disable  = 1
+gpio_controller.gpio_adg5419_ctrl     = 1
+gpio_controller.gpio_hmc7044_sync_req = 0
+
+gpio_controller.gpio_adrf5203_ctrl0 = 1
+gpio_controller.gpio_adrf5203_ctrl1 = 0
+gpio_controller.gpio_adrf5203_ctrl2 = 0
+
+# Configure the AD9213 device
+
+ad9213_transport.rx_buffer_size = 8192
+ad9213_phy.ad9213_register_write(0x1617,0x01)
+ad9213_phy.ad9213_register_write(0x1601,0x01)
+
+# Configure the AD4080 device 
+
+ad4080_dev.rx_buffer_size = 8192
+
+# ad4080_dev.lvds_sync = "enable"
+
+# Configure the LTC2664 device 
+
+ltc2664_dev.voltage0.raw = 32768  
+
+ltc2664_dev.voltage1.raw = 49152 
+print(f"ltc2664_dev.voltage1 is {ltc2664_dev.voltage1.volt}")
+ltc2664_dev.voltage2.raw = 36045
+print(f"ltc2664_dev.voltage2 is {ltc2664_dev.voltage2.volt}")
+# rx data 
+
+data_ad9213 = ad9213_transport.rx()
+data_ad4080 = ad4080_dev.rx()
+
+# plot setup
+
+t1 = np.arange(0, ad9213_transport.rx_buffer_size)
+t2 = np.arange(0, ad4080_dev.rx_buffer_size)
+fig, (ch1,ch2) = plt.subplots(1, 2)
+
+fig.suptitle("AD9213 INSTRUMENTATION Data")
+ch1.plot(t1, data_ad9213)
+ch1.set_ylabel("AD9213 amplitude")
+ch2.plot(t2, data_ad4080)
+ch2.set_ylabel("AD4080 amplitude")
+ch2.set_xlabel("Samples")
+plt.show()
+
+ad9213_transport.rx_destroy_buffer()
+ad4080_dev.rx_destroy_buffer()
\ No newline at end of file