From 26ef7a82023fd55760ecfeb38590ce96846e903f Mon Sep 17 00:00:00 2001 From: Laez Barbosa Date: Fri, 6 Sep 2024 10:17:59 -0300 Subject: [PATCH] SPI Engine: add sw control for sdo source Signed-off-by: Laez Barbosa --- library/regmaps/adi_regmap_spi_engine_pkg.sv | 13 +++++++-- testbenches/ip/spi_engine/cfgs/cfg1.tcl | 1 - testbenches/ip/spi_engine/cfgs/cfg_inv_cs.tcl | 1 - .../ip/spi_engine/cfgs/cfg_sdo_streaming.tcl | 1 - .../ip/spi_engine/tests/test_program.sv | 28 +++++++++++-------- .../project/ad57xx/tests/test_program.sv | 3 ++ 6 files changed, 29 insertions(+), 18 deletions(-) diff --git a/library/regmaps/adi_regmap_spi_engine_pkg.sv b/library/regmaps/adi_regmap_spi_engine_pkg.sv index cb8fdcfe..b7a90bd3 100644 --- a/library/regmaps/adi_regmap_spi_engine_pkg.sv +++ b/library/regmaps/adi_regmap_spi_engine_pkg.sv @@ -33,7 +33,7 @@ // *************************************************************************** // *************************************************************************** /* Auto generated Register Map */ -/* Wed Jul 24 09:28:37 2024 */ +/* Tue Oct 29 19:18:58 2024 */ package adi_regmap_spi_engine_pkg; import adi_regmap_pkg::*; @@ -43,8 +43,8 @@ package adi_regmap_spi_engine_pkg; const reg_t AXI_SPI_ENGINE_VERSION = '{ 'h0000, "VERSION" , '{ "VERSION_MAJOR": '{ 31, 16, RO, 'h00000001 }, - "VERSION_MINOR": '{ 15, 8, RO, 'h00000003 }, - "VERSION_PATCH": '{ 7, 0, RO, 'h00000000 }}}; + "VERSION_MINOR": '{ 15, 8, RO, 'h00000004 }, + "VERSION_PATCH": '{ 7, 0, RO, 'h00000001 }}}; `define SET_AXI_SPI_ENGINE_VERSION_VERSION_MAJOR(x) SetField(AXI_SPI_ENGINE_VERSION,"VERSION_MAJOR",x) `define GET_AXI_SPI_ENGINE_VERSION_VERSION_MAJOR(x) GetField(AXI_SPI_ENGINE_VERSION,"VERSION_MAJOR",x) `define DEFAULT_AXI_SPI_ENGINE_VERSION_VERSION_MAJOR GetResetValue(AXI_SPI_ENGINE_VERSION,"VERSION_MAJOR") @@ -257,6 +257,13 @@ package adi_regmap_spi_engine_pkg; `define DEFAULT_AXI_SPI_ENGINE_OFFLOAD0_MEM_RESET_OFFLOAD0_MEM_RESET GetResetValue(AXI_SPI_ENGINE_OFFLOAD0_MEM_RESET,"OFFLOAD0_MEM_RESET") `define UPDATE_AXI_SPI_ENGINE_OFFLOAD0_MEM_RESET_OFFLOAD0_MEM_RESET(x,y) UpdateField(AXI_SPI_ENGINE_OFFLOAD0_MEM_RESET,"OFFLOAD0_MEM_RESET",x,y) + const reg_t AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL = '{ 'h010c, "OFFLOAD0_SDO_SRC_SEL" , '{ + "OFFLOAD0_SDO_SRC_SEL": '{ 31, 0, RW, 'h00000000 }}}; + `define SET_AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL_OFFLOAD0_SDO_SRC_SEL(x) SetField(AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL,"OFFLOAD0_SDO_SRC_SEL",x) + `define GET_AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL_OFFLOAD0_SDO_SRC_SEL(x) GetField(AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL,"OFFLOAD0_SDO_SRC_SEL",x) + `define DEFAULT_AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL_OFFLOAD0_SDO_SRC_SEL GetResetValue(AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL,"OFFLOAD0_SDO_SRC_SEL") + `define UPDATE_AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL_OFFLOAD0_SDO_SRC_SEL(x,y) UpdateField(AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL,"OFFLOAD0_SDO_SRC_SEL",x,y) + const reg_t AXI_SPI_ENGINE_OFFLOAD0_CDM_FIFO = '{ 'h0110, "OFFLOAD0_CDM_FIFO" , '{ "OFFLOAD0_CDM_FIFO": '{ 31, 0, WO, 'hXXXXXXXX }}}; `define SET_AXI_SPI_ENGINE_OFFLOAD0_CDM_FIFO_OFFLOAD0_CDM_FIFO(x) SetField(AXI_SPI_ENGINE_OFFLOAD0_CDM_FIFO,"OFFLOAD0_CDM_FIFO",x) diff --git a/testbenches/ip/spi_engine/cfgs/cfg1.tcl b/testbenches/ip/spi_engine/cfgs/cfg1.tcl index 19d8eb87..14dc9642 100644 --- a/testbenches/ip/spi_engine/cfgs/cfg1.tcl +++ b/testbenches/ip/spi_engine/cfgs/cfg1.tcl @@ -32,7 +32,6 @@ set ad_project_params(NUM_OF_WORDS) 3 set ad_project_params(NUM_OF_TRANSFERS) 5 set ad_project_params(CS_ACTIVE_HIGH) 0 set ad_project_params(ECHO_SCLK_DELAY) 0.1 -set ad_project_params(SDO_MEM_WORDS) 1 set spi_s_vip_cfg [ list \ MODE 0 \ diff --git a/testbenches/ip/spi_engine/cfgs/cfg_inv_cs.tcl b/testbenches/ip/spi_engine/cfgs/cfg_inv_cs.tcl index 1238c667..8e18ab15 100644 --- a/testbenches/ip/spi_engine/cfgs/cfg_inv_cs.tcl +++ b/testbenches/ip/spi_engine/cfgs/cfg_inv_cs.tcl @@ -32,7 +32,6 @@ set ad_project_params(NUM_OF_WORDS) 3 set ad_project_params(NUM_OF_TRANSFERS) 5 set ad_project_params(CS_ACTIVE_HIGH) 1 set ad_project_params(ECHO_SCLK_DELAY) 0.1 -set ad_project_params(SDO_MEM_WORDS) 2 set spi_s_vip_cfg [ list \ MODE 0 \ diff --git a/testbenches/ip/spi_engine/cfgs/cfg_sdo_streaming.tcl b/testbenches/ip/spi_engine/cfgs/cfg_sdo_streaming.tcl index a9cdd37e..523eadfc 100644 --- a/testbenches/ip/spi_engine/cfgs/cfg_sdo_streaming.tcl +++ b/testbenches/ip/spi_engine/cfgs/cfg_sdo_streaming.tcl @@ -32,7 +32,6 @@ set ad_project_params(NUM_OF_WORDS) 5 set ad_project_params(NUM_OF_TRANSFERS) 3 set ad_project_params(CS_ACTIVE_HIGH) 0 set ad_project_params(ECHO_SCLK_DELAY) 0.1 -set ad_project_params(SDO_MEM_WORDS) 2 set spi_s_vip_cfg [ list \ MODE 0 \ diff --git a/testbenches/ip/spi_engine/tests/test_program.sv b/testbenches/ip/spi_engine/tests/test_program.sv index 191d0dd2..f0e6ca1a 100644 --- a/testbenches/ip/spi_engine/tests/test_program.sv +++ b/testbenches/ip/spi_engine/tests/test_program.sv @@ -270,8 +270,6 @@ bit [`DATA_DLENGTH-1:0] sdi_read_data_store [(`NUM_OF_TRANSFERS)*(`NUM_OF_WORDS) bit [`DATA_DLENGTH-1:0] sdo_write_data_store [(`NUM_OF_TRANSFERS)*(`NUM_OF_WORDS) -1 :0]; bit [`DATA_DLENGTH-1:0] rx_data; bit [`DATA_DLENGTH-1:0] tx_data; -localparam sdo_mem_num = (`SDO_STREAMING) ? (`MIN((`NUM_OF_WORDS),(`SDO_MEM_WORDS))) : (`NUM_OF_WORDS); -bit [`DATA_DLENGTH-1:0] one_shot_sdo_data [sdo_mem_num-1 :0] = '{default:'0}; task offload_spi_test(); //Configure DMA @@ -284,6 +282,11 @@ task offload_spi_test(); env.mng.RegWrite32(`SPI_ENGINE_DMA_BA + GetAddrs(DMAC_DEST_ADDRESS), `SET_DMAC_DEST_ADDRESS_DEST_ADDRESS(`DDR_BA)); env.mng.RegWrite32(`SPI_ENGINE_DMA_BA + GetAddrs(DMAC_TRANSFER_SUBMIT), `SET_DMAC_TRANSFER_SUBMIT_TRANSFER_SUBMIT(1)); + `ifdef DEF_SDO_STREAMING + // Enable SDO Offload + axi_write(`SPI_ENGINE_SPI_REGMAP_BA + GetAddrs(AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL), `SET_AXI_SPI_ENGINE_OFFLOAD0_SDO_SRC_SEL_OFFLOAD0_SDO_SRC_SEL(1)); + `endif + // Configure the Offload module axi_write (`SPI_ENGINE_SPI_REGMAP_BA + GetAddrs(AXI_SPI_ENGINE_OFFLOAD0_CDM_FIFO), `INST_CFG); axi_write (`SPI_ENGINE_SPI_REGMAP_BA + GetAddrs(AXI_SPI_ENGINE_OFFLOAD0_CDM_FIFO), `INST_PRESCALE); @@ -297,21 +300,22 @@ task offload_spi_test(); axi_write (`SPI_ENGINE_SPI_REGMAP_BA + GetAddrs(AXI_SPI_ENGINE_OFFLOAD0_CDM_FIFO), `INST_SYNC | 2); // Enqueue transfers transfers to DUT - for (int i = 0; i