From 1df12035c5e1e4e1f89eb0265359a54661f84c63 Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Mon, 29 Apr 2024 13:09:40 -0700 Subject: [PATCH] dbSta: clang-tidy Signed-off-by: Matt Liberty --- src/dbSta/src/dbReadVerilog.cc | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/dbSta/src/dbReadVerilog.cc b/src/dbSta/src/dbReadVerilog.cc index 7f86c3f5267..f94ae9c074c 100644 --- a/src/dbSta/src/dbReadVerilog.cc +++ b/src/dbSta/src/dbReadVerilog.cc @@ -318,8 +318,7 @@ void Verilog2db::makeDbModule( module = block_->getTopModule(); } else { module = makeUniqueDbModule(network_->name(cell)); - inst_module_vec.emplace_back( - std::pair(inst, parent)); + inst_module_vec.emplace_back(inst, parent); std::string module_inst_name = network_->name(inst); size_t last_idx = module_inst_name.find_last_of('/'); @@ -435,8 +434,7 @@ void Verilog2db::makeDbModule( } auto db_inst = dbInst::create(block_, master, child_name, false, module); - inst_module_vec.emplace_back( - std::pair(child, module)); + inst_module_vec.emplace_back(child, module); if (db_inst == nullptr) { logger_->warn(ORD,