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regolden hier cases in rsz for new verilog netlister
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Signed-off-by: andyfox-rushc <[email protected]>
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andyfox-rushc committed Dec 15, 2024
1 parent f95d34c commit 9f59231
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Showing 3 changed files with 58 additions and 58 deletions.
20 changes: 10 additions & 10 deletions src/rsz/test/repair_setup4_hier_out.vok
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ module submodule (r1q,
DFF_X1 r10 (.D(r1q));
DFF_X1 r11 (.D(r1q));
DFF_X1 r12 (.D(r1q));
DFF_X1 r2 (.D(\u1/u5z ),
DFF_X1 r2 (.D(u5z),
.CK(clk));
DFF_X1 r3 (.D(r1q),
.CK(clk));
Expand All @@ -33,13 +33,13 @@ module submodule (r1q,
DFF_X1 r8 (.D(r1q));
DFF_X1 r9 (.D(r1q));
BUF_X2 u1 (.A(r1q),
.Z(\u1/u1z ));
BUF_X4 u2 (.A(\u1/u1z ),
.Z(\u1/u2z ));
BUF_X4 u3 (.A(\u1/u2z ),
.Z(\u1/u3z ));
BUF_X4 u4 (.A(\u1/u3z ),
.Z(\u1/u4z ));
BUF_X4 u5 (.A(\u1/u4z ),
.Z(\u1/u5z ));
.Z(u1z));
BUF_X4 u2 (.A(u1z),
.Z(u2z));
BUF_X4 u3 (.A(u2z),
.Z(u3z));
BUF_X4 u4 (.A(u3z),
.Z(u4z));
BUF_X4 u5 (.A(u4z),
.Z(u5z));
endmodule
16 changes: 8 additions & 8 deletions src/rsz/test/resize1_hier.vok
Original file line number Diff line number Diff line change
Expand Up @@ -35,16 +35,16 @@ module u1 (in1,

DFF_X2 r1 (.D(in1),
.CK(clk1),
.Q(\u1/r1q ));
.Q(r1q));
DFF_X1 r2 (.D(in2),
.CK(clk2),
.Q(\u1/r2q ));
DFF_X1 r3 (.D(\u1/u2z ),
.Q(r2q));
DFF_X1 r3 (.D(u2z),
.CK(clk3),
.Q(out));
BUF_X1 u1 (.A(\u1/r2q ),
.Z(\u1/u1z ));
AND2_X1 u2 (.A1(\u1/r1q ),
.A2(\u1/u1z ),
.ZN(\u1/u2z ));
BUF_X1 u1 (.A(r2q),
.Z(u1z));
AND2_X1 u2 (.A1(r1q),
.A2(u1z),
.ZN(u2z));
endmodule
80 changes: 40 additions & 40 deletions src/rsz/test/split_load_hier_out.vok
Original file line number Diff line number Diff line change
Expand Up @@ -41,23 +41,23 @@ module submodule (net20_i,
input clk;


DFF_X1 r1 (.D(\u1/u6z ),
DFF_X1 r1 (.D(u6z),
.CK(clk));
DFF_X1 r10 (.D(\u1/u15z ),
DFF_X1 r10 (.D(u15z),
.CK(clk));
DFF_X1 r11 (.D(\u1/u16z ),
DFF_X1 r11 (.D(u16z),
.CK(clk));
DFF_X1 r12 (.D(\u1/u17z ),
DFF_X1 r12 (.D(u17z),
.CK(clk));
DFF_X1 r13 (.D(\u1/u18z ),
DFF_X1 r13 (.D(u18z),
.CK(clk));
DFF_X1 r14 (.D(\u1/u19z ),
DFF_X1 r14 (.D(u19z),
.CK(clk));
DFF_X1 r15 (.D(\u1/u20z ),
DFF_X1 r15 (.D(u20z),
.CK(clk));
DFF_X1 r2 (.D(\u1/u7z ),
DFF_X1 r2 (.D(u7z),
.CK(clk));
DFF_X1 r21 (.D(\u1/u5z ),
DFF_X1 r21 (.D(u5z),
.CK(clk));
DFF_X1 r22 (.D(net20_i),
.CK(clk));
Expand All @@ -72,60 +72,60 @@ module submodule (net20_i,
DFF_X1 r27 (.D(net20_i));
DFF_X1 r28 (.D(net20_i));
DFF_X1 r29 (.D(net20_i));
DFF_X1 r3 (.D(\u1/u8z ),
DFF_X1 r3 (.D(u8z),
.CK(clk));
DFF_X1 r30 (.D(net20_i));
DFF_X1 r31 (.D(net20_i));
DFF_X1 r4 (.D(\u1/u9z ),
DFF_X1 r4 (.D(u9z),
.CK(clk));
DFF_X1 r5 (.D(\u1/u10z ),
DFF_X1 r5 (.D(u10z),
.CK(clk));
DFF_X1 r6 (.D(\u1/u11z ),
DFF_X1 r6 (.D(u11z),
.CK(clk));
DFF_X1 r7 (.D(\u1/u12z ),
DFF_X1 r7 (.D(u12z),
.CK(clk));
DFF_X1 r8 (.D(\u1/u13z ),
DFF_X1 r8 (.D(u13z),
.CK(clk));
DFF_X1 r9 (.D(\u1/u14z ),
DFF_X1 r9 (.D(u14z),
.CK(clk));
BUF_X4 u1 (.A(net2_i),
.Z(\u1/u6z ));
.Z(u6z));
BUF_X4 u10 (.A(net2_i),
.Z(\u1/u15z ));
.Z(u15z));
BUF_X4 u11 (.A(net2_i),
.Z(\u1/u16z ));
.Z(u16z));
BUF_X1 u12 (.A(r1q),
.Z(\u1/u17z ));
.Z(u17z));
BUF_X1 u13 (.A(r1q),
.Z(\u1/u18z ));
.Z(u18z));
BUF_X4 u14 (.A(r1q),
.Z(\u1/u19z ));
.Z(u19z));
BUF_X4 u15 (.A(r1q),
.Z(\u1/u20z ));
.Z(u20z));
BUF_X4 u16 (.A(r1q),
.Z(\u1/u1z ));
BUF_X2 u17 (.A(\u1/u1z ),
.Z(\u1/u2z ));
BUF_X2 u18 (.A(\u1/u2z ),
.Z(\u1/u3z ));
BUF_X2 u19 (.A(\u1/u3z ),
.Z(\u1/u4z ));
.Z(u1z));
BUF_X2 u17 (.A(u1z),
.Z(u2z));
BUF_X2 u18 (.A(u2z),
.Z(u3z));
BUF_X2 u19 (.A(u3z),
.Z(u4z));
BUF_X4 u2 (.A(r1q),
.Z(\u1/u7z ));
BUF_X4 u20 (.A(\u1/u4z ),
.Z(\u1/u5z ));
.Z(u7z));
BUF_X4 u20 (.A(u4z),
.Z(u5z));
BUF_X4 u3 (.A(r1q),
.Z(\u1/u8z ));
.Z(u8z));
BUF_X4 u4 (.A(r1q),
.Z(\u1/u9z ));
.Z(u9z));
BUF_X1 u5 (.A(r1q),
.Z(\u1/u10z ));
.Z(u10z));
BUF_X1 u6 (.A(r1q),
.Z(\u1/u11z ));
.Z(u11z));
BUF_X1 u7 (.A(r1q),
.Z(\u1/u12z ));
.Z(u12z));
BUF_X1 u8 (.A(r1q),
.Z(\u1/u13z ));
.Z(u13z));
BUF_X1 u9 (.A(r1q),
.Z(\u1/u14z ));
.Z(u14z));
endmodule

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