From 980ad2290e1f458f1590f6ba769e445fac578d47 Mon Sep 17 00:00:00 2001 From: Arthur Koucher Date: Wed, 21 Feb 2024 21:27:35 -0300 Subject: [PATCH 01/30] use rect object instead of keeping many floats in macro placement Signed-off-by: Arthur Koucher --- src/mpl2/src/hier_rtlmp.cpp | 42 +++++++++++++++++++++---------------- 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/src/mpl2/src/hier_rtlmp.cpp b/src/mpl2/src/hier_rtlmp.cpp index 04547c1833d..fe0da9fe112 100644 --- a/src/mpl2/src/hier_rtlmp.cpp +++ b/src/mpl2/src/hier_rtlmp.cpp @@ -5415,12 +5415,12 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) "Place macros in cluster: {}", cluster->getName()); // get outline constraint - const float lx = cluster->getX(); - const float ly = cluster->getY(); - const float outline_width = cluster->getWidth(); - const float outline_height = cluster->getHeight(); - const float ux = lx + outline_width; - const float uy = ly + outline_height; + + const Rect outline(cluster->getX(), + cluster->getY(), + cluster->getX() + cluster->getWidth(), + cluster->getY() + cluster->getHeight()); + // the macros for Simulated Annealing Core std::vector macros; // the clusters for each hard macro. @@ -5445,11 +5445,13 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) cluster_id_macro_id_map[cluster_id_] = macro_id; if (fences_.find(hard_macro->getName()) != fences_.end()) { fences[macro_id] = fences_[hard_macro->getName()]; - fences[macro_id].relocate(lx, ly, ux, uy); + fences[macro_id].relocate( + outline.xMin(), outline.yMin(), outline.xMax(), outline.yMax()); } if (guides_.find(hard_macro->getName()) != guides_.end()) { guides[macro_id] = guides_[hard_macro->getName()]; - guides[macro_id].relocate(lx, ly, ux, uy); + guides[macro_id].relocate( + outline.xMin(), outline.yMin(), outline.xMax(), outline.yMax()); } macros.push_back(*hard_macro); cluster_map_[cluster_id_++] = macro_cluster; @@ -5475,8 +5477,10 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) cluster_id_macro_id_map[cluster_id] = macros.size(); macros.emplace_back( std::pair( - temp_cluster->getX() + temp_cluster->getWidth() / 2.0 - lx, - temp_cluster->getY() + temp_cluster->getHeight() / 2.0 - ly), + temp_cluster->getX() + temp_cluster->getWidth() / 2.0 + - outline.xMin(), + temp_cluster->getY() + temp_cluster->getHeight() / 2.0 + - outline.yMin()), temp_cluster->getName()); } // create bundled net @@ -5526,13 +5530,15 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { // change the aspect ratio - const float width = outline_width * vary_factor_list[run_id++]; - const float height = outline_width * outline_height / width; + const float width = outline.getWidth() * vary_factor_list[run_id++]; + const float height = outline.getWidth() * outline.getHeight() / width; if (graphics_) { - odb::Rect outline( - dbu_ * lx, dbu_ * ly, dbu_ * (lx + width), dbu_ * (ly + height)); - graphics_->setOutline(outline); + odb::Rect dbu_outline(dbu_ * outline.xMin(), + dbu_ * outline.yMin(), + dbu_ * outline.xMax(), + dbu_ * outline.yMax()); + graphics_->setOutline(dbu_outline); } SACoreHardMacro* sa @@ -5577,7 +5583,7 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); // add SA to containers - if (sa->isValid(outline_width, outline_height) + if (sa->isValid(outline.getWidth(), outline.getHeight()) && sa->getNormCost() < best_cost) { best_cost = sa->getNormCost(); best_sa = sa; @@ -5614,8 +5620,8 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) // update OpenDB for (auto& hard_macro : hard_macros) { num_updated_macros_++; - hard_macro->setX(hard_macro->getX() + lx); - hard_macro->setY(hard_macro->getY() + ly); + hard_macro->setX(hard_macro->getX() + outline.xMin()); + hard_macro->setY(hard_macro->getY() + outline.yMin()); // hard_macro->updateDb(pitch_x_, pitch_y_); } // clean SA to avoid memory leakage From a9453541be71a16691735bd2a01b22735e8bed03 Mon Sep 17 00:00:00 2001 From: Arthur Koucher Date: Wed, 21 Feb 2024 21:39:12 -0300 Subject: [PATCH 02/30] mpl2: use rect object instead of keeping floats in coarse shaping Signed-off-by: Arthur Koucher --- src/mpl2/src/hier_rtlmp.cpp | 40 ++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/src/mpl2/src/hier_rtlmp.cpp b/src/mpl2/src/hier_rtlmp.cpp index fe0da9fe112..176b720cdc1 100644 --- a/src/mpl2/src/hier_rtlmp.cpp +++ b/src/mpl2/src/hier_rtlmp.cpp @@ -2631,10 +2631,10 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) // the probability of all actions should be summed to 1.0. const float action_sum = pos_swap_prob_ + neg_swap_prob_ + double_swap_prob_ + exchange_swap_prob_ + resize_prob_; - // get outline constraint - // Here we use the floorplan size as the outline constraint - const float outline_width = root_cluster_->getWidth(); - const float outline_height = root_cluster_->getHeight(); + + const Rect outline( + 0, 0, root_cluster_->getWidth(), root_cluster_->getHeight()); + const int num_perturb_per_step = (macros.size() > num_perturb_per_step_ / 10) ? macros.size() : num_perturb_per_step_ / 10; @@ -2655,8 +2655,8 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline_width * vary_factor_list[run_id++]; - const float height = outline_height; + const float width = outline.getWidth() * vary_factor_list[run_id++]; + const float height = outline.getHeight(); SACoreSoftMacro* sa = new SACoreSoftMacro(width, height, @@ -2700,7 +2700,7 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline_width, outline_height) == true) { + if (sa->isValid(outline.getWidth(), outline.getHeight())) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } @@ -2716,8 +2716,8 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline_width; - const float height = outline_height * vary_factor_list[run_id++]; + const float width = outline.getWidth(); + const float height = outline.getHeight() * vary_factor_list[run_id++]; SACoreSoftMacro* sa = new SACoreSoftMacro(width, height, @@ -2761,7 +2761,7 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline_width, outline_height) == true) { + if (sa->isValid(outline.getWidth(), outline.getHeight())) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } @@ -2852,10 +2852,10 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) // set the action probabilities const float action_sum = pos_swap_prob_ + neg_swap_prob_ + double_swap_prob_ + exchange_swap_prob_; - // get outline constraint - // In this stage, we use the floorplan size as the outline - const float outline_width = root_cluster_->getWidth(); - const float outline_height = root_cluster_->getHeight(); + + const Rect outline( + 0, 0, root_cluster_->getWidth(), root_cluster_->getHeight()); + // update macros std::vector macros; macros.reserve(hard_macros.size()); @@ -2888,8 +2888,8 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline_width * vary_factor_list[run_id++]; - const float height = outline_height; + const float width = outline.getWidth() * vary_factor_list[run_id++]; + const float height = outline.getHeight(); SACoreHardMacro* sa = new SACoreHardMacro(width, height, @@ -2928,7 +2928,7 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline_width, outline_height) == true) { + if (sa->isValid(outline.getWidth(), outline.getHeight())) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } @@ -2944,8 +2944,8 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline_width; - const float height = outline_height * vary_factor_list[run_id++]; + const float width = outline.getWidth(); + const float height = outline.getHeight() * vary_factor_list[run_id++]; SACoreHardMacro* sa = new SACoreHardMacro(width, height, @@ -2984,7 +2984,7 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline_width, outline_height) == true) { + if (sa->isValid(outline.getWidth(), outline.getHeight())) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } From 523a25cdf30812ba4ccb31d4f9a5cc875b67aec7 Mon Sep 17 00:00:00 2001 From: Arthur Koucher Date: Wed, 21 Feb 2024 22:14:33 -0300 Subject: [PATCH 03/30] mpl2: SACore now receives a Rect instead of two floats for outline data Signed-off-by: Arthur Koucher --- src/mpl2/src/SACoreHardMacro.cpp | 12 ++--- src/mpl2/src/SACoreHardMacro.h | 3 +- src/mpl2/src/SACoreSoftMacro.cpp | 62 ++++++++++++------------ src/mpl2/src/SACoreSoftMacro.h | 3 +- src/mpl2/src/SimulatedAnnealingCore.cpp | 33 ++++++------- src/mpl2/src/SimulatedAnnealingCore.h | 8 ++-- src/mpl2/src/hier_rtlmp.cpp | 63 +++++++++++-------------- 7 files changed, 82 insertions(+), 102 deletions(-) diff --git a/src/mpl2/src/SACoreHardMacro.cpp b/src/mpl2/src/SACoreHardMacro.cpp index 27a987212bf..1cfd086e713 100644 --- a/src/mpl2/src/SACoreHardMacro.cpp +++ b/src/mpl2/src/SACoreHardMacro.cpp @@ -43,8 +43,7 @@ using utl::MPL; // Class SACoreHardMacro // constructors SACoreHardMacro::SACoreHardMacro( - float outline_width, - float outline_height, // boundary constraints + const Rect& outline, const std::vector& macros, // weight for different penalty float area_weight, @@ -65,8 +64,7 @@ SACoreHardMacro::SACoreHardMacro( unsigned seed, Mpl2Observer* graphics, utl::Logger* logger) - : SimulatedAnnealingCore(outline_width, - outline_height, + : SimulatedAnnealingCore(outline, macros, area_weight, outline_weight, @@ -89,7 +87,7 @@ SACoreHardMacro::SACoreHardMacro( float SACoreHardMacro::getAreaPenalty() const { - const float outline_area = outline_width_ * outline_height_; + const float outline_area = outline_.getWidth() * outline_.getHeight(); return (width_ * height_) / outline_area; } @@ -308,14 +306,14 @@ void SACoreHardMacro::printResults() 2, "width = {}, outline_width = {}", width_, - outline_width_); + outline_.getWidth()); debugPrint(logger_, MPL, "hierarchical_macro_placement", 2, "height = {}, outline_height = {}", height_, - outline_height_); + outline_.getHeight()); debugPrint(logger_, MPL, "hierarchical_macro_placement", diff --git a/src/mpl2/src/SACoreHardMacro.h b/src/mpl2/src/SACoreHardMacro.h index 4cbf7075ece..138ebf805cb 100644 --- a/src/mpl2/src/SACoreHardMacro.h +++ b/src/mpl2/src/SACoreHardMacro.h @@ -49,8 +49,7 @@ namespace mpl2 { class SACoreHardMacro : public SimulatedAnnealingCore { public: - SACoreHardMacro(float outline_width, - float outline_height, // boundary constraints + SACoreHardMacro(const Rect& outline, const std::vector& macros, // weight for different penalty float area_weight, diff --git a/src/mpl2/src/SACoreSoftMacro.cpp b/src/mpl2/src/SACoreSoftMacro.cpp index b07fb374842..d9f697e902c 100644 --- a/src/mpl2/src/SACoreSoftMacro.cpp +++ b/src/mpl2/src/SACoreSoftMacro.cpp @@ -43,8 +43,7 @@ using utl::MPL; // Class SACoreSoftMacro // constructors SACoreSoftMacro::SACoreSoftMacro( - float outline_width, - float outline_height, // boundary constraints + const Rect& outline, const std::vector& macros, // weight for different penalty float area_weight, @@ -71,8 +70,7 @@ SACoreSoftMacro::SACoreSoftMacro( unsigned seed, Mpl2Observer* graphics, utl::Logger* logger) - : SimulatedAnnealingCore(outline_width, - outline_height, + : SimulatedAnnealingCore(outline, macros, area_weight, outline_weight, @@ -129,7 +127,7 @@ float SACoreSoftMacro::getNotchPenalty() const float SACoreSoftMacro::getAreaPenalty() const { - const float outline_area = outline_width_ * outline_height_; + const float outline_area = outline_.getWidth() * outline_.getHeight(); return (width_ * height_) / outline_area; } @@ -285,8 +283,8 @@ void SACoreSoftMacro::initialize() // store current penalties width_list.push_back(width_); height_list.push_back(height_); - area_penalty_list.push_back(width_ * height_ / outline_width_ - / outline_height_); + area_penalty_list.push_back(width_ * height_ / outline_.getWidth() + / outline_.getHeight()); outline_penalty_list.push_back(outline_penalty_); wirelength_list.push_back(wirelength_); guidance_penalty_list.push_back(guidance_penalty_); @@ -390,8 +388,8 @@ void SACoreSoftMacro::calBoundaryPenalty() const float ly = macro.getY(); const float ux = lx + macro.getWidth(); const float uy = ly + macro.getHeight(); - const float x_dist = std::min(lx, std::abs(outline_width_ - ux)); - const float y_dist = std::min(ly, std::abs(outline_height_ - uy)); + const float x_dist = std::min(lx, std::abs(outline_.getWidth() - ux)); + const float y_dist = std::min(ly, std::abs(outline_.getHeight() - uy)); boundary_penalty_ += std::min(x_dist, y_dist) * macro.getNumMacro(); } } @@ -453,7 +451,7 @@ void SACoreSoftMacro::calMacroBlockagePenalty() // Align macro clusters to reduce notch void SACoreSoftMacro::alignMacroClusters() { - if (width_ > outline_width_ || height_ > outline_height_) { + if (width_ > outline_.getWidth() || height_ > outline_.getHeight()) { return; } // update threshold value @@ -468,8 +466,8 @@ void SACoreSoftMacro::alignMacroClusters() } } const float ratio = 0.1; - adjust_h_th_ = std::min(adjust_h_th_, outline_height_ * ratio); - adjust_v_th_ = std::min(adjust_v_th_, outline_width_ * ratio); + adjust_h_th_ = std::min(adjust_h_th_, outline_.getHeight() * ratio); + adjust_v_th_ = std::min(adjust_v_th_, outline_.getWidth() * ratio); // Align macro clusters to boundaries for (auto& macro : macros_) { @@ -481,14 +479,14 @@ void SACoreSoftMacro::alignMacroClusters() // align to left / right boundaries if (lx <= adjust_h_th_) { macro.setX(0.0); - } else if (outline_width_ - ux <= adjust_h_th_) { - macro.setX(outline_width_ - macro.getWidth()); + } else if (outline_.getWidth() - ux <= adjust_h_th_) { + macro.setX(outline_.getWidth() - macro.getWidth()); } // align to top / bottom boundaries if (ly <= adjust_v_th_) { macro.setY(0.0); - } else if (outline_height_ - uy <= adjust_v_th_) { - macro.setY(outline_height_ - macro.getHeight()); + } else if (outline_.getHeight() - uy <= adjust_v_th_) { + macro.setY(outline_.getHeight() - macro.getHeight()); } } } @@ -504,9 +502,10 @@ void SACoreSoftMacro::calNotchPenalty() } // If the floorplan cannot fit into the outline // We think the entire floorplan is a "huge" notch - if (width_ > outline_width_ * 1.001 || height_ > outline_height_ * 1.001) { - notch_penalty_ += outline_width_ * outline_height_ - / (outline_width_ * outline_height_); + if (width_ > outline_.getWidth() * 1.001 + || height_ > outline_.getHeight() * 1.001) { + notch_penalty_ += outline_.getWidth() * outline_.getHeight() + / (outline_.getWidth() * outline_.getHeight()); return; } @@ -533,8 +532,8 @@ void SACoreSoftMacro::calNotchPenalty() } x_point.insert(0.0); y_point.insert(0.0); - x_point.insert(outline_width_); - y_point.insert(outline_height_); + x_point.insert(outline_.getWidth()); + y_point.insert(outline_.getHeight()); // create grid std::vector x_grid(x_point.begin(), x_point.end()); std::vector y_grid(y_point.begin(), y_point.end()); @@ -682,7 +681,8 @@ void SACoreSoftMacro::calNotchPenalty() } macros_ = pre_macros_; // normalization - notch_penalty_ = notch_penalty_ / (outline_width_ * outline_height_); + notch_penalty_ + = notch_penalty_ / (outline_.getWidth() * outline_.getHeight()); if (graphics_) { graphics_->setNotchPenalty(notch_penalty_); } @@ -704,7 +704,7 @@ void SACoreSoftMacro::resizeOneCluster() const float ux = lx + src_macro.getWidth(); const float uy = ly + src_macro.getHeight(); // if the macro is outside of the outline, we randomly resize the macro - if (ux >= outline_width_ || uy >= outline_height_) { + if (ux >= outline_.getWidth() || uy >= outline_.getHeight()) { src_macro.resizeRandomly(distribution_, generator_); return; } @@ -717,7 +717,7 @@ void SACoreSoftMacro::resizeOneCluster() const float option = distribution_(generator_); if (option <= 0.25) { // Change the width of soft block to Rb = e.x2 - b.x1 - float e_x2 = outline_width_; + float e_x2 = outline_.getWidth(); for (const auto& macro : macros_) { const float cur_x2 = macro.getX() + macro.getWidth(); if (cur_x2 > ux && cur_x2 < e_x2) { @@ -739,7 +739,7 @@ void SACoreSoftMacro::resizeOneCluster() src_macro.setWidth(d_x2 - lx); } else if (option <= 0.75) { // change the height of soft block to Tb = a.y2 - b.y1 - float a_y2 = outline_height_; + float a_y2 = outline_.getHeight(); for (const auto& macro : macros_) { const float cur_y2 = macro.getY() + macro.getHeight(); if (cur_y2 > uy && cur_y2 < a_y2) { @@ -798,14 +798,14 @@ void SACoreSoftMacro::printResults() const 2, "width = {}, outline_width = {}", width_, - outline_width_); + outline_.getWidth()); debugPrint(logger_, MPL, "hierarchical_macro_placement", 2, "height = {}, outline_height = {}", height_, - outline_height_); + outline_.getHeight()); debugPrint( logger_, MPL, @@ -869,8 +869,8 @@ void SACoreSoftMacro::printResults() const void SACoreSoftMacro::fillDeadSpace() { // if the floorplan is invalid, do nothing - if (width_ > outline_width_ * (1.0 + 0.001) - || height_ > outline_height_ * (1.0 + 0.001)) { + if (width_ > outline_.getWidth() * (1.0 + 0.001) + || height_ > outline_.getHeight() * (1.0 + 0.001)) { return; } @@ -889,8 +889,8 @@ void SACoreSoftMacro::fillDeadSpace() } x_point.insert(0.0); y_point.insert(0.0); - x_point.insert(outline_width_); - y_point.insert(outline_height_); + x_point.insert(outline_.getWidth()); + y_point.insert(outline_.getHeight()); // create grid std::vector x_grid(x_point.begin(), x_point.end()); std::vector y_grid(y_point.begin(), y_point.end()); diff --git a/src/mpl2/src/SACoreSoftMacro.h b/src/mpl2/src/SACoreSoftMacro.h index 79066ced203..a378f49ceb9 100644 --- a/src/mpl2/src/SACoreSoftMacro.h +++ b/src/mpl2/src/SACoreSoftMacro.h @@ -50,8 +50,7 @@ class Graphics; class SACoreSoftMacro : public SimulatedAnnealingCore { public: - SACoreSoftMacro(float outline_width, - float outline_height, // boundary constraints + SACoreSoftMacro(const Rect& outline, const std::vector& macros, // weight for different penalty float area_weight, diff --git a/src/mpl2/src/SimulatedAnnealingCore.cpp b/src/mpl2/src/SimulatedAnnealingCore.cpp index 3c04151cafc..233e039b23e 100644 --- a/src/mpl2/src/SimulatedAnnealingCore.cpp +++ b/src/mpl2/src/SimulatedAnnealingCore.cpp @@ -48,8 +48,7 @@ using std::string; // Class SimulatedAnnealingCore template SimulatedAnnealingCore::SimulatedAnnealingCore( - float outline_width, - float outline_height, // boundary constraints + const Rect& outline, // boundary constraints const std::vector& macros, // macros (T = HardMacro or T = SoftMacro) // weight for different penalty float area_weight, @@ -69,11 +68,8 @@ SimulatedAnnealingCore::SimulatedAnnealingCore( unsigned seed, Mpl2Observer* graphics, utl::Logger* logger) - : graphics_(graphics) + : outline_(outline), graphics_(graphics) { - outline_width_ = outline_width; - outline_height_ = outline_height; - area_weight_ = area_weight; outline_weight_ = outline_weight; wirelength_weight_ = wirelength_weight; @@ -139,16 +135,15 @@ void SimulatedAnnealingCore::setGuides(const std::map& guides) template bool SimulatedAnnealingCore::isValid() const { - return (width_ <= std::ceil(outline_width_)) - && (height_ <= std::ceil(outline_height_)); + return (width_ <= std::ceil(outline_.getWidth())) + && (height_ <= std::ceil(outline_.getHeight())); } template -bool SimulatedAnnealingCore::isValid(float outline_width, - float outline_height) const +bool SimulatedAnnealingCore::isValid(const Rect& outline) const { - return (width_ <= std::ceil(outline_width)) - && (height_ <= std::ceil(outline_height)); + return (width_ <= std::ceil(outline.getWidth())) + && (height_ <= std::ceil(outline.getHeight())); } template @@ -227,9 +222,9 @@ void SimulatedAnnealingCore::getMacros(std::vector& macros) const template void SimulatedAnnealingCore::calOutlinePenalty() { - const float max_width = std::max(outline_width_, width_); - const float max_height = std::max(outline_height_, height_); - const float outline_area = outline_width_ * outline_height_; + const float max_width = std::max(outline_.getWidth(), width_); + const float max_height = std::max(outline_.getHeight(), height_); + const float outline_area = outline_.getWidth() * outline_.getHeight(); outline_penalty_ = max_width * max_height - outline_area; // normalization outline_penalty_ = outline_penalty_ / (outline_area); @@ -266,8 +261,8 @@ void SimulatedAnnealingCore::calWirelength() } // normalization - wirelength_ - = wirelength_ / tot_net_weight / (outline_height_ + outline_width_); + wirelength_ = wirelength_ / tot_net_weight + / (outline_.getHeight() + outline_.getWidth()); if (graphics_) { graphics_->setWirelength(wirelength_); @@ -307,8 +302,8 @@ void SimulatedAnnealingCore::calFencePenalty() // calculate x and y direction independently float width = x_dist <= max_x_dist ? 0.0 : (x_dist - max_x_dist); float height = y_dist <= max_y_dist ? 0.0 : (y_dist - max_y_dist); - width = width / outline_width_; - height = height / outline_height_; + width = width / outline_.getWidth(); + height = height / outline_.getHeight(); fence_penalty_ += width * width + height * height; } // normalization diff --git a/src/mpl2/src/SimulatedAnnealingCore.h b/src/mpl2/src/SimulatedAnnealingCore.h index cc94dece556..ee288a4f5b4 100644 --- a/src/mpl2/src/SimulatedAnnealingCore.h +++ b/src/mpl2/src/SimulatedAnnealingCore.h @@ -59,8 +59,7 @@ class SimulatedAnnealingCore { public: SimulatedAnnealingCore( - float outline_width, - float outline_height, // boundary constraints + const Rect& outline, // boundary constraints const std::vector& macros, // macros (T = HardMacro or T = SoftMacro) // weight for different penalty float area_weight, @@ -91,7 +90,7 @@ class SimulatedAnnealingCore void setGuides(const std::map& guides); bool isValid() const; - bool isValid(float outline_width, float outline_height) const; + bool isValid(const Rect& outline) const; void writeCostFile(const std::string& file_name) const; float getNormCost() const; float getWidth() const; @@ -141,8 +140,7 @@ class SimulatedAnnealingCore // private member variables ///////////////////////////////////////////// // boundary constraints - float outline_width_ = 0.0; - float outline_height_ = 0.0; + Rect outline_; // Number of macros that will actually be part of the sequence pair int macros_to_place_ = 0; diff --git a/src/mpl2/src/hier_rtlmp.cpp b/src/mpl2/src/hier_rtlmp.cpp index 176b720cdc1..cfd4eafd06f 100644 --- a/src/mpl2/src/hier_rtlmp.cpp +++ b/src/mpl2/src/hier_rtlmp.cpp @@ -2657,9 +2657,11 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) for (int i = 0; i < run_thread; i++) { const float width = outline.getWidth() * vary_factor_list[run_id++]; const float height = outline.getHeight(); + + const Rect new_outline(0, 0, width, height); + SACoreSoftMacro* sa - = new SACoreSoftMacro(width, - height, + = new SACoreSoftMacro(new_outline, macros, 1.0, // area weight 1000.0, // outline weight @@ -2700,7 +2702,7 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline.getWidth(), outline.getHeight())) { + if (sa->isValid(outline)) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } @@ -2718,9 +2720,11 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) for (int i = 0; i < run_thread; i++) { const float width = outline.getWidth(); const float height = outline.getHeight() * vary_factor_list[run_id++]; + + const Rect new_outline(0, 0, width, height); + SACoreSoftMacro* sa - = new SACoreSoftMacro(width, - height, + = new SACoreSoftMacro(new_outline, macros, 1.0, // area weight 1000.0, // outline weight @@ -2761,7 +2765,7 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline.getWidth(), outline.getHeight())) { + if (sa->isValid(outline)) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } @@ -2890,9 +2894,11 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) for (int i = 0; i < run_thread; i++) { const float width = outline.getWidth() * vary_factor_list[run_id++]; const float height = outline.getHeight(); + + const Rect new_outline(0, 0, width, height); + SACoreHardMacro* sa - = new SACoreHardMacro(width, - height, + = new SACoreHardMacro(new_outline, macros, 1.0, // area_weight 1000.0, // outline weight @@ -2928,7 +2934,7 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline.getWidth(), outline.getHeight())) { + if (sa->isValid(outline)) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } @@ -2946,9 +2952,11 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) for (int i = 0; i < run_thread; i++) { const float width = outline.getWidth(); const float height = outline.getHeight() * vary_factor_list[run_id++]; + + const Rect new_outline(0, 0, width, height); + SACoreHardMacro* sa - = new SACoreHardMacro(width, - height, + = new SACoreHardMacro(new_outline, macros, 1.0, // area_weight 1000.0, // outline weight @@ -2984,7 +2992,7 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); - if (sa->isValid(outline.getWidth(), outline.getHeight())) { + if (sa->isValid(outline)) { macro_tilings.insert( std::pair(sa->getWidth(), sa->getHeight())); } @@ -3738,8 +3746,7 @@ void HierRTLMP::runHierarchicalMacroPlacement(Cluster* parent) // Note that the weight are not necessaries summarized to 1.0, i.e., not // normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline.getWidth(), - outline.getHeight(), + = new SACoreSoftMacro(outline, shaped_macros, area_weight_, outline_weight_, @@ -3991,8 +3998,7 @@ void HierRTLMP::runHierarchicalMacroPlacement(Cluster* parent) // of 1.0. Note that the weight are not necessaries summarized to 1.0, // i.e., not normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline.getWidth(), - outline.getHeight(), + = new SACoreSoftMacro(outline, shaped_macros, area_weight_, outline_weight_, @@ -4526,8 +4532,7 @@ void HierRTLMP::runHierarchicalMacroPlacementWithoutBusPlanning(Cluster* parent) // Note that the weight are not necessaries summarized to 1.0, i.e., not // normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline.getWidth(), - outline.getHeight(), + = new SACoreSoftMacro(outline, shaped_macros, area_weight_, outline_weight_, @@ -5010,8 +5015,7 @@ void HierRTLMP::runEnhancedHierarchicalMacroPlacement(Cluster* parent) // Note that the weight are not necessaries summarized to 1.0, i.e., not // normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline.getWidth(), - outline.getHeight(), + = new SACoreSoftMacro(outline, shaped_macros, area_weight_, outline_weight_, @@ -5508,14 +5512,7 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) const float action_sum = pos_swap_prob_ * 10 + neg_swap_prob_ * 10 + double_swap_prob_ + exchange_swap_prob + flip_prob_; - // We vary the outline of cluster to generate differnt tilings - std::vector vary_factor_list{1.0}; - float vary_step - = 0.0 / num_runs_; // change the outline by at most 10 percent - for (int i = 1; i <= num_runs_ / 2 + 1; i++) { - vary_factor_list.push_back(1.0 + i * vary_step); - vary_factor_list.push_back(1.0 - i * vary_step); - } + const int num_perturb_per_step = (macros.size() > num_perturb_per_step_ / 10) ? macros.size() : num_perturb_per_step_ / 10; @@ -5529,10 +5526,6 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - // change the aspect ratio - const float width = outline.getWidth() * vary_factor_list[run_id++]; - const float height = outline.getWidth() * outline.getHeight() / width; - if (graphics_) { odb::Rect dbu_outline(dbu_ * outline.xMin(), dbu_ * outline.yMin(), @@ -5542,8 +5535,7 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) } SACoreHardMacro* sa - = new SACoreHardMacro(width, - height, + = new SACoreHardMacro(outline, macros, area_weight_, outline_weight_ * (run_id + 1) * 10, @@ -5583,8 +5575,7 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) // add macro tilings for (auto& sa : sa_vector) { sa_containers.push_back(sa); // add SA to containers - if (sa->isValid(outline.getWidth(), outline.getHeight()) - && sa->getNormCost() < best_cost) { + if (sa->isValid(outline) && sa->getNormCost() < best_cost) { best_cost = sa->getNormCost(); best_sa = sa; } From 68d131ba56efaed63d4d2c6e24a710d8ec505edb Mon Sep 17 00:00:00 2001 From: Arthur Koucher Date: Thu, 22 Feb 2024 10:19:16 -0300 Subject: [PATCH 04/30] mpl2: SoftSA core has access to root cluster Signed-off-by: Arthur Koucher --- src/mpl2/src/SACoreSoftMacro.cpp | 4 +++- src/mpl2/src/SACoreSoftMacro.h | 5 ++++- src/mpl2/src/hier_rtlmp.cpp | 18 ++++++++++++------ 3 files changed, 19 insertions(+), 8 deletions(-) diff --git a/src/mpl2/src/SACoreSoftMacro.cpp b/src/mpl2/src/SACoreSoftMacro.cpp index d9f697e902c..52ea0c384c3 100644 --- a/src/mpl2/src/SACoreSoftMacro.cpp +++ b/src/mpl2/src/SACoreSoftMacro.cpp @@ -43,6 +43,7 @@ using utl::MPL; // Class SACoreSoftMacro // constructors SACoreSoftMacro::SACoreSoftMacro( + Cluster* root, const Rect& outline, const std::vector& macros, // weight for different penalty @@ -86,7 +87,8 @@ SACoreSoftMacro::SACoreSoftMacro( num_perturb_per_step, seed, graphics, - logger) + logger), + root_(root) { boundary_weight_ = boundary_weight; macro_blockage_weight_ = macro_blockage_weight; diff --git a/src/mpl2/src/SACoreSoftMacro.h b/src/mpl2/src/SACoreSoftMacro.h index a378f49ceb9..1810ec5db5a 100644 --- a/src/mpl2/src/SACoreSoftMacro.h +++ b/src/mpl2/src/SACoreSoftMacro.h @@ -50,7 +50,8 @@ class Graphics; class SACoreSoftMacro : public SimulatedAnnealingCore { public: - SACoreSoftMacro(const Rect& outline, + SACoreSoftMacro(Cluster* root, + const Rect& outline, const std::vector& macros, // weight for different penalty float area_weight, @@ -121,6 +122,8 @@ class SACoreSoftMacro : public SimulatedAnnealingCore void calMacroBlockagePenalty(); std::vector blockages_; + Cluster* root_; + // notch threshold float notch_h_th_; float notch_v_th_; diff --git a/src/mpl2/src/hier_rtlmp.cpp b/src/mpl2/src/hier_rtlmp.cpp index cfd4eafd06f..bc723a834a1 100644 --- a/src/mpl2/src/hier_rtlmp.cpp +++ b/src/mpl2/src/hier_rtlmp.cpp @@ -2661,7 +2661,8 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) const Rect new_outline(0, 0, width, height); SACoreSoftMacro* sa - = new SACoreSoftMacro(new_outline, + = new SACoreSoftMacro(root_cluster_, + new_outline, macros, 1.0, // area weight 1000.0, // outline weight @@ -2724,7 +2725,8 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) const Rect new_outline(0, 0, width, height); SACoreSoftMacro* sa - = new SACoreSoftMacro(new_outline, + = new SACoreSoftMacro(root_cluster_, + new_outline, macros, 1.0, // area weight 1000.0, // outline weight @@ -3746,7 +3748,8 @@ void HierRTLMP::runHierarchicalMacroPlacement(Cluster* parent) // Note that the weight are not necessaries summarized to 1.0, i.e., not // normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline, + = new SACoreSoftMacro(root_cluster_, + outline, shaped_macros, area_weight_, outline_weight_, @@ -3998,7 +4001,8 @@ void HierRTLMP::runHierarchicalMacroPlacement(Cluster* parent) // of 1.0. Note that the weight are not necessaries summarized to 1.0, // i.e., not normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline, + = new SACoreSoftMacro(root_cluster_, + outline, shaped_macros, area_weight_, outline_weight_, @@ -4532,7 +4536,8 @@ void HierRTLMP::runHierarchicalMacroPlacementWithoutBusPlanning(Cluster* parent) // Note that the weight are not necessaries summarized to 1.0, i.e., not // normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline, + = new SACoreSoftMacro(root_cluster_, + outline, shaped_macros, area_weight_, outline_weight_, @@ -5015,7 +5020,8 @@ void HierRTLMP::runEnhancedHierarchicalMacroPlacement(Cluster* parent) // Note that the weight are not necessaries summarized to 1.0, i.e., not // normalized. SACoreSoftMacro* sa - = new SACoreSoftMacro(outline, + = new SACoreSoftMacro(root_cluster_, + outline, shaped_macros, area_weight_, outline_weight_, From 01fe4e5df0ca52f067f7b26376098b89fb4e6b90 Mon Sep 17 00:00:00 2001 From: Arthur Koucher Date: Thu, 22 Feb 2024 10:42:01 -0300 Subject: [PATCH 05/30] mpl2: push macro clusters to the boundary of the core instead of the parent's boundary / use only macros from seq pair Signed-off-by: Arthur Koucher --- src/mpl2/src/SACoreSoftMacro.cpp | 41 +++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 14 deletions(-) diff --git a/src/mpl2/src/SACoreSoftMacro.cpp b/src/mpl2/src/SACoreSoftMacro.cpp index 52ea0c384c3..744c6e0a183 100644 --- a/src/mpl2/src/SACoreSoftMacro.cpp +++ b/src/mpl2/src/SACoreSoftMacro.cpp @@ -366,33 +366,46 @@ void SACoreSoftMacro::initialize() } } -// We only push hard macro clusters to boundaries -// Note that we do not push MixedCluster into boundaries +// Independently of the current parent's level, we always compute +// the boundary penalty based on the boundaries of the root (core). +// The macros we're trying to place i.e. the ones from the sequence pair, +// have their lower left corner based on the parent's outline. void SACoreSoftMacro::calBoundaryPenalty() { - // Initialization boundary_penalty_ = 0.0; + if (boundary_weight_ <= 0.0) { return; } int tot_num_macros = 0; - for (const auto& macro : macros_) { - tot_num_macros += macro.getNumMacro(); + + for (const auto& macro_id : pos_seq_) { + tot_num_macros += macros_[macro_id].getNumMacro(); } + if (tot_num_macros <= 0) { return; } - for (const auto& macro : macros_) { - if (macro.getNumMacro() > 0) { - const float lx = macro.getX(); - const float ly = macro.getY(); - const float ux = lx + macro.getWidth(); - const float uy = ly + macro.getHeight(); - const float x_dist = std::min(lx, std::abs(outline_.getWidth() - ux)); - const float y_dist = std::min(ly, std::abs(outline_.getHeight() - uy)); - boundary_penalty_ += std::min(x_dist, y_dist) * macro.getNumMacro(); + float global_lx = 0.0f, global_ly = 0.0f; + float global_ux = 0.0f, global_uy = 0.0f; + float x_dist_from_root = 0.0f, y_dist_from_root = 0.0f; + + for (const auto& macro_id : pos_seq_) { + if (macros_[macro_id].getNumMacro() > 0) { + global_lx = macros_[macro_id].getX() + outline_.xMin() - root_->getX(); + global_ly = macros_[macro_id].getY() + outline_.yMin() - root_->getY(); + global_ux = global_lx + macros_[macro_id].getWidth(); + global_uy = global_ly + macros_[macro_id].getHeight(); + + x_dist_from_root + = std::min(global_lx, std::abs(root_->getWidth() - global_ux)); + y_dist_from_root + = std::min(global_ly, std::abs(root_->getHeight() - global_uy)); + + boundary_penalty_ += std::min(x_dist_from_root, y_dist_from_root) + * macros_[macro_id].getNumMacro(); } } // normalization From b87617a6edb68729b318d39459c74180d3a8f9a8 Mon Sep 17 00:00:00 2001 From: Arthur Koucher Date: Thu, 22 Feb 2024 10:53:55 -0300 Subject: [PATCH 06/30] mpl2: remove unneeded floats Signed-off-by: Arthur Koucher --- src/mpl2/src/hier_rtlmp.cpp | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/src/mpl2/src/hier_rtlmp.cpp b/src/mpl2/src/hier_rtlmp.cpp index bc723a834a1..01794160244 100644 --- a/src/mpl2/src/hier_rtlmp.cpp +++ b/src/mpl2/src/hier_rtlmp.cpp @@ -2655,10 +2655,10 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline.getWidth() * vary_factor_list[run_id++]; - const float height = outline.getHeight(); - - const Rect new_outline(0, 0, width, height); + const Rect new_outline(0, + 0, + outline.getWidth() * vary_factor_list[run_id++], + outline.getHeight()); SACoreSoftMacro* sa = new SACoreSoftMacro(root_cluster_, @@ -2719,10 +2719,10 @@ void HierRTLMP::calculateChildrenTilings(Cluster* parent) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline.getWidth(); - const float height = outline.getHeight() * vary_factor_list[run_id++]; - - const Rect new_outline(0, 0, width, height); + const Rect new_outline(0, + 0, + outline.getWidth(), + outline.getHeight() * vary_factor_list[run_id++]); SACoreSoftMacro* sa = new SACoreSoftMacro(root_cluster_, @@ -2894,10 +2894,10 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline.getWidth() * vary_factor_list[run_id++]; - const float height = outline.getHeight(); - - const Rect new_outline(0, 0, width, height); + const Rect new_outline(0, + 0, + outline.getWidth() * vary_factor_list[run_id++], + outline.getHeight()); SACoreHardMacro* sa = new SACoreHardMacro(new_outline, @@ -2952,10 +2952,10 @@ void HierRTLMP::calculateMacroTilings(Cluster* cluster) const int run_thread = graphics_ ? 1 : std::min(remaining_runs, num_threads_); for (int i = 0; i < run_thread; i++) { - const float width = outline.getWidth(); - const float height = outline.getHeight() * vary_factor_list[run_id++]; - - const Rect new_outline(0, 0, width, height); + const Rect new_outline(0, + 0, + outline.getWidth(), + outline.getHeight() * vary_factor_list[run_id++]); SACoreHardMacro* sa = new SACoreHardMacro(new_outline, From 68b58cacdf4995446c76ff92e3e20b9d405923b6 Mon Sep 17 00:00:00 2001 From: Arthur Koucher Date: Thu, 22 Feb 2024 11:39:56 -0300 Subject: [PATCH 07/30] mpl2: ensure run_id is not only used, but used from it's initial value Signed-off-by: Arthur Koucher --- src/mpl2/src/hier_rtlmp.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mpl2/src/hier_rtlmp.cpp b/src/mpl2/src/hier_rtlmp.cpp index 01794160244..b9839040ebc 100644 --- a/src/mpl2/src/hier_rtlmp.cpp +++ b/src/mpl2/src/hier_rtlmp.cpp @@ -5564,6 +5564,8 @@ void HierRTLMP::hardMacroClusterMacroPlacement(Cluster* cluster) sa->setFences(fences); sa->setGuides(guides); sa_vector.push_back(sa); + + run_id++; } if (sa_vector.size() == 1) { runSA(sa_vector[0]); From f9a2500c777a0bc85801fe08e414ce8efae04fb3 Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Fri, 1 Mar 2024 17:14:14 -0800 Subject: [PATCH 08/30] Update the sta submodule Signed-off-by: Matt Liberty --- src/cts/test/array.ok | 10 +++++----- src/cts/test/array_ins_delay.ok | 12 +++++++----- src/cts/test/array_no_blockages.ok | 10 +++++----- src/sta | 2 +- 4 files changed, 18 insertions(+), 16 deletions(-) diff --git a/src/cts/test/array.ok b/src/cts/test/array.ok index 15a0026fed9..3c2e9724eba 100644 --- a/src/cts/test/array.ok +++ b/src/cts/test/array.ok @@ -82,11 +82,11 @@ legalized HPWL 133357.9 u delta HPWL 0 % Clock clk -Latency CRPR Skew -inst_7_12/clk ^ - 1.27 -inst_8_12/clk ^ - 1.14 0.00 0.13 + 1.27 source latency inst_7_12/clk ^ + -1.14 target latency inst_8_12/clk ^ + 0.00 CRPR +-------------- + 0.13 setup skew Startpoint: inst_1_1 (rising edge-triggered flip-flop clocked by clk) Endpoint: inst_2_1 (rising edge-triggered flip-flop clocked by clk) diff --git a/src/cts/test/array_ins_delay.ok b/src/cts/test/array_ins_delay.ok index 291cef1a3cc..321bd5aecce 100644 --- a/src/cts/test/array_ins_delay.ok +++ b/src/cts/test/array_ins_delay.ok @@ -1134,11 +1134,13 @@ legalized HPWL 186297.4 u delta HPWL 0 % Clock clk -Latency CRPR Skew -inst_7_9/clk ^ - 1.30 -inst_8_9/clk ^ - 1.13 0.00 0.17 + 1.30 source latency inst_7_9/clk ^ + 0.00 source clock tree delay + -1.13 target latency inst_8_9/clk ^ + -0.00 target clock tree delay + 0.00 CRPR +-------------- + 0.17 setup skew Startpoint: inst_1_1 (rising edge-triggered flip-flop clocked by clk) Endpoint: inst_2_1 (rising edge-triggered flip-flop clocked by clk) diff --git a/src/cts/test/array_no_blockages.ok b/src/cts/test/array_no_blockages.ok index fc4b39ae763..0348648e5d5 100644 --- a/src/cts/test/array_no_blockages.ok +++ b/src/cts/test/array_no_blockages.ok @@ -82,9 +82,9 @@ legalized HPWL 133583.9 u delta HPWL 0 % Clock clk -Latency CRPR Skew -inst_8_14/clk ^ - 1.24 -inst_10_14/clk ^ - 1.10 0.00 0.14 + 1.24 source latency inst_8_14/clk ^ + -1.10 target latency inst_10_14/clk ^ + 0.00 CRPR +-------------- + 0.14 setup skew diff --git a/src/sta b/src/sta index 2e595637175..d19b9f5ca90 160000 --- a/src/sta +++ b/src/sta @@ -1 +1 @@ -Subproject commit 2e5956371759660699a04f141ec20e4e633e06e1 +Subproject commit d19b9f5ca905c6b840e11a0f13a357e5099bea45 From 2ae6d64f4f1a9a0721763865133af54b1bc03cb2 Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Fri, 1 Mar 2024 18:44:40 -0800 Subject: [PATCH 09/30] update sta for MakeTimingModel::findArea fix Signed-off-by: Matt Liberty --- src/sta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sta b/src/sta index d19b9f5ca90..9eeba890768 160000 --- a/src/sta +++ b/src/sta @@ -1 +1 @@ -Subproject commit d19b9f5ca905c6b840e11a0f13a357e5099bea45 +Subproject commit 9eeba89076813a4e9964b153b1da9fd453c01adf From 156e4c0e698fd245eabf2d7d2a193b87ee0abc4b Mon Sep 17 00:00:00 2001 From: arthur Date: Mon, 4 Mar 2024 12:53:39 -0300 Subject: [PATCH 10/30] report total usage of cells Signed-off-by: arthur --- src/dbSta/src/dbSta.cc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/dbSta/src/dbSta.cc b/src/dbSta/src/dbSta.cc index f1149b958b4..8307d87fe68 100644 --- a/src/dbSta/src/dbSta.cc +++ b/src/dbSta/src/dbSta.cc @@ -448,12 +448,14 @@ std::map dbSta::countInstancesByType() void dbSta::report_cell_usage() { std::map instances_types = countInstancesByType(); + int total_usage = db_->getChip()->getBlock()->getInsts().size(); logger_->report("Cell usage report:"); for (auto [type, count] : instances_types) { std::string type_name = getInstanceTypeText(type); logger_->report(" {}s: {}", type_name, count); } + logger_->report(" Total: {}", total_usage); } //////////////////////////////////////////////////////////////// From 9f582902939d9929460e513ed6c6e01b30c89b13 Mon Sep 17 00:00:00 2001 From: arthur Date: Mon, 4 Mar 2024 12:56:24 -0300 Subject: [PATCH 11/30] update ok Signed-off-by: arthur --- src/dbSta/test/report_cell_usage.ok | 1 + 1 file changed, 1 insertion(+) diff --git a/src/dbSta/test/report_cell_usage.ok b/src/dbSta/test/report_cell_usage.ok index 866fb0d5581..aaad7be352b 100644 --- a/src/dbSta/test/report_cell_usage.ok +++ b/src/dbSta/test/report_cell_usage.ok @@ -12,3 +12,4 @@ Cell usage report: Buffer/inverters: 232 Sequential cells: 35 Complex combinational cells: 241 + Total: 676 From 0f3e06fb23cda40897e3c9a46c96d1aa7da33d10 Mon Sep 17 00:00:00 2001 From: arthur Date: Tue, 5 Mar 2024 16:52:08 -0300 Subject: [PATCH 12/30] change to Multi-Inputcombinational Signed-off-by: arthur --- src/dbSta/src/dbSta.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dbSta/src/dbSta.cc b/src/dbSta/src/dbSta.cc index 8307d87fe68..8a29cd1d999 100644 --- a/src/dbSta/src/dbSta.cc +++ b/src/dbSta/src/dbSta.cc @@ -323,7 +323,7 @@ std::string dbSta::getInstanceTypeText(InstType type) case STD_PHYSICAL: return "Generic Physical"; case STD_COMBINATIONAL: - return "Complex combinational cell"; + return "Multi-Input combinational cell"; case STD_OTHER: return "Other"; } From f3b202e778272e6b521856b5b1c772634bbd65ce Mon Sep 17 00:00:00 2001 From: arthur Date: Tue, 5 Mar 2024 17:56:58 -0300 Subject: [PATCH 13/30] update ok files Signed-off-by: arthur --- src/dbSta/test/report_cell_usage.ok | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dbSta/test/report_cell_usage.ok b/src/dbSta/test/report_cell_usage.ok index aaad7be352b..493212a0bbc 100644 --- a/src/dbSta/test/report_cell_usage.ok +++ b/src/dbSta/test/report_cell_usage.ok @@ -11,5 +11,5 @@ Cell usage report: Fill cells: 168 Buffer/inverters: 232 Sequential cells: 35 - Complex combinational cells: 241 + Multi-Input combinational cells: 241 Total: 676 From 4b7a991e0da545e33f2d0bde535ffc54394c9b18 Mon Sep 17 00:00:00 2001 From: Peter Gadfort Date: Tue, 5 Mar 2024 21:59:34 -0500 Subject: [PATCH 14/30] ord: provide helper function to parse list arguments Signed-off-by: Peter Gadfort --- src/OpenRoad.tcl | 29 ++++++++++++++++++ src/gui/src/gui.tcl | 47 ++++++++++-------------------- src/ppl/src/IOPlacer.tcl | 44 +++++----------------------- src/stt/src/SteinerTreeBuilder.tcl | 29 ++++++------------ src/stt/test/parse_clocks.tcl | 2 +- 5 files changed, 63 insertions(+), 88 deletions(-) diff --git a/src/OpenRoad.tcl b/src/OpenRoad.tcl index 9294e712c28..8c332f10105 100644 --- a/src/OpenRoad.tcl +++ b/src/OpenRoad.tcl @@ -395,5 +395,34 @@ proc get_core_area { } { return $area } +proc parse_list_args {cmd arg_var list_var lists_args} { + upvar 1 $arg_var args + upvar 1 $list_var list + + foreach arg_opt $lists_args { + set remaining_args [] + + set list($arg_opt) [] + for {set i 0} {$i < [llength $args]} {incr i} { + set arg [lindex $args $i] + if { [sta::is_keyword_arg $arg] } { + if { $arg == $arg_opt } { + incr i + if { [llength $args] == $i } { + utl::error ORD 560 "$cmd $arg_opt missing value." + } + lappend list($arg_opt) [lindex $args $i] + } else { + lappend remaining_args $arg + } + } else { + lappend remaining_args $arg + } + } + + set args $remaining_args + } +} + # namespace ord } diff --git a/src/gui/src/gui.tcl b/src/gui/src/gui.tcl index 2720854ab19..96ae1b0a7d4 100644 --- a/src/gui/src/gui.tcl +++ b/src/gui/src/gui.tcl @@ -108,9 +108,21 @@ sta::define_cmd_args "save_image" {[-area {x0 y0 x1 y1}] \ } proc save_image { args } { - set options [gui::parse_options $args] + ord::parse_list_args "save_image" args list {-display_option} sta::parse_key_args "save_image" args \ - keys {-area -width -resolution -display_option} flags {} + keys {-area -width -resolution} flags {} + + set options [gui::DisplayControlMap] + foreach opt $list(-display_option) { + if {[llength $opt] != 2} { + utl::error GUI 19 "Display option must have 2 elements {control name} {value}." + } + + set key [lindex $opt 0] + set val [lindex $opt 1] + + $options set $key $val + } set resolution 0 if { [info exists keys(-resolution)] } { @@ -165,10 +177,10 @@ sta::define_cmd_args "save_clocktree_image" { } proc save_clocktree_image { args } { - sta::parse_key_args "save_image" args \ + sta::parse_key_args "save_clocktree_image" args \ keys {-clock -width -height -corner} flags {} - sta::check_argc_eq1 "save_image" $args + sta::check_argc_eq1 "save_clocktree_image" $args set path [lindex $args 0] set width 0 @@ -330,30 +342,3 @@ proc focus_net { args } { gui::focus_net $net } } - -namespace eval gui { -proc parse_options { args_var } { - set options [gui::DisplayControlMap] - while { $args_var != {} } { - set arg [lindex $args_var 0] - if { $arg == "-display_option" } { - set opt [lindex $args_var 1] - - if {[llength $opt] != 2} { - utl::error GUI 19 "Display option must have 2 elements {control name} {value}." - } - - set key [lindex $opt 0] - set val [lindex $opt 1] - - $options set $key $val - - set args_var [lrange $args_var 1 end] - } else { - set args_var [lrange $args_var 1 end] - } - } - - return $options -} -} diff --git a/src/ppl/src/IOPlacer.tcl b/src/ppl/src/IOPlacer.tcl index ce643bfaccc..a658b4a2184 100644 --- a/src/ppl/src/IOPlacer.tcl +++ b/src/ppl/src/IOPlacer.tcl @@ -375,7 +375,7 @@ sta::define_cmd_args "place_pin" {[-pin_name pin_name]\ proc place_pin { args } { sta::parse_key_args "place_pin" args \ - keys {-pin_name -layer -location -pin_size}\ + keys {-pin_name -layer -location -pin_size} \ flags {-force_to_die_boundary -placed_status} sta::check_argc_eq0 "place_pin" $args @@ -449,15 +449,17 @@ sta::define_cmd_args "place_pins" {[-hor_layers h_layers]\ } proc place_pins { args } { - set regions [ppl::parse_excludes_arg $args] - set pin_groups [ppl::parse_group_pins_arg $args] + ord::parse_list_args "place_pins" args list {-exclude -group_pins} sta::parse_key_args "place_pins" args \ keys {-hor_layers -ver_layers -random_seed -corner_avoidance \ - -min_distance -exclude -group_pins -write_pin_placement} \ + -min_distance -write_pin_placement} \ flags {-random -min_distance_in_tracks -annealing} sta::check_argc_eq0 "place_pins" $args + set regions $list(-exclude) + set pin_groups $list(-group_pins) + set dbTech [ord::get_db_tech] if { $dbTech == "NULL" } { utl::error PPL 31 "No technology found." @@ -570,7 +572,7 @@ proc place_pins { args } { set num_slots [expr (2*$num_tracks_x + 2*$num_tracks_y)/$min_dist] - if { $regions != {} } { + if { [llength $regions] != 0 } { set lef_units [$dbTech getLefUnits] foreach region $regions { @@ -603,7 +605,7 @@ proc place_pins { args } { } } - if { $pin_groups != {} } { + if { [llength $pin_groups] != 0 } { set group_idx 0 foreach group $pin_groups { utl::info PPL 41 "Pin group $group_idx: \[$group\]" @@ -654,36 +656,6 @@ proc parse_direction { cmd direction } { } } -proc parse_excludes_arg { args_var } { - set regions {} - while { $args_var != {} } { - set arg [lindex $args_var 0] - if { $arg == "-exclude" } { - lappend regions [lindex $args_var 1] - set args_var [lrange $args_var 1 end] - } else { - set args_var [lrange $args_var 1 end] - } - } - - return $regions -} - -proc parse_group_pins_arg { args_var } { - set pins {} - while { $args_var != {} } { - set arg [lindex $args_var 0] - if { $arg == "-group_pins" } { - lappend pins [lindex $args_var 1] - set args_var [lrange $args_var 1 end] - } else { - set args_var [lrange $args_var 1 end] - } - } - - return $pins -} - proc get_edge_extreme { cmd begin edge } { set dbBlock [ord::get_db_block] set die_area [$dbBlock getDieArea] diff --git a/src/stt/src/SteinerTreeBuilder.tcl b/src/stt/src/SteinerTreeBuilder.tcl index 97077e91381..c1aab4c44d1 100644 --- a/src/stt/src/SteinerTreeBuilder.tcl +++ b/src/stt/src/SteinerTreeBuilder.tcl @@ -40,8 +40,9 @@ sta::define_cmd_args "set_routing_alpha" { alpha \ [-clock_nets]} proc set_routing_alpha { args } { + ord::parse_list_args "set_routing_alpha" args list {-net} sta::parse_key_args "set_routing_alpha" args \ - keys {-net -min_fanout -min_hpwl}\ + keys {-net -min_fanout -min_hpwl} \ flags {-clock_nets} set alpha [lindex $args 0] @@ -49,11 +50,9 @@ proc set_routing_alpha { args } { utl::error STT 1 "The alpha value must be between 0.0 and 1.0." } - if { [info exists keys(-net)] } { - set net_names $keys(-net) - set nets [stt::parse_net_names "set_routing_alpha" $net_names] - foreach net $nets { - stt::set_net_alpha $net $alpha + if { [llength $list(-net)] > 0 } { + foreach net $list(-net) { + stt::set_net_alpha [stt::find_net $net] $alpha } } elseif { [info exists keys(-min_fanout)] } { set fanout $keys(-min_fanout) @@ -62,7 +61,7 @@ proc set_routing_alpha { args } { set hpwl [ord::microns_to_dbu $keys(-min_hpwl)] stt::set_min_hpwl_alpha $hpwl $alpha } elseif { [info exists flags(-clock_nets)] } { - set nets [stt::parse_clock_nets "set_routing_alpha"] + set nets [stt::filter_clk_nets "set_routing_alpha"] foreach net $nets { stt::set_net_alpha $net $alpha } @@ -75,21 +74,11 @@ proc set_routing_alpha { args } { namespace eval stt { -proc parse_net_names {cmd names} { - set dbBlock [ord::get_db_block] - set net_list {} - foreach net [get_nets $names] { - lappend net_list [sta::sta_to_db_net $net] - } - - if {[llength $net_list] == 0} { - utl::error STT 3 "Nets for $cmd command were not found" - } - - return $net_list +proc find_net {name} { + return [sta::sta_to_db_net $name] } -proc parse_clock_nets {cmd} { +proc filter_clk_nets {cmd} { set dbBlock [ord::get_db_block] set net_list {} foreach net [$dbBlock getNets] { diff --git a/src/stt/test/parse_clocks.tcl b/src/stt/test/parse_clocks.tcl index 2d3fa8a6597..4cb7c053bf7 100644 --- a/src/stt/test/parse_clocks.tcl +++ b/src/stt/test/parse_clocks.tcl @@ -9,7 +9,7 @@ current_design gcd create_clock -name core_clock -period 2.0000 -waveform {0.0000 1.0000} [get_ports {clk}] set_propagated_clock [get_clocks {core_clock}] -set clocks [stt::parse_clock_nets "test"] +set clocks [stt::filter_clk_nets "test"] foreach clock $clocks { puts "[$clock getName]" From bd2de7df8cf76274c00a5fc0dedc9e45c1024003 Mon Sep 17 00:00:00 2001 From: Peter Gadfort Date: Wed, 6 Mar 2024 01:54:31 -0500 Subject: [PATCH 15/30] stt: fix call to get_nets in stt tcl Signed-off-by: Peter Gadfort --- src/stt/src/SteinerTreeBuilder.tcl | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/stt/src/SteinerTreeBuilder.tcl b/src/stt/src/SteinerTreeBuilder.tcl index c1aab4c44d1..6f8c745f616 100644 --- a/src/stt/src/SteinerTreeBuilder.tcl +++ b/src/stt/src/SteinerTreeBuilder.tcl @@ -42,9 +42,11 @@ sta::define_cmd_args "set_routing_alpha" { alpha \ proc set_routing_alpha { args } { ord::parse_list_args "set_routing_alpha" args list {-net} sta::parse_key_args "set_routing_alpha" args \ - keys {-net -min_fanout -min_hpwl} \ + keys {-min_fanout -min_hpwl} \ flags {-clock_nets} + sta::check_argc_eq1 "set_routing_alpha" $args + set alpha [lindex $args 0] if { ![string is double $alpha] || $alpha < 0.0 || $alpha > 1.0 } { utl::error STT 1 "The alpha value must be between 0.0 and 1.0." @@ -65,17 +67,15 @@ proc set_routing_alpha { args } { foreach net $nets { stt::set_net_alpha $net $alpha } - } elseif { [llength $args] == 1 } { - stt::set_routing_alpha_cmd $alpha } else { - utl::error STT 2 "set_routing_alpha: Wrong number of arguments." + stt::set_routing_alpha_cmd $alpha } } namespace eval stt { proc find_net {name} { - return [sta::sta_to_db_net $name] + return [sta::sta_to_db_net [get_nets $name]] } proc filter_clk_nets {cmd} { From bc6b68ae88462c30bf6a93956fe7ddc25d9927c7 Mon Sep 17 00:00:00 2001 From: Mohamed Gaber Date: Wed, 6 Mar 2024 12:43:11 +0200 Subject: [PATCH 16/30] Update `src/CMakeLists.txt` to clarify minimum SWIG version Signed-off-by: Mohamed Gaber Signed-off-by: Mohamed Gaber --- src/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 3b0cfd6ae2e..842b6bfd178 100755 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -166,7 +166,7 @@ if (BUILD_TCLX AND TCLX_H) message(STATUS "TclX header: ${TCLX_H}") endif() -find_package(SWIG 3.0 REQUIRED) +find_package(SWIG 4.0 REQUIRED) if (SWIG_VERSION VERSION_GREATER_EQUAL "4.1.0") message(STATUS "Using SWIG >= ${SWIG_VERSION} -flatstaticmethod flag for python") endif() From f9bede4718013ac78a10896cf1bc08459c18ee2a Mon Sep 17 00:00:00 2001 From: Vitor Bandeira Date: Wed, 6 Mar 2024 11:19:23 -0300 Subject: [PATCH 17/30] etc: check for yosys-config Signed-off-by: Vitor Bandeira --- etc/DependencyInstaller.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/etc/DependencyInstaller.sh b/etc/DependencyInstaller.sh index f34e65bef08..91daea35eac 100755 --- a/etc/DependencyInstaller.sh +++ b/etc/DependencyInstaller.sh @@ -14,7 +14,7 @@ _equivalenceDeps() { # yosys yosysPrefix=${PREFIX:-"/usr/local"} - if ! command -v yosys &> /dev/null; then ( + if [[ ! $(command -v yosys) || ! $(command -v yosys-config) ]]; then ( if [[ -f /opt/rh/llvm-toolset-7.0/enable ]]; then source /opt/rh/llvm-toolset-7.0/enable fi From 417a4f77448a81c06f5da9f08269148662090314 Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Wed, 6 Mar 2024 13:28:41 -0300 Subject: [PATCH 18/30] grt: check max routing layer before fetching blockage data Signed-off-by: Eder Monteiro --- src/grt/src/GlobalRouter.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/grt/src/GlobalRouter.cpp b/src/grt/src/GlobalRouter.cpp index 0db5cbeedd0..b468fed6c2b 100644 --- a/src/grt/src/GlobalRouter.cpp +++ b/src/grt/src/GlobalRouter.cpp @@ -3406,7 +3406,10 @@ void GlobalRouter::getBlockage(odb::dbTechLayer* layer, uint8_t& blockage_h, uint8_t& blockage_v) { - fastroute_->getBlockage(layer, x, y, blockage_h, blockage_v); + int max_layer = std::max(max_routing_layer_, max_layer_for_clock_); + if (layer->getRoutingLevel() <= max_layer) { + fastroute_->getBlockage(layer, x, y, blockage_h, blockage_v); + } } std::map GlobalRouter::getDefaultVias( From 8c5d89dc884781bca9d43374e44bf53c2ada56af Mon Sep 17 00:00:00 2001 From: Tobias Senti Date: Wed, 6 Mar 2024 17:24:53 +0100 Subject: [PATCH 19/30] grt: regression test for single row designs Signed-off-by: Tobias Senti --- src/grt/test/regression_tests.tcl | 1 + src/grt/test/single_row.def | 31 +++++++++++++++++++++ src/grt/test/single_row.guideok | 10 +++++++ src/grt/test/single_row.ok | 46 +++++++++++++++++++++++++++++++ src/grt/test/single_row.tcl | 14 ++++++++++ 5 files changed, 102 insertions(+) create mode 100644 src/grt/test/single_row.def create mode 100644 src/grt/test/single_row.guideok create mode 100644 src/grt/test/single_row.ok create mode 100644 src/grt/test/single_row.tcl diff --git a/src/grt/test/regression_tests.tcl b/src/grt/test/regression_tests.tcl index 4b1705cdf4b..f8a61e6e17e 100644 --- a/src/grt/test/regression_tests.tcl +++ b/src/grt/test/regression_tests.tcl @@ -53,6 +53,7 @@ record_tests { report_wire_length6 set_nets_to_route1 silence + single_row top_level_term1 top_level_term2 top_level_term3 diff --git a/src/grt/test/single_row.def b/src/grt/test/single_row.def new file mode 100644 index 00000000000..984cf68ae07 --- /dev/null +++ b/src/grt/test/single_row.def @@ -0,0 +1,31 @@ +VERSION 5.8 ; +DIVIDERCHAR "/" ; +BUSBITCHARS "[]" ; +DESIGN single_row ; +UNITS DISTANCE MICRONS 1000 ; +DIEAREA ( 0 0 ) ( 5760 3330 ) ; +ROW ROW_0 unit 0 0 N DO 4 BY 1 STEP 480 0 ; +TRACKS X 240 DO 12 STEP 480 LAYER li1 ; +TRACKS Y 185 DO 9 STEP 370 LAYER li1 ; +TRACKS X 185 DO 15 STEP 370 LAYER met1 ; +TRACKS Y 185 DO 9 STEP 370 LAYER met1 ; +GCELLGRID X 0 DO 1 STEP 5550 ; +GCELLGRID Y 0 DO 1 STEP 5550 ; +COMPONENTS 1 ; + - buffer sky130_fd_sc_hs__buf_1 + PLACED ( 1920 0 ) N ; +END COMPONENTS +PINS 2 ; + - a_i + NET a_i + DIRECTION INPUT + USE SIGNAL + + PORT + + LAYER li1 ( -85 -165 ) ( 85 165 ) + + PLACED ( 2160 165 ) N ; + - b_o + NET b_o + DIRECTION OUTPUT + USE SIGNAL + + PORT + + LAYER li1 ( -85 -165 ) ( 85 165 ) + + PLACED ( 4080 3165 ) N ; +END PINS +NETS 2 ; + - a_i ( PIN a_i ) ( buffer A ) + USE SIGNAL ; + - b_o ( PIN b_o ) ( buffer X ) + USE SIGNAL ; +END NETS +END DESIGN diff --git a/src/grt/test/single_row.guideok b/src/grt/test/single_row.guideok new file mode 100644 index 00000000000..13f6c6d8e23 --- /dev/null +++ b/src/grt/test/single_row.guideok @@ -0,0 +1,10 @@ +a_i +( +0 0 5760 3330 li1 +0 0 5760 3330 met1 +) +b_o +( +0 0 5760 3330 li1 +0 0 5760 3330 met1 +) diff --git a/src/grt/test/single_row.ok b/src/grt/test/single_row.ok new file mode 100644 index 00000000000..101c1b9bddc --- /dev/null +++ b/src/grt/test/single_row.ok @@ -0,0 +1,46 @@ +[INFO ODB-0222] Reading LEF file: sky130hs/sky130hs.tlef +[INFO ODB-0223] Created 13 technology layers +[INFO ODB-0224] Created 25 technology vias +[INFO ODB-0226] Finished LEF file: sky130hs/sky130hs.tlef +[INFO ODB-0222] Reading LEF file: sky130hs/sky130hs_std_cell.lef +[INFO ODB-0225] Created 390 library cells +[INFO ODB-0226] Finished LEF file: sky130hs/sky130hs_std_cell.lef +[INFO ODB-0128] Design: single_row +[INFO ODB-0130] Created 2 pins. +[INFO ODB-0131] Created 1 components and 6 component-terminals. +[INFO ODB-0133] Created 2 nets and 2 connections. +[INFO GRT-0020] Min routing layer: li1 +[INFO GRT-0021] Max routing layer: met1 +[INFO GRT-0022] Global adjustment: 0% +[INFO GRT-0023] Grid origin: (0, 0) +[INFO GRT-0043] No OR_DEFAULT vias defined. +[INFO GRT-0088] Layer li1 Track-Pitch = 0.4800 line-2-Via Pitch: 0.3400 +[INFO GRT-0088] Layer met1 Track-Pitch = 0.3700 line-2-Via Pitch: 0.3250 +[INFO GRT-0019] Found 0 clock nets. +[INFO GRT-0001] Minimum degree: 2147483647 +[INFO GRT-0002] Maximum degree: 1 +[WARNING GRT-0038] Found blockage outside die area in instance buffer. +[WARNING GRT-0038] Found blockage outside die area in instance buffer. +[INFO GRT-0003] Macros: 0 +[INFO GRT-0004] Blockages: 11 + +[INFO GRT-0053] Routing resources analysis: + Routing Original Derated Resource +Layer Direction Resources Resources Reduction (%) +--------------------------------------------------------------- +li1 Vertical 12 0 100.00% +met1 Horizontal 9 0 100.00% +--------------------------------------------------------------- + + +[INFO GRT-0096] Final congestion report: +Layer Resource Demand Usage (%) Max H / Max V / Total Overflow +--------------------------------------------------------------------------------------- +li1 0 0 0.00% 0 / 0 / 0 +met1 0 0 0.00% 0 / 0 / 0 +--------------------------------------------------------------------------------------- +Total 0 0 0.00% 0 / 0 / 0 + +[INFO GRT-0018] Total wirelength: 0 um +[INFO GRT-0014] Routed nets: 2 +No differences found. diff --git a/src/grt/test/single_row.tcl b/src/grt/test/single_row.tcl new file mode 100644 index 00000000000..40d2273422c --- /dev/null +++ b/src/grt/test/single_row.tcl @@ -0,0 +1,14 @@ +# check if global route works for single row designs +source "helpers.tcl" +read_liberty "sky130hs/sky130_fd_sc_hs__tt_025C_1v80.lib" +read_lef "sky130hs/sky130hs.tlef" +read_lef "sky130hs/sky130hs_std_cell.lef" +read_def single_row.def + +set guide_file [make_result_file single_row.guide] + +global_route -verbose + +write_guides $guide_file + +diff_file single_row.guideok $guide_file From 600ff1073430058e0b6948e94150138b1f52f5ad Mon Sep 17 00:00:00 2001 From: Tobias Senti Date: Sun, 3 Mar 2024 21:59:08 +0100 Subject: [PATCH 20/30] grt: fix gridsize calculation if diesize is smaller than tilesize Signed-off-by: Tobias Senti --- src/grt/src/GlobalRouter.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/grt/src/GlobalRouter.cpp b/src/grt/src/GlobalRouter.cpp index 9556b6c8936..97d756dae2c 100644 --- a/src/grt/src/GlobalRouter.cpp +++ b/src/grt/src/GlobalRouter.cpp @@ -2477,8 +2477,8 @@ void GlobalRouter::initGrid(int max_layer) int tile_size = grid_->getPitchesInTile() * track_spacing; - int x_grids = upper_rightX / tile_size; - int y_grids = upper_rightY / tile_size; + int x_grids = std::max(1, upper_rightX / tile_size); + int y_grids = std::max(1, upper_rightY / tile_size); bool perfect_regular_x = (x_grids * tile_size) == upper_rightX; bool perfect_regular_y = (y_grids * tile_size) == upper_rightY; From e9c57ff16db2c7c285c8ef5aad9d76430c35c634 Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Wed, 6 Mar 2024 20:47:47 -0800 Subject: [PATCH 21/30] update sta Signed-off-by: Matt Liberty --- src/sta | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sta b/src/sta index 9eeba890768..fbfc705282d 160000 --- a/src/sta +++ b/src/sta @@ -1 +1 @@ -Subproject commit 9eeba89076813a4e9964b153b1da9fd453c01adf +Subproject commit fbfc705282d102cccbdf3472e86fc9da35268ab5 From a36bbcea0e1417024691626700f393b07a118898 Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Thu, 7 Mar 2024 12:06:48 -0800 Subject: [PATCH 22/30] cts: take the slew limit in the order: output then input then default Some PDKs only have the slew limit on the input or only on the output. Signed-off-by: Matt Liberty --- src/cts/src/TechChar.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/cts/src/TechChar.cpp b/src/cts/src/TechChar.cpp index 9172d1fd161..1030bfd9dbd 100644 --- a/src/cts/src/TechChar.cpp +++ b/src/cts/src/TechChar.cpp @@ -601,8 +601,12 @@ void TechChar::initCharacterization() sta::LibertyLibrary* lib = libertyCell->libertyLibrary(); output->slewLimit(sta::MinMax::max(), maxSlew, maxSlewExist); - if (!maxSlewExist) + if (!maxSlewExist) { + input->slewLimit(sta::MinMax::max(), maxSlew, maxSlewExist); + } + if (!maxSlewExist) { lib->defaultMaxSlew(maxSlew, maxSlewExist); + } if (!maxSlewExist) logger_->error( CTS, 107, "No max slew found for cell {}.", bufMasterName); From 6f7b73dd13c8f8575a750867fd085dd295785b04 Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Thu, 7 Mar 2024 15:49:18 -0800 Subject: [PATCH 23/30] Add Design.createDetachedDb for use cases requiring multiple dbDatabases See discussion in #4743 Signed-off-by: Matt Liberty --- include/ord/Design.h | 9 +++++++++ src/Design.cc | 9 +++++++++ test/regression_tests.tcl | 1 + test/two_designs.ok | 0 test/two_designs.py | 23 +++++++++++++++++++++++ 5 files changed, 42 insertions(+) create mode 100644 test/two_designs.ok create mode 100644 test/two_designs.py diff --git a/include/ord/Design.h b/include/ord/Design.h index b6599d2d1ae..23afdc67526 100644 --- a/include/ord/Design.h +++ b/include/ord/Design.h @@ -41,6 +41,7 @@ namespace odb { class dbBlock; +class dbDatabase; class dbMaster; class dbMTerm; class dbNet; @@ -192,6 +193,14 @@ class Design pdn::PdnGen* getPdnGen(); pad::ICeWall* getICeWall(); + // This returns a database that is not the one associated with + // the rest of the application. It is usable as a standalone + // db but should not passed to any other Design or Tech APIs. + // + // This is useful if you need a second database for specialized + // use cases and is not ordinarily required. + static odb::dbDatabase* createDetachedDb(); + private: sta::dbSta* getSta(); sta::LibertyCell* getLibertyCell(odb::dbMaster* master); diff --git a/src/Design.cc b/src/Design.cc index d781c1f6a15..7641817e66e 100644 --- a/src/Design.cc +++ b/src/Design.cc @@ -347,4 +347,13 @@ pad::ICeWall* Design::getICeWall() return app->getICeWall(); } +/* static */ +odb::dbDatabase* Design::createDetachedDb() +{ + auto app = OpenRoad::openRoad(); + auto db = odb::dbDatabase::create(); + db->setLogger(app->getLogger()); + return db; +} + } // namespace ord diff --git a/test/regression_tests.tcl b/test/regression_tests.tcl index aaa1a614ad1..93293693aa7 100644 --- a/test/regression_tests.tcl +++ b/test/regression_tests.tcl @@ -6,6 +6,7 @@ record_tests { timing_api_3 upf_test upf_aes + two_designs } define_test_group "non_flow" { diff --git a/test/two_designs.ok b/test/two_designs.ok new file mode 100644 index 00000000000..e69de29bb2d diff --git a/test/two_designs.py b/test/two_designs.py new file mode 100644 index 00000000000..b9dc01a1686 --- /dev/null +++ b/test/two_designs.py @@ -0,0 +1,23 @@ +import os +import helpers +from openroad import Design, Tech +import odb + +ord_tech1 = Tech() +design1 = Design(ord_tech1) +design1.readDb('../src/odb/test/data/design.odb') + +db2 = Design.createDetachedDb() +db2 = odb.read_db(db2, '../src/odb/test/data/design.odb') + +db1_file = helpers.make_result_file('db1.odb') +db2_file = helpers.make_result_file('db2.odb') + +design1.writeDb(db1_file) +odb.write_db(db2, db2_file) + +if not os.path.isfile(db1_file): + raise Exception(f"file missing {db1_file}") + +if not os.path.isfile(db2_file): + raise Exception(f"file missing {db2_file}") From 69cbe0261c844416478cb5c12c435e544859f3f0 Mon Sep 17 00:00:00 2001 From: Peter Gadfort Date: Sat, 9 Mar 2024 17:02:19 -0500 Subject: [PATCH 24/30] odb: add serializers to structs Signed-off-by: Peter Gadfort --- src/odb/src/codeGenerator/gen.py | 3 +- .../schema/chip/dbGCellGrid.json | 9 ++- src/odb/src/codeGenerator/templates/impl.cpp | 81 ++++++------------- .../codeGenerator/templates/serializer_in.cpp | 29 +++++++ .../templates/serializer_out.cpp | 29 +++++++ src/odb/src/db/dbGCellGrid.cpp | 13 ++- 6 files changed, 95 insertions(+), 69 deletions(-) create mode 100644 src/odb/src/codeGenerator/templates/serializer_in.cpp create mode 100644 src/odb/src/codeGenerator/templates/serializer_out.cpp diff --git a/src/odb/src/codeGenerator/gen.py b/src/odb/src/codeGenerator/gen.py index 3298f54f532..7251a1e123e 100755 --- a/src/odb/src/codeGenerator/gen.py +++ b/src/odb/src/codeGenerator/gen.py @@ -160,11 +160,10 @@ def get_json_files(directory): logging.debug(f"Add hash field {inParentHashField['name']} to {relation['first']}") logging.debug(f"Add hash field {inChildNextEntry['name']} to {relation['second']}") - for klass in schema["classes"]: # Adding functional name to fields and extracting field components - struct = {"name": f"{klass['name']}Flags", "fields": []} + struct = {"name": f"{klass['name']}Flags", "fields": [], "flags": ["no-serializer"]} klass["hasTables"] = False flag_num_bits = 0 for field in klass["fields"]: diff --git a/src/odb/src/codeGenerator/schema/chip/dbGCellGrid.json b/src/odb/src/codeGenerator/schema/chip/dbGCellGrid.json index b3760e16563..738193dbaf3 100644 --- a/src/odb/src/codeGenerator/schema/chip/dbGCellGrid.json +++ b/src/odb/src/codeGenerator/schema/chip/dbGCellGrid.json @@ -88,17 +88,20 @@ { "name": "usage", "type": "uint8_t", - "flags": ["no-serial"], + "flags": [], "default": 0 }, { "name": "capacity", "type": "uint8_t", - "flags": ["no-serial"], + "flags": [], "default": 0 } ], - "public": true + "public": true, + "flags": [ + "no-serializer-in" + ] } ], "cpp_includes": [ diff --git a/src/odb/src/codeGenerator/templates/impl.cpp b/src/odb/src/codeGenerator/templates/impl.cpp index 59e5b17f0b9..0d15934d857 100755 --- a/src/odb/src/codeGenerator/templates/impl.cpp +++ b/src/odb/src/codeGenerator/templates/impl.cpp @@ -213,64 +213,31 @@ namespace odb { //User Code Begin CopyConstructor //User Code End CopyConstructor } - - dbIStream& operator>>(dbIStream& stream, _{{klass.name}}& obj) - { - {% for field in klass.fields %} - {% if field.bitFields %} - {% if field.numBits == 32 %} - uint32_t {{field.name}}bit_field; - {% else %} - uint64_t {{field.name}}bit_field; - {% endif %} - stream >> {{field.name}}bit_field; - static_assert(sizeof(obj.{{field.name}}) == sizeof({{field.name}}bit_field)); - std::memcpy(&obj.{{field.name}}, &{{field.name}}bit_field, sizeof({{field.name}}bit_field)); - {% else %} - {% if 'no-serial' not in field.flags %} - {% if 'schema' in field %} - if (obj.getDatabase()->isSchema({{field.schema}})) { - {% endif %} - stream >> {% if field.table %}*{% endif %}obj.{{field.name}}; - {% if 'schema' in field %} - } - {% endif %} - {% endif %} - {% endif %} - {% endfor %} - //User Code Begin >> - //User Code End >> - return stream; - } - dbOStream& operator<<(dbOStream& stream, const _{{klass.name}}& obj) - { - {% for field in klass.fields %} - {% if field.bitFields %} - {% if field.numBits == 32 %} - uint32_t {{field.name}}bit_field; - {% else %} - uint64_t {{field.name}}bit_field; - {% endif %} - static_assert(sizeof(obj.{{field.name}}) == sizeof({{field.name}}bit_field)); - std::memcpy(&{{field.name}}bit_field, &obj.{{field.name}}, sizeof(obj.{{field.name}})); - stream << {{field.name}}bit_field; - {% else %} - {% if 'no-serial' not in field.flags %} - {% if 'schema' in field %} - if (obj.getDatabase()->isSchema({{field.schema}})) { - {% endif %} - stream << {% if field.table %}*{% endif %}obj.{{field.name}}; - {% if 'schema' in field %} - } - {% endif %} - {% endif %} - {% endif %} - {% endfor %} - //User Code Begin << - //User Code End << - return stream; - } + {% for _struct in klass.structs %} + {% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-in' not in _struct['flags']) %} + {% set sname = klass.name+'::'+_struct.name %} + {% set sklass = _struct %} + {% set comment_tag = _struct.name %} + {% include 'serializer_in.cpp' %} + {% endif %} + {% endfor %} + {% set sklass = klass %} + {% set sname = '_'+sklass.name %} + {% set comment_tag = "" %} + {% include 'serializer_in.cpp' %} + + {% for _struct in klass.structs %}{% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-out' not in _struct['flags']) %} + {% set sname = klass.name+'::'+_struct.name %} + {% set sklass = _struct %} + {% set comment_tag = _struct.name %} + {% include 'serializer_out.cpp' %} + {% endif %} + {% endfor %} + {% set sklass = klass %} + {% set sname = '_'+sklass.name %} + {% set comment_tag = "" %} + {% include 'serializer_out.cpp' %} {% if klass.hasTables %} dbObjectTable* _{{klass.name}}::getObjectTable(dbObjectType type) diff --git a/src/odb/src/codeGenerator/templates/serializer_in.cpp b/src/odb/src/codeGenerator/templates/serializer_in.cpp new file mode 100644 index 00000000000..1508c9f733e --- /dev/null +++ b/src/odb/src/codeGenerator/templates/serializer_in.cpp @@ -0,0 +1,29 @@ + dbIStream& operator>>(dbIStream& stream, {{sname}}& obj) + { + {% for field in sklass.fields %} + {% if field.bitFields %} + {% if field.numBits == 32 %} + uint32_t {{field.name}}bit_field; + {% else %} + uint64_t {{field.name}}bit_field; + {% endif %} + stream >> {{field.name}}bit_field; + static_assert(sizeof(obj.{{field.name}}) == sizeof({{field.name}}bit_field)); + std::memcpy(&obj.{{field.name}}, &{{field.name}}bit_field, sizeof({{field.name}}bit_field)); + {% else %} + {% if 'no-serial' not in field.flags %} + {% if 'schema' in field %} + if (obj.getDatabase()->isSchema({{field.schema}})) { + {% endif %} + stream >> {% if field.table %}*{% endif %}obj.{{field.name}}; + {% if 'schema' in field %} + } + {% endif %} + {% endif %} + {% endif %} + {% endfor %} + //User Code Begin >>{{ comment_tag }} + //User Code End >>{{ comment_tag }} + return stream; + } + diff --git a/src/odb/src/codeGenerator/templates/serializer_out.cpp b/src/odb/src/codeGenerator/templates/serializer_out.cpp new file mode 100644 index 00000000000..e479286fe1e --- /dev/null +++ b/src/odb/src/codeGenerator/templates/serializer_out.cpp @@ -0,0 +1,29 @@ + dbOStream& operator<<(dbOStream& stream, const {{sname}}& obj) + { + {% for field in sklass.fields %} + {% if field.bitFields %} + {% if field.numBits == 32 %} + uint32_t {{field.name}}bit_field; + {% else %} + uint64_t {{field.name}}bit_field; + {% endif %} + static_assert(sizeof(obj.{{field.name}}) == sizeof({{field.name}}bit_field)); + std::memcpy(&{{field.name}}bit_field, &obj.{{field.name}}, sizeof(obj.{{field.name}})); + stream << {{field.name}}bit_field; + {% else %} + {% if 'no-serial' not in field.flags %} + {% if 'schema' in field %} + if (obj.getDatabase()->isSchema({{field.schema}})) { + {% endif %} + stream << {% if field.table %}*{% endif %}obj.{{field.name}}; + {% if 'schema' in field %} + } + {% endif %} + {% endif %} + {% endif %} + {% endfor %} + //User Code Begin <<{{ comment_tag }} + //User Code End <<{{ comment_tag }} + return stream; + } + diff --git a/src/odb/src/db/dbGCellGrid.cpp b/src/odb/src/db/dbGCellGrid.cpp index 6e1e2f7c2a3..abbabcc03bf 100644 --- a/src/odb/src/db/dbGCellGrid.cpp +++ b/src/odb/src/db/dbGCellGrid.cpp @@ -181,6 +181,12 @@ dbIStream& operator>>(dbIStream& stream, _dbGCellGrid& obj) return stream; } +dbOStream& operator<<(dbOStream& stream, const dbGCellGrid::GCellData& obj) +{ + stream << obj.usage; + stream << obj.capacity; + return stream; +} dbOStream& operator<<(dbOStream& stream, const _dbGCellGrid& obj) { uint32_t flags_bit_field; @@ -229,13 +235,6 @@ dbIStream& operator>>(dbIStream& stream, dbGCellGrid::GCellData& obj) return stream; } -dbOStream& operator<<(dbOStream& stream, const dbGCellGrid::GCellData& obj) -{ - stream << obj.usage; - stream << obj.capacity; - return stream; -} - dbMatrix& _dbGCellGrid::get( const dbId<_dbTechLayer>& lid) { From d32b26785f14f035f0243db993d13988483585c9 Mon Sep 17 00:00:00 2001 From: Peter Gadfort Date: Sat, 9 Mar 2024 17:39:53 -0500 Subject: [PATCH 25/30] odb: check for names in forward declarations and add db.h when needed Signed-off-by: Peter Gadfort --- src/odb/src/codeGenerator/gen.py | 8 ++++++++ src/odb/src/db/dbGCellGrid.h | 3 +-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/odb/src/codeGenerator/gen.py b/src/odb/src/codeGenerator/gen.py index 7251a1e123e..2906fdf2958 100755 --- a/src/odb/src/codeGenerator/gen.py +++ b/src/odb/src/codeGenerator/gen.py @@ -216,6 +216,7 @@ def get_json_files(directory): and template_class_name not in std and "no-template" not in field["flags"] and klass["name"] != template_class_name[1:] + and klass["name"]+"::" != template_class_name[0:len(klass["name"])+2] ): klass["classes"].append(template_class_name) #### @@ -302,6 +303,13 @@ def get_json_files(directory): }, ) + # Add required header files if they are not already expressed + for struct in klass["structs"]: + if "public" in struct and struct["public"]: + if "db.h" not in klass["h_includes"]: + klass["h_includes"].append("db.h") + break + # Generating files for template_file in ["impl.h", "impl.cpp"]: template = env.get_template(template_file) diff --git a/src/odb/src/db/dbGCellGrid.h b/src/odb/src/db/dbGCellGrid.h index 91f4c676a2b..675a5bd44d8 100644 --- a/src/odb/src/db/dbGCellGrid.h +++ b/src/odb/src/db/dbGCellGrid.h @@ -33,13 +33,12 @@ // Generator Code Begin Header #pragma once +#include "db.h" #include "dbCore.h" #include "odb.h" - // User Code Begin Includes #include -#include "db.h" #include "dbMatrix.h" #include "dbVector.h" // User Code End Includes From 83f6b87cb57b90350615f107ae0fe1e826260edc Mon Sep 17 00:00:00 2001 From: Peter Gadfort Date: Sat, 9 Mar 2024 17:45:19 -0500 Subject: [PATCH 26/30] odb: fix indent in gen.py Signed-off-by: Peter Gadfort --- src/odb/src/codeGenerator/gen.py | 2 +- src/odb/src/codeGenerator/templates/impl.cpp | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/odb/src/codeGenerator/gen.py b/src/odb/src/codeGenerator/gen.py index 2906fdf2958..1ce111b7fe6 100755 --- a/src/odb/src/codeGenerator/gen.py +++ b/src/odb/src/codeGenerator/gen.py @@ -266,7 +266,7 @@ def get_json_files(directory): # For fields that we need to free/destroy in the destructor if field["name"] == '_name' and 'no-destruct' not in field["flags"] or "table" in field: - klass["needs_non_default_destructor"] = True + klass["needs_non_default_destructor"] = True klass["fields"] = [field for field in klass["fields"] if "bits" not in field] diff --git a/src/odb/src/codeGenerator/templates/impl.cpp b/src/odb/src/codeGenerator/templates/impl.cpp index 0d15934d857..70e00241ea5 100755 --- a/src/odb/src/codeGenerator/templates/impl.cpp +++ b/src/odb/src/codeGenerator/templates/impl.cpp @@ -227,7 +227,8 @@ namespace odb { {% set comment_tag = "" %} {% include 'serializer_in.cpp' %} - {% for _struct in klass.structs %}{% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-out' not in _struct['flags']) %} + {% for _struct in klass.structs %} + {% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-out' not in _struct['flags']) %} {% set sname = klass.name+'::'+_struct.name %} {% set sklass = _struct %} {% set comment_tag = _struct.name %} From 19938be28f3e4e3ae7706b4832ab51b5979a09be Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Sat, 9 Mar 2024 17:44:43 -0800 Subject: [PATCH 27/30] Exclude "*/codeGenerator/templates/*" from the clang-tidy check Signed-off-by: Matt Liberty --- .github/workflows/github-actions-clang-tidy.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/github-actions-clang-tidy.yml b/.github/workflows/github-actions-clang-tidy.yml index fb33833e120..bb6a7512aea 100644 --- a/.github/workflows/github-actions-clang-tidy.yml +++ b/.github/workflows/github-actions-clang-tidy.yml @@ -17,6 +17,7 @@ jobs: build_dir: './build' cmake_command: cmake . -B build config_file: '.clang-tidy' + exclude: "*/codeGenerator/templates/*" split_workflow: true - name: Upload Artifacts uses: actions/upload-artifact@v3 From df4d828370c2bffb71207b79300ac183fed26417 Mon Sep 17 00:00:00 2001 From: Peter Gadfort Date: Sat, 9 Mar 2024 21:02:21 -0500 Subject: [PATCH 28/30] odb: adjust indents in template for impl.cpp Signed-off-by: Peter Gadfort --- src/odb/src/codeGenerator/templates/impl.cpp | 24 ++++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/odb/src/codeGenerator/templates/impl.cpp b/src/odb/src/codeGenerator/templates/impl.cpp index 70e00241ea5..68d51b19842 100755 --- a/src/odb/src/codeGenerator/templates/impl.cpp +++ b/src/odb/src/codeGenerator/templates/impl.cpp @@ -215,12 +215,12 @@ namespace odb { } {% for _struct in klass.structs %} - {% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-in' not in _struct['flags']) %} - {% set sname = klass.name+'::'+_struct.name %} - {% set sklass = _struct %} - {% set comment_tag = _struct.name %} - {% include 'serializer_in.cpp' %} - {% endif %} + {% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-in' not in _struct['flags']) %} + {% set sname = klass.name+'::'+_struct.name %} + {% set sklass = _struct %} + {% set comment_tag = _struct.name %} + {% include 'serializer_in.cpp' %} + {% endif %} {% endfor %} {% set sklass = klass %} {% set sname = '_'+sklass.name %} @@ -228,12 +228,12 @@ namespace odb { {% include 'serializer_in.cpp' %} {% for _struct in klass.structs %} - {% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-out' not in _struct['flags']) %} - {% set sname = klass.name+'::'+_struct.name %} - {% set sklass = _struct %} - {% set comment_tag = _struct.name %} - {% include 'serializer_out.cpp' %} - {% endif %} + {% if 'flags' not in _struct or ('no-serializer' not in _struct['flags'] and 'no-serializer-out' not in _struct['flags']) %} + {% set sname = klass.name+'::'+_struct.name %} + {% set sklass = _struct %} + {% set comment_tag = _struct.name %} + {% include 'serializer_out.cpp' %} + {% endif %} {% endfor %} {% set sklass = klass %} {% set sname = '_'+sklass.name %} From a92da6ccd28abbd946cf05362f0c04b085624b8b Mon Sep 17 00:00:00 2001 From: Ikko Eltociear Ashimine Date: Sun, 10 Mar 2024 22:34:18 +0900 Subject: [PATCH 29/30] Update mpl_aux.py postive -> positive Signed-off-by: Ikko Eltociear Ashimine --- src/mpl/test/mpl_aux.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mpl/test/mpl_aux.py b/src/mpl/test/mpl_aux.py index 380bf54bc16..067463f4bad 100644 --- a/src/mpl/test/mpl_aux.py +++ b/src/mpl/test/mpl_aux.py @@ -101,7 +101,7 @@ def is_pos_int(x): elif isinstance(x, int) and x > 0 : return True else: - utl.error(utl.GPL, 507, f"TypeError: {x} is not a postive integer") + utl.error(utl.GPL, 507, f"TypeError: {x} is not a positive integer") return False @@ -111,5 +111,5 @@ def is_pos_float(x): elif isinstance(x, float) and x >= 0 : return True else: - utl.error(utl.MPL, 202, f"TypeError: {x} is not a postive float") + utl.error(utl.MPL, 202, f"TypeError: {x} is not a positive float") return False From 91338192f4dc107ffe023f97a630022126b7c346 Mon Sep 17 00:00:00 2001 From: Matt Liberty Date: Sun, 10 Mar 2024 22:02:12 -0700 Subject: [PATCH 30/30] Exclude uninteresting dirs for the code coverage report Signed-off-by: Matt Liberty --- etc/CodeCoverage.sh | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/etc/CodeCoverage.sh b/etc/CodeCoverage.sh index 29fd307b1c8..8615739988a 100755 --- a/etc/CodeCoverage.sh +++ b/etc/CodeCoverage.sh @@ -16,6 +16,8 @@ EOF _lcov() { ./test/regression + # sta has a private test suite; mpl is obsoleted by mpl2; + # drt's gr is not in use mkdir -p coverage-output lcov \ --capture \ @@ -27,6 +29,10 @@ _lcov() { --exclude "*/.local/*" \ --exclude "*build*" \ --exclude "*/third-party/*" \ + --exclude "*/sta/*" \ + --exclude "*/mpl/*" \ + --exclude "*/drt/src/gr/*" \ + --exclude "*/drt/src/db/grObj/*" \ --output-file ./coverage-output/main_coverage.info genhtml ./coverage-output/main_coverage.info \