diff --git a/src/dbSta/src/dbReadVerilog.cc b/src/dbSta/src/dbReadVerilog.cc
index b2c7b4fd0fa..eff27a5b60c 100644
--- a/src/dbSta/src/dbReadVerilog.cc
+++ b/src/dbSta/src/dbReadVerilog.cc
@@ -402,7 +402,7 @@ void Verilog2db::makeDbModule(
             dbModBTerm* modbterm
                 = dbModBTerm::create(module, bus_bit_port.c_str());
             if (i == 0) {
-              dbbusport->setFirstMember(modbterm);
+              dbbusport->setMembers(modbterm);
             }
             if (i == size - 1) {
               dbbusport->setLast(modbterm);
diff --git a/src/odb/include/odb/db.h b/src/odb/include/odb/db.h
index 04b4ef0fdb4..457b6bbe06e 100644
--- a/src/odb/include/odb/db.h
+++ b/src/odb/include/odb/db.h
@@ -7169,8 +7169,6 @@ class dbBusPort : public dbObject
   // get element by bit index in bus (allows for up/down)
   // linear access
   dbModBTerm* getBusIndexedElement(int index);
-  void setFirstMember(dbModBTerm*);
-  dbModBTerm* getFirstMember();
   dbSet<dbModBTerm> getBusPortMembers();
   int getSize() const;
   bool getUpdown() const;
diff --git a/src/odb/src/db/dbBusPort.cpp b/src/odb/src/db/dbBusPort.cpp
index af300272352..182329ab3d3 100644
--- a/src/odb/src/db/dbBusPort.cpp
+++ b/src/odb/src/db/dbBusPort.cpp
@@ -302,27 +302,6 @@ dbModBTerm* dbBusPort::getBusIndexedElement(int index)
   return nullptr;
 }
 
-void dbBusPort::setFirstMember(dbModBTerm* modbterm)
-{
-  if (modbterm) {
-    _dbBusPort* obj = (_dbBusPort*) this;
-    _dbModBTerm* mbt = (_dbModBTerm*) modbterm;
-    obj->_members = mbt->getId();
-  }
-}
-
-dbModBTerm* dbBusPort::getFirstMember()
-{
-  _dbBusPort* obj = (_dbBusPort*) this;
-  _dbBlock* block = (_dbBlock*) obj->getOwner();
-  if (obj->_members != 0) {
-    dbModBTerm* ret
-        = (dbModBTerm*) (block->_modbterm_tbl->getPtr(obj->_members));
-    return ret;
-  }
-  return nullptr;
-}
-
 int dbBusPort::getSize() const
 {
   _dbBusPort* obj = (_dbBusPort*) this;