(Not official)
develop branch : xiangshan master
https://www.oracle.com/docs/tech/systems/t2-06-opensparct2-core-microarch.pdf
https://github.com/lizhirui/DreamCoreV2/blob/main/docs/pipeline_behavior.md
基于RISC-V指令集的超标量处理器设计与实现
(Not official)
develop branch : xiangshan master
https://www.oracle.com/docs/tech/systems/t2-06-opensparct2-core-microarch.pdf
https://github.com/lizhirui/DreamCoreV2/blob/main/docs/pipeline_behavior.md
基于RISC-V指令集的超标量处理器设计与实现