diff --git a/include/kernel-6.1 b/include/kernel-6.1 deleted file mode 100644 index 10efa31ea7b54a..00000000000000 --- a/include/kernel-6.1 +++ /dev/null @@ -1,2 +0,0 @@ -LINUX_VERSION-6.1 = .109 -LINUX_KERNEL_HASH-6.1.109 = 732ff40ac63642c5ddbb7d65c24c90ed08b95af0e8c92df4739e9703eec01ac1 diff --git a/include/site/linux b/include/site/linux index 1dadd60bf37f6b..1ca2837c28a36d 100644 --- a/include/site/linux +++ b/include/site/linux @@ -53,7 +53,6 @@ ac_cv_have_control_in_msghdr=yes ac_cv_have_decl_sys_siglist=no ac_cv_have_openpty_ctty_bug=yes ac_cv_have_space_d_name_in_struct_dirent=yes -ac_cv_header_netinet_sctp_h=no ac_cv_header_netinet_sctp_uio_h=no ac_cv_int64_t=yes ac_cv_lbl_unaligned_fail=no diff --git a/package/boot/tfa-layerscape/Makefile b/package/boot/tfa-layerscape/Makefile index bf155b926a0153..c97dd997ffa663 100644 --- a/package/boot/tfa-layerscape/Makefile +++ b/package/boot/tfa-layerscape/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=tfa-layerscape -PKG_VERSION:=6.6.3.1.0.0 +PKG_VERSION:=6.6.23.2.0.0 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/nxp-qoriq/atf -PKG_SOURCE_VERSION:=lf-6.6.3-1.0.0 -PKG_MIRROR_HASH:=28b731c1c4cc3226ccaef2142c61127f213c03cbd219df556c1d191e95f8470c +PKG_SOURCE_VERSION:=lf-6.6.23-2.0.0 +PKG_MIRROR_HASH:=628a95ba60a593ae0575ee9ede1154445ec3a86a07b18e4947e06e13c2b67859 PKG_BUILD_DEPENDS:=tfa-layerscape/host include $(INCLUDE_DIR)/host-build.mk diff --git a/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch b/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch index 050b4356efb2cc..db91bd75dd1d88 100644 --- a/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch +++ b/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -953,10 +953,6 @@ CRTTOOL ?= ${CRTTOOLPATH}/cert_create$ +@@ -128,10 +128,6 @@ CRTTOOL ?= ${CRTTOOLPATH}/cert_create$ ENCTOOLPATH ?= tools/encrypt_fw ENCTOOL ?= ${ENCTOOLPATH}/encrypt_fw${BIN_EXT} @@ -11,7 +11,7 @@ # Variables for use with sptool SPTOOLPATH ?= tools/sptool SPTOOL ?= ${SPTOOLPATH}/sptool.py -@@ -1409,13 +1405,6 @@ endif +@@ -1597,13 +1593,6 @@ endif #(CHECKPATCH) clean: @echo " CLEAN" $(call SHELL_REMOVE_DIR,${BUILD_PLAT}) @@ -21,11 +21,11 @@ -# Clear the MAKEFLAGS as we do not want -# to pass the gnumake flags to nmake. - ${Q}set MAKEFLAGS= && ${MSVC_NMAKE} /nologo /f ${FIPTOOLPATH}/Makefile.msvc FIPTOOLPATH=$(subst /,\,$(FIPTOOLPATH)) FIPTOOL=$(subst /,\,$(FIPTOOL)) clean --endif +-endif #(UNIX_MK) ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} clean ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${ENCTOOLPATH} clean ${Q}${MAKE} --no-print-directory -C ${ROMLIBPATH} clean -@@ -1424,13 +1413,6 @@ realclean distclean: +@@ -1612,13 +1601,6 @@ realclean distclean: @echo " REALCLEAN" $(call SHELL_REMOVE_DIR,${BUILD_BASE}) $(call SHELL_DELETE_ALL, ${CURDIR}/cscope.*) @@ -35,29 +35,29 @@ -# Clear the MAKEFLAGS as we do not want -# to pass the gnumake flags to nmake. - ${Q}set MAKEFLAGS= && ${MSVC_NMAKE} /nologo /f ${FIPTOOLPATH}/Makefile.msvc FIPTOOLPATH=$(subst /,\,$(FIPTOOLPATH)) FIPTOOL=$(subst /,\,$(FIPTOOL)) realclean --endif +-endif #(UNIX_MK) ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} realclean ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${ENCTOOLPATH} realclean ${Q}${MAKE} --no-print-directory -C ${ROMLIBPATH} clean -@@ -1486,7 +1468,7 @@ certificates: ${CRT_DEPS} ${CRTTOOL} +@@ -1674,7 +1656,7 @@ certificates: ${CRT_DEPS} ${CRTTOOL} @${ECHO_BLANK_LINE} - endif + endif #(GENERATE_COT) -${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS} ${FIPTOOL} +${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS} $(eval ${CHECK_FIP_CMD}) ${Q}${FIPTOOL} create ${FIP_ARGS} $@ ${Q}${FIPTOOL} info $@ -@@ -1503,7 +1485,7 @@ fwu_certificates: ${FWU_CRT_DEPS} ${CRTT +@@ -1691,7 +1673,7 @@ fwu_certificates: ${FWU_CRT_DEPS} ${CRTT @${ECHO_BLANK_LINE} - endif + endif #(GENERATE_COT) -${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS} ${FIPTOOL} +${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS} $(eval ${CHECK_FWU_FIP_CMD}) ${Q}${FIPTOOL} create ${FWU_FIP_ARGS} $@ ${Q}${FIPTOOL} info $@ -@@ -1511,19 +1493,9 @@ ${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP +@@ -1699,19 +1681,9 @@ ${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP @echo "Built $@ successfully" @${ECHO_BLANK_LINE} @@ -72,26 +72,26 @@ -# Clear the MAKEFLAGS as we do not want -# to pass the gnumake flags to nmake. - ${Q}set MAKEFLAGS= && ${MSVC_NMAKE} /nologo /f ${FIPTOOLPATH}/Makefile.msvc FIPTOOLPATH=$(subst /,\,$(FIPTOOLPATH)) FIPTOOL=$(subst /,\,$(FIPTOOL)) --endif +-endif #(UNIX_MK) - romlib.bin: libraries FORCE ${Q}${MAKE} PLAT_DIR=${PLAT_DIR} BUILD_PLAT=${BUILD_PLAT} ENABLE_BTI=${ENABLE_BTI} ARM_ARCH_MINOR=${ARM_ARCH_MINOR} INCLUDES='${INCLUDES}' DEFINES='${DEFINES}' --no-print-directory -C ${ROMLIBPATH} all --- a/tools/fiptool/Makefile +++ b/tools/fiptool/Makefile -@@ -67,7 +67,7 @@ all: ${PROJECT} +@@ -81,7 +81,7 @@ all: --openssl ${PROJECT} - ${PROJECT}: --openssl ${OBJECTS} Makefile + ${PROJECT}: ${OBJECTS} Makefile @echo " HOSTLD $@" -- ${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS} -+ ${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS} $(LDFLAGS) +- ${Q}${HOSTCC} ${OBJECTS} -o $@ $(LDOPTS) ++ ${Q}${HOSTCC} ${OBJECTS} -o $@ $(LDOPTS) $(LDFLAGS) @${ECHO_BLANK_LINE} @echo "Built $@ successfully" @${ECHO_BLANK_LINE} ---- a/tools/nxp/plat_fiptool/plat_fiptool.mk -+++ b/tools/nxp/plat_fiptool/plat_fiptool.mk -@@ -22,11 +22,11 @@ INCLUDE_PATHS += -I${PLAT_DEF_UUID_OID_C - $(shell rm ${PLAT_DEF_UUID_CONFIG_FILE_PATH}/${PLAT_DEF_UUID_CONFIG_FILE_NAME}.o) +--- a/tools/fiptool/plat_fiptool/nxp/plat_fiptool.mk ++++ b/tools/fiptool/plat_fiptool/nxp/plat_fiptool.mk +@@ -21,11 +21,11 @@ INCLUDE_PATHS += -I${PLAT_DEF_UUID_OID_C + -I./ ifeq (${PLAT_DEF_OID},yes) -HOSTCCFLAGS += -DPLAT_DEF_OID diff --git a/package/boot/uboot-envtools/files/mediatek_filogic b/package/boot/uboot-envtools/files/mediatek_filogic index 73a7dc1517091d..a38024de65976b 100644 --- a/package/boot/uboot-envtools/files/mediatek_filogic +++ b/package/boot/uboot-envtools/files/mediatek_filogic @@ -86,6 +86,8 @@ zbtlink,zbt-z8103ax) dlink,aquila-pro-ai-m30-a1) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x40000" ;; +glinet,gl-x3000|\ +glinet,gl-xe3000|\ glinet,gl-mt2500|\ glinet,gl-mt6000) local envdev=$(find_mmc_part "u-boot-env") diff --git a/package/boot/uboot-layerscape/Makefile b/package/boot/uboot-layerscape/Makefile index 722f4f30b754ee..ba0bd113daf274 100644 --- a/package/boot/uboot-layerscape/Makefile +++ b/package/boot/uboot-layerscape/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=uboot-layerscape -PKG_VERSION:=6.6.3.1.0.0 +PKG_VERSION:=6.6.23.2.0.0 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/nxp-qoriq/u-boot -PKG_SOURCE_VERSION:=lf-6.6.3-1.0.0 -PKG_MIRROR_HASH:=dec5b6e4fe328b930f201fbf06a0a7b71a9dd72f38f16c9570188c0a7fea916a +PKG_SOURCE_VERSION:=lf-6.6.23-2.0.0 +PKG_MIRROR_HASH:=41e089fde1d0b3b0998e6af33d5f4c2b62860bda6cd1e6a0e8d47dfd5749005d include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk diff --git a/package/boot/uboot-layerscape/patches/0900-layerscape-adjust-LS1021A-IOT-config-for-OpenWrt.patch b/package/boot/uboot-layerscape/patches/0900-layerscape-adjust-LS1021A-IOT-config-for-OpenWrt.patch index fbd96c0fa974bd..c2a13e27f73b7d 100644 --- a/package/boot/uboot-layerscape/patches/0900-layerscape-adjust-LS1021A-IOT-config-for-OpenWrt.patch +++ b/package/boot/uboot-layerscape/patches/0900-layerscape-adjust-LS1021A-IOT-config-for-OpenWrt.patch @@ -17,16 +17,16 @@ Signed-off-by: Pawel Dembicki --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig -@@ -24,7 +24,7 @@ CONFIG_AHCI=y - CONFIG_LAYERSCAPE_NS_ACCESS=y - CONFIG_PCIE1=y - CONFIG_PCIE2=y +@@ -14,7 +14,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y + CONFIG_DM_GPIO=y + CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" + CONFIG_SPL_TEXT_BASE=0x10000000 -CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_SYS_MONITOR_LEN=786432 - CONFIG_OF_BOARD_SETUP=y - CONFIG_OF_STDOUT_VIA_ALIAS=y - CONFIG_RAMBOOT_PBL=y -@@ -40,7 +40,7 @@ CONFIG_SPL_MAX_SIZE=0x1a000 + CONFIG_SPL_MMC=y + CONFIG_SPL_SERIAL=y + CONFIG_SPL_STACK=0x1001d000 +@@ -43,7 +43,7 @@ CONFIG_SPL_MAX_SIZE=0x1a000 CONFIG_SPL_PAD_TO=0x1c000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 @@ -34,8 +34,8 @@ Signed-off-by: Pawel Dembicki +CONFIG_SPL_BSS_MAX_SIZE=0xc0000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set - CONFIG_SYS_SPL_MALLOC=y -@@ -66,8 +66,11 @@ CONFIG_CMD_MII=y + CONFIG_SPL_SYS_MALLOC=y +@@ -67,8 +67,11 @@ CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index 431ab54c742d75..d6e9be913c47db 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -255,6 +255,30 @@ define U-Boot/mt7981_cmcc_rax3000m-nand DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr4 endef +define U-Boot/mt7981_glinet_gl-x3000 + NAME:=GL.iNet GL-X3000 + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=glinet_gl-x3000 + UBOOT_CONFIG:=mt7981_glinet_gl-x3000 + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=emmc + BL2_SOC:=mt7981 + BL2_DDRTYPE:=ddr4 + DEPENDS:=+trusted-firmware-a-mt7981-emmc-ddr4 +endef + +define U-Boot/mt7981_glinet_gl-xe3000 + NAME:=GL.iNet GL-XE3000 + BUILD_SUBTARGET:=filogic + BUILD_DEVICES:=glinet_gl-xe3000 + UBOOT_CONFIG:=mt7981_glinet_gl-x3000 + UBOOT_IMAGE:=u-boot.fip + BL2_BOOTDEV:=emmc + BL2_SOC:=mt7981 + BL2_DDRTYPE:=ddr4 + DEPENDS:=+trusted-firmware-a-mt7981-emmc-ddr4 +endef + define U-Boot/mt7981_h3c_magic-nx30-pro NAME:=H3C Magic NX30 Pro BUILD_SUBTARGET:=filogic @@ -761,6 +785,8 @@ UBOOT_TARGETS := \ mt7981_abt_asr3000 \ mt7981_cmcc_rax3000m-emmc \ mt7981_cmcc_rax3000m-nand \ + mt7981_glinet_gl-x3000 \ + mt7981_glinet_gl-xe3000 \ mt7981_h3c_magic-nx30-pro \ mt7981_jcg_q30-pro \ mt7981_nokia_ea0326gmp \ diff --git a/package/boot/uboot-mediatek/patches/454-add-glinet-x3000.patch b/package/boot/uboot-mediatek/patches/454-add-glinet-x3000.patch new file mode 100644 index 00000000000000..0cad80ed5acafb --- /dev/null +++ b/package/boot/uboot-mediatek/patches/454-add-glinet-x3000.patch @@ -0,0 +1,288 @@ +diff --git a/arch/arm/dts/mt7981-glinet-gl-x3000.dts b/arch/arm/dts/mt7981-glinet-gl-x3000.dts +new file mode 100644 +index 0000000..911a702 +--- /dev/null ++++ b/arch/arm/dts/mt7981-glinet-gl-x3000.dts +@@ -0,0 +1,144 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++/dts-v1/; ++#include "mt7981.dtsi" ++#include ++#include ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ model = "GL.iNet GL-X3000"; ++ compatible = "glinet,gl-x3000", "mediatek,mt7981"; ++ ++ chosen { ++ stdout-path = &uart0; ++ tick-timer = &timer0; ++ }; ++ ++ memory@40000000 { ++ device_type = "memory"; ++ reg = <0x40000000 0x20000000>; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "fixed-3.3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ ++ reset { ++ label = "reset"; ++ linux,code = ; ++ gpios = <&gpio 1 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ wifi2g { ++ label = "green:wifi2g"; ++ gpios = <&gpio 30 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wifi5g { ++ label = "green:wifi5g"; ++ gpios = <&gpio 38 GPIO_ACTIVE_LOW>; ++ }; ++ ++ 5g_led1 { ++ label = "green:5g:led1"; ++ gpios = <&gpio 6 GPIO_ACTIVE_LOW>; ++ }; ++ ++ 5g_led2 { ++ label = "green:5g:led2"; ++ gpios = <&gpio 7 GPIO_ACTIVE_LOW>; ++ }; ++ ++ 5g_led3 { ++ label = "green:5g:led3"; ++ gpios = <&gpio 8 GPIO_ACTIVE_LOW>; ++ }; ++ ++ 5g_led4 { ++ label = "green:5g:led4"; ++ gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ power { ++ label = "green:power"; ++ gpios = <&gpio 39 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wan { ++ label = "green:wan"; ++ gpios = <&gpio 31 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++ð { ++ status = "okay"; ++ mediatek,gmac-id = <1>; ++ phy-mode = "gmii"; ++ phy-handle = <&phy0>; ++ ++ mdio { ++ phy0: ethernet-phy@0 { ++ compatible = "ethernet-phy-id03a2.9461"; ++ reg = <0x0>; ++ phy-mode = "gmii"; ++ }; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_default>; ++ max-frequency = <52000000>; ++ bus-width = <8>; ++ cap-mmc-hw-highspeed; ++ cap-mmc-hw-reset; ++ vmmc-supply = <®_3p3v>; ++ non-removable; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ mmc0_pins_default: mmc0-pins-default { ++ mux { ++ function = "flash"; ++ groups = "emmc_45"; ++ }; ++ conf-cmd-dat { ++ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO", ++ "SPI0_CS", "SPI0_HOLD", "SPI0_WP", ++ "SPI1_CLK", "SPI1_MOSI", "SPI1_MISO"; ++ input-enable; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ conf-clk { ++ pins = "SPI1_CS"; ++ drive-strength = ; ++ bias-pull-down = ; ++ }; ++ conf-rst { ++ pins = "GPIO_WPS"; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; +diff --git a/configs/mt7981_glinet_gl-x3000_defconfig b/configs/mt7981_glinet_gl-x3000_defconfig +new file mode 100644 +index 0000000..96ad96f +--- /dev/null ++++ b/configs/mt7981_glinet_gl-x3000_defconfig +@@ -0,0 +1,100 @@ ++CONFIG_ARM=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_POSITION_INDEPENDENT=y ++CONFIG_ARCH_MEDIATEK=y ++CONFIG_TEXT_BASE=0x41e00000 ++CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x80000 ++CONFIG_ENV_OFFSET=0x400000 ++CONFIG_DEFAULT_DEVICE_TREE="mt7981-glinet-gl-x3000" ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_TARGET_MT7981=y ++CONFIG_DEBUG_UART_BASE=0x11002000 ++CONFIG_DEBUG_UART_CLOCK=40000000 ++CONFIG_SYS_LOAD_ADDR=0x46000000 ++CONFIG_DEBUG_UART=y ++CONFIG_ENV_VARS_UBOOT_CONFIG=y ++# CONFIG_EXPERT is not set ++CONFIG_FIT=y ++# CONFIG_BOOTSTD is not set ++# CONFIG_LEGACY_IMAGE_FORMAT is not set ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_USE_BOOTCOMMAND=y ++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-glinet-gl-x3000.dtb" ++CONFIG_LOGLEVEL=7 ++CONFIG_BOARD_LATE_INIT=y ++CONFIG_HUSH_PARSER=y ++CONFIG_SYS_PROMPT="MT7981> " ++CONFIG_SYS_CBSIZE=512 ++CONFIG_SYS_PBSIZE=1049 ++CONFIG_CMD_CPU=y ++CONFIG_CMD_LICENSE=y ++# CONFIG_BOOTM_NETBSD is not set ++# CONFIG_BOOTM_PLAN9 is not set ++# CONFIG_BOOTM_RTEMS is not set ++# CONFIG_BOOTM_VXWORKS is not set ++CONFIG_CMD_BOOTMENU=y ++# CONFIG_CMD_ELF is not set ++CONFIG_CMD_ASKENV=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_ENV_FLAGS=y ++CONFIG_CMD_STRINGS=y ++# CONFIG_CMD_UNLZ4 is not set ++# CONFIG_CMD_UNZIP is not set ++CONFIG_CMD_DM=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_GPT_RENAME=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_READ=y ++CONFIG_CMD_WRITE=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_TFTPSRV=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_LINK_LOCAL=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_PSTORE=y ++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000 ++CONFIG_CMD_UUID=y ++CONFIG_CMD_HASH=y ++CONFIG_CMD_SMC=y ++CONFIG_PARTITION_TYPE_GUID=y ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_USE_DEFAULT_ENV_FILE=y ++CONFIG_DEFAULT_ENV_FILE="glinet_gl-x3000_env" ++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_CLK=y ++CONFIG_GPIO_HOG=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_MMC_MTK=y ++CONFIG_PHY_FIXED=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PINCTRL=y ++CONFIG_PINCONF=y ++CONFIG_PINCTRL_MT7981=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_SERIAL=y ++CONFIG_MTK_SERIAL=y ++CONFIG_HEXDUMP=y ++# CONFIG_EFI_LOADER is not set ++CONFIG_LMB_MAX_REGIONS=64 ++# CONFIG_TOOLS_LIBCRYPTO is not set +diff --git a/glinet_gl-x3000_env b/glinet_gl-x3000_env +new file mode 100644 +index 0000000..e624e41 +--- /dev/null ++++ b/glinet_gl-x3000_env +@@ -0,0 +1,26 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x46000000 ++bootdelay=3 ++bootfile_bl2=openwrt-mediatek-filogic-glinet_gl-x3000-preloader.bin ++bootfile_fip=openwrt-mediatek-filogic-glinet_gl-x3000-bl31-uboot.fip ++bootfile_firmware=openwrt-mediatek-filogic-glinet_gl-x3000-squashfs-factory.bin ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_title= *** U-Boot Boot Menu for GL-iNet GL-X3000 *** ++bootmenu_0=Startup system (Default).=run boot_system ++bootmenu_1=Load Firmware via TFTP then write to eMMC.=run boot_tftp_firmware ; run bootmenu_confirm_return ++bootmenu_2=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return ++bootmenu_3=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return ++bootmenu_4=Reboot.=reset ++bootmenu_5=Reset all settings to factory defaults.=run reset_factory ; reset ++filesize_to_blk=setexpr cnt $filesize + 0x1ff && setexpr cnt $cnt / 0x200 ++mmc_read_kernel=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr $part_addr $image_size ++boot_system=run init_modem && part start mmc 0 kernel part_addr && part size mmc 0 kernel part_size && run mmc_read_kernel && bootm ++boot_tftp_firmware=tftpboot $loadaddr $bootfile_firmware && run emmc_write_firmware ++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip ++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2 ++emmc_write_firmware=part start mmc 0 kernel part_addr && run filesize_to_blk && mmc write $loadaddr $part_addr $cnt ++emmc_write_bl2=run filesize_to_blk && test 0x$cnt -le 0x800 && mmc partconf 0 1 1 1 && mmc write $loadaddr 0x0 0x800 ; mmc partconf 0 1 1 0 ++emmc_write_fip=part start mmc 0 fip part_addr && part size mmc 0 fip part_size && run filesize_to_blk && test 0x$cnt -le 0x$part_size && mmc write $loadaddr $part_addr $cnt ++init_modem=gpio set 10; gpio set 5; gpio set 9; gpio set 11; sleep 0.1; gpio clear 10; sleep 1 ++reset_factory=eraseenv && reset diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 7718c8985b43ff..a4d81a94e13012 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -259,9 +259,23 @@ define U-Boot/rock5b-rk3588 radxa_rock-5b endef +define U-Boot/sige7-rk3588 + $(U-Boot/rk3588/Default) + NAME:=Sige7 + BUILD_DEVICES:= \ + armsom_sige7 +endef + # RK3588S boards +define U-Boot/nanopi-r6c-rk3588s + $(U-Boot/rk3588/Default) + NAME:=NanoPi R6C + BUILD_DEVICES:= \ + friendlyarm_nanopi-r6c +endef + define U-Boot/nanopi-r6s-rk3588s $(U-Boot/rk3588/Default) NAME:=NanoPi R6S @@ -302,6 +316,8 @@ UBOOT_TARGETS := \ rock-3b-rk3568 \ nanopc-t6-rk3588 \ rock5b-rk3588 \ + sige7-rk3588 \ + nanopi-r6c-rk3588s \ nanopi-r6s-rk3588s \ rock5a-rk3588s diff --git a/package/boot/uboot-rockchip/patches/000-backport-upstream-dts-sync.patch b/package/boot/uboot-rockchip/patches/000-v2024.10-rc1-backport-upstream-dts-sync.patch similarity index 80% rename from package/boot/uboot-rockchip/patches/000-backport-upstream-dts-sync.patch rename to package/boot/uboot-rockchip/patches/000-v2024.10-rc1-backport-upstream-dts-sync.patch index bd639a683d88b0..afe651afc80f53 100644 --- a/package/boot/uboot-rockchip/patches/000-backport-upstream-dts-sync.patch +++ b/package/boot/uboot-rockchip/patches/000-v2024.10-rc1-backport-upstream-dts-sync.patch @@ -1,3 +1,726 @@ +From 6bb92fcf7d2fea2314d616e5e2391a8bf2b0fdfa Mon Sep 17 00:00:00 2001 +From: Tom Rini +Date: Mon, 20 May 2024 09:54:58 -0600 +Subject: [PATCH] Squashed 'dts/upstream/' changes from + b35b9bd1d4ee..7e08733c96c8 +--- + .../src/arm64/rockchip/rk3588s-nanopi-r6c.dts | 14 + + .../src/arm64/rockchip/rk3588s-nanopi-r6s.dts | 764 ++++++++++++++++++ + 2 files changed, 778 insertions(+) + create mode 100644 dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6c.dts + create mode 100644 dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6s.dts + +--- /dev/null ++++ b/dts/upstream/src/arm64/rockchip/rk3588-armsom-sige7.dts +@@ -0,0 +1,691 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3588.dtsi" ++ ++/ { ++ model = "ArmSoM Sige7"; ++ compatible = "armsom,sige7", "rockchip,rk3588"; ++ ++ aliases { ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ analog-sound { ++ compatible = "audio-graph-card"; ++ dais = <&i2s0_8ch_p0>; ++ label = "rk3588-es8316"; ++ hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_detect>; ++ routing = "MIC2", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR"; ++ widgets = "Microphone", "Mic Jack", ++ "Headphone", "Headphones"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_rgb_g>; ++ ++ led_green: led-0 { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led_red: led-1 { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ compatible = "pwm-fan"; ++ cooling-levels = <0 95 145 195 255>; ++ fan-supply = <&vcc5v0_sys>; ++ pwms = <&pwm1 0 50000 0>; ++ #cooling-cells = <2>; ++ }; ++ ++ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie2x1l2"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <5000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc3v3_pcie30: vcc3v3-pcie30-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; ++ regulator-name = "vcc3v3_pcie30"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <5000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++}; ++ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy1_ps { ++ status = "okay"; ++}; ++ ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_b3 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0m2_xfer>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: regulator@43 { ++ compatible = "rockchip,rk8603", "rockchip,rk8602"; ++ reg = <0x43>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c6 { ++ status = "okay"; ++ ++ hym8563: rtc@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ #clock-cells = <0>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ wakeup-source; ++ }; ++}; ++ ++&i2c7 { ++ status = "okay"; ++ ++ es8316: audio-codec@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clock-rates = <12288000>; ++ clocks = <&cru I2S0_8CH_MCLKOUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ ++ port { ++ es8316_p0_0: endpoint { ++ remote-endpoint = <&i2s0_8ch_p0_0>; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_mclk ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++ status = "okay"; ++ ++ i2s0_8ch_p0: port { ++ i2s0_8ch_p0_0: endpoint { ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ remote-endpoint = <&es8316_p0_0>; ++ }; ++ }; ++}; ++ ++/* phy1 - right ethernet port */ ++&pcie2x1l0 { ++ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++/* phy2 - WiFi */ ++&pcie2x1l1 { ++ reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++/* phy0 - left ethernet port */ ++&pcie2x1l2 { ++ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++}; ++ ++&pcie3x4 { ++ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie30>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ leds { ++ led_rgb_g: led-rgb-g { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ led_rgb_r: led-rgb-r { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ sound { ++ hp_detect: hp-detect { ++ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&avcc_1v8_s0>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ mmc-hs200-1_8v; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <200000000>; ++ no-sdio; ++ no-mmc; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3_s3>; ++ vqmmc-supply = <&vccio_sd_s0>; ++ status = "okay"; ++}; ++ ++&spi2 { ++ assigned-clocks = <&cru CLK_SPI2>; ++ assigned-clock-rates = <200000000>; ++ num-cs = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; ++ status = "okay"; ++ ++ pmic@0 { ++ compatible = "rockchip,rk806"; ++ spi-max-frequency = <1000000>; ++ reg = <0x0>; ++ ++ interrupt-parent = <&gpio0>; ++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, ++ <&rk806_dvs2_null>, <&rk806_dvs3_null>; ++ ++ system-power-controller; ++ ++ vcc1-supply = <&vcc5v0_sys>; ++ vcc2-supply = <&vcc5v0_sys>; ++ vcc3-supply = <&vcc5v0_sys>; ++ vcc4-supply = <&vcc5v0_sys>; ++ vcc5-supply = <&vcc5v0_sys>; ++ vcc6-supply = <&vcc5v0_sys>; ++ vcc7-supply = <&vcc5v0_sys>; ++ vcc8-supply = <&vcc5v0_sys>; ++ vcc9-supply = <&vcc5v0_sys>; ++ vcc10-supply = <&vcc5v0_sys>; ++ vcc11-supply = <&vcc_2v0_pldo_s3>; ++ vcc12-supply = <&vcc5v0_sys>; ++ vcc13-supply = <&vcc_1v1_nldo_s3>; ++ vcc14-supply = <&vcc_1v1_nldo_s3>; ++ vcca-supply = <&vcc5v0_sys>; ++ ++ rk806_dvs1_null: dvs1-null-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs2_null: dvs2-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs3_null: dvs3-null-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun0"; ++ }; ++ ++ regulators { ++ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_gpu_s0"; ++ regulator-enable-ramp-delay = <400>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_cpu_lit_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_log_s0: dcdc-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_log_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_vdenc_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_ddr_s0: dcdc-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <900000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vdd2_ddr_s3: dcdc-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vdd2_ddr_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_2v0_pldo_s3: dcdc-reg7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2000000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_2v0_pldo_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <2000000>; ++ }; ++ }; ++ ++ vcc_3v3_s3: dcdc-reg8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vddq_ddr_s0: dcdc-reg9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vddq_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s3: dcdc-reg10 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avcc_1v8_s0: pldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "avcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s0: pldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avdd_1v2_s0: pldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "avdd_1v2_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3_s0: pldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vcc_3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd_s0: pldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vccio_sd_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ pldo6_s3: pldo-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "pldo6_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_0v75_s3: nldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_ddr_pll_s0: nldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_ddr_pll_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ avdd_0v75_s0: nldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "avdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v85_s0: nldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_0v85_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v75_s0: nldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-0 = <&uart2m0_xfer>; ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; +--- /dev/null ++++ b/dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6c.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include "rk3588s-nanopi-r6s.dts" ++ ++/ { ++ model = "FriendlyElec NanoPi R6C"; ++ compatible = "friendlyarm,nanopi-r6c", "rockchip,rk3588s"; ++}; ++ ++&lan2_led { ++ label = "user_led"; ++}; --- /dev/null +++ b/dts/upstream/src/arm64/rockchip/rk3588s-nanopi-r6s.dts @@ -0,0 +1,764 @@ diff --git a/package/boot/uboot-rockchip/patches/001-rockchip-add-support-for-Radxa-ROCK-Pi-E-v3.0.patch b/package/boot/uboot-rockchip/patches/001-v2024.10-rc3-rockchip-add-support-for-Radxa-ROCK-Pi-E-v3.0.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/001-rockchip-add-support-for-Radxa-ROCK-Pi-E-v3.0.patch rename to package/boot/uboot-rockchip/patches/001-v2024.10-rc3-rockchip-add-support-for-Radxa-ROCK-Pi-E-v3.0.patch diff --git a/package/boot/uboot-rockchip/patches/002-board-rockchip-add-Radxa-ROCK-3-Model-C.patch b/package/boot/uboot-rockchip/patches/002-v2024.10-rc3-board-rockchip-add-Radxa-ROCK-3-Model-C.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/002-board-rockchip-add-Radxa-ROCK-3-Model-C.patch rename to package/boot/uboot-rockchip/patches/002-v2024.10-rc3-board-rockchip-add-Radxa-ROCK-3-Model-C.patch diff --git a/package/boot/uboot-rockchip/patches/003-dm-adc-Add-SPL_ADC-Kconfig-symbol-for-use-of-ADC-in-.patch b/package/boot/uboot-rockchip/patches/003-v2024.10-rc3-dm-adc-Add-SPL_ADC-Kconfig-symbol-for-use-of-ADC-in-.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/003-dm-adc-Add-SPL_ADC-Kconfig-symbol-for-use-of-ADC-in-.patch rename to package/boot/uboot-rockchip/patches/003-v2024.10-rc3-dm-adc-Add-SPL_ADC-Kconfig-symbol-for-use-of-ADC-in-.patch diff --git a/package/boot/uboot-rockchip/patches/004-board-rockchip-Add-Radxa-ZERO-3W-3E.patch b/package/boot/uboot-rockchip/patches/004-v2024.10-rc3-board-rockchip-Add-Radxa-ZERO-3W-3E.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/004-board-rockchip-Add-Radxa-ZERO-3W-3E.patch rename to package/boot/uboot-rockchip/patches/004-v2024.10-rc3-board-rockchip-Add-Radxa-ZERO-3W-3E.patch diff --git a/package/boot/uboot-rockchip/patches/005-board-rockchip-Add-Radxa-ROCK-3B.patch b/package/boot/uboot-rockchip/patches/005-v2024.10-rc3-board-rockchip-Add-Radxa-ROCK-3B.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/005-board-rockchip-Add-Radxa-ROCK-3B.patch rename to package/boot/uboot-rockchip/patches/005-v2024.10-rc3-board-rockchip-Add-Radxa-ROCK-3B.patch diff --git a/package/boot/uboot-rockchip/patches/010-arm64-dts-rockchip-correct-the-model-name-for-Radxa-.patch b/package/boot/uboot-rockchip/patches/010-v2024.10-rc3-arm64-dts-rockchip-correct-the-model-name-for-Radxa-.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/010-arm64-dts-rockchip-correct-the-model-name-for-Radxa-.patch rename to package/boot/uboot-rockchip/patches/010-v2024.10-rc3-arm64-dts-rockchip-correct-the-model-name-for-Radxa-.patch diff --git a/package/boot/uboot-rockchip/patches/011-arm64-dts-rockchip-Correct-the-model-names-for-Radxa.patch b/package/boot/uboot-rockchip/patches/011-v2024.10-rc3-arm64-dts-rockchip-Correct-the-model-names-for-Radxa.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/011-arm64-dts-rockchip-Correct-the-model-names-for-Radxa.patch rename to package/boot/uboot-rockchip/patches/011-v2024.10-rc3-arm64-dts-rockchip-Correct-the-model-names-for-Radxa.patch diff --git a/package/boot/uboot-rockchip/patches/106-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch b/package/boot/uboot-rockchip/patches/106-v2024.10-rc1-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch similarity index 100% rename from package/boot/uboot-rockchip/patches/106-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch rename to package/boot/uboot-rockchip/patches/106-v2024.10-rc1-board-rockchip-Add-FriendlyElec-NanoPi-R6S.patch diff --git a/package/boot/uboot-rockchip/patches/107-v2024.10-rc1-board-rockchip-Add-FriendlyElec-NanoPi-R6C.patch b/package/boot/uboot-rockchip/patches/107-v2024.10-rc1-board-rockchip-Add-FriendlyElec-NanoPi-R6C.patch new file mode 100644 index 00000000000000..ba00a5c9dee0e6 --- /dev/null +++ b/package/boot/uboot-rockchip/patches/107-v2024.10-rc1-board-rockchip-Add-FriendlyElec-NanoPi-R6C.patch @@ -0,0 +1,213 @@ +From f59d40aa5598063396164b3248f0f8ed6591e3db Mon Sep 17 00:00:00 2001 +From: Sebastian Kropatsch +Date: Thu, 11 Jul 2024 12:15:17 +0200 +Subject: [PATCH] board: rockchip: Add FriendlyElec NanoPi R6C + +The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip RK3588s. +It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB eMMC +storage, one M.2 M-Key connector, one RTL8211F 1GbE and one RTL8125 +2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 Type-A port, a +HDMI port, a 30-pin GPIO header as well as multiple buttons and LEDs. + +Add initial support for this board using the upstream devicetree sources. + +Tested in U-Boot proper: +- Booting from eMMC works +- 1GbE Ethernet works using the eth_eqos driver (tested by ping) +- 2.5GbE Ethernet works using the eth_rtl8169 driver (tested by ping), + but the status LEDs on this specific port currently aren't working +- NVMe SSD in M.2 socket does get recognized (tested with `nvme scan` + followed by `nvme details`) + +Kernel commit: +d5f1d7437451 ("arm64: dts: rockchip: Add support for NanoPi R6C") + +Reviewed-by: Quentin Schulz +Reviewed-by: Kever Yang +Signed-off-by: Sebastian Kropatsch +--- + arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi | 3 + + arch/arm/mach-rockchip/rk3588/Kconfig | 13 +++ + board/friendlyelec/nanopi-r6c-rk3588s/Kconfig | 12 +++ + .../nanopi-r6c-rk3588s/MAINTAINERS | 7 ++ + configs/nanopi-r6c-rk3588s_defconfig | 83 +++++++++++++++++++ + doc/board/rockchip/rockchip.rst | 1 + + include/configs/nanopi-r6c-rk3588s.h | 12 +++ + 7 files changed, 131 insertions(+) + create mode 100644 arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi + create mode 100644 board/friendlyelec/nanopi-r6c-rk3588s/Kconfig + create mode 100644 board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS + create mode 100644 configs/nanopi-r6c-rk3588s_defconfig + create mode 100644 include/configs/nanopi-r6c-rk3588s.h + +--- /dev/null ++++ b/arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi +@@ -0,0 +1,3 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++#include "rk3588s-u-boot.dtsi" +--- a/arch/arm/mach-rockchip/rk3588/Kconfig ++++ b/arch/arm/mach-rockchip/rk3588/Kconfig +@@ -90,6 +90,18 @@ config TARGET_NANOPI_R6S_RK3588S + 12-pin GPIO FPC connector, a fan connector, IR receiver as well + as some buttons and LEDs. + ++config TARGET_NANOPI_R6C_RK3588S ++ bool "FriendlyElec NanoPi R6C" ++ select BOARD_LATE_INIT ++ help ++ The NanoPi R6C is a SBC by FriendlyElec based on the Rockchip ++ RK3588s. ++ It comes with 4GB or 8GB of RAM, a microSD card slot, optional 32GB ++ eMMC storage, one M.2 M-Key connector, one RTL8211F 1GbE and one ++ RTL8125 2.5GbE Ethernet port, one USB 2.0 Type-A and one USB 3.0 ++ Type-A port, a HDMI port, a 30-pin GPIO header as well as some ++ buttons and LEDs. ++ + config TARGET_NOVA_RK3588 + bool "Indiedroid Nova RK3588" + select BOARD_LATE_INIT +@@ -245,6 +257,7 @@ config TEXT_BASE + source "board/edgeble/neural-compute-module-6/Kconfig" + source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" + source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" ++source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" + source "board/indiedroid/nova/Kconfig" + source "board/pine64/quartzpro64-rk3588/Kconfig" + source "board/turing/turing-rk1-rk3588/Kconfig" +--- /dev/null ++++ b/board/friendlyelec/nanopi-r6c-rk3588s/Kconfig +@@ -0,0 +1,12 @@ ++if TARGET_NANOPI_R6C_RK3588S ++ ++config SYS_BOARD ++ default "nanopi-r6c-rk3588s" ++ ++config SYS_VENDOR ++ default "friendlyelec" ++ ++config SYS_CONFIG_NAME ++ default "nanopi-r6c-rk3588s" ++ ++endif +--- /dev/null ++++ b/board/friendlyelec/nanopi-r6c-rk3588s/MAINTAINERS +@@ -0,0 +1,7 @@ ++NANOPI-R6C ++M: Sebastian Kropatsch ++S: Maintained ++F: arch/arm/dts/rk3588s-nanopi-r6c-u-boot.dtsi ++F: board/friendlyelec/nanopi-r6c-rk3588s ++F: configs/nanopi-r6c-rk3588s_defconfig ++F: include/configs/nanopi-r6c-rk3588s.h +--- /dev/null ++++ b/configs/nanopi-r6c-rk3588s_defconfig +@@ -0,0 +1,83 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_COUNTER_FREQUENCY=24000000 ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-nanopi-r6c" ++CONFIG_ROCKCHIP_RK3588=y ++CONFIG_SPL_SERIAL=y ++CONFIG_TARGET_NANOPI_R6C_RK3588S=y ++CONFIG_DEBUG_UART_BASE=0xFEB50000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SYS_LOAD_ADDR=0xc00800 ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_LEGACY_IMAGE_FORMAT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6c.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_SPL_MAX_SIZE=0x40000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_ATF=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++# CONFIG_SPL_DOS_PARTITION is not set ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_SYSCON=y ++CONFIG_SPL_CLK=y ++# CONFIG_USB_FUNCTION_FASTBOOT is not set ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_SUPPORT_EMMC_RPMB=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++# CONFIG_SPI_FLASH is not set ++CONFIG_PHY_REALTEK=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_DWC_ETH_QOS_ROCKCHIP=y ++CONFIG_RTL8169=y ++CONFIG_NVME_PCI=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_USBDP=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_SPL_RAM=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYS_NS16550_MEM32=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_FUNCTION_ROCKUSB=y ++CONFIG_ERRNO_STR=y +--- a/doc/board/rockchip/rockchip.rst ++++ b/doc/board/rockchip/rockchip.rst +@@ -126,6 +126,7 @@ List of mainline supported Rockchip boar + - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) + - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) + - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588) ++ - FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s) + - Generic RK3588S/RK3588 (generic-rk3588) + - Indiedroid Nova (nova-rk3588s) + - Pine64 QuartzPro64 (quartzpro64-rk3588) +--- /dev/null ++++ b/include/configs/nanopi-r6c-rk3588s.h +@@ -0,0 +1,12 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++ ++#ifndef __NANOPI_R6C_RK3588S_H ++#define __NANOPI_R6C_RK3588S_H ++ ++#define ROCKCHIP_DEVICE_SETTINGS \ ++ "stdout=serial,vidconsole\0" \ ++ "stderr=serial,vidconsole\0" ++ ++#include ++ ++#endif /* __NANOPI_R6C_RK3588S_H */ diff --git a/package/boot/uboot-rockchip/patches/108-v2024.10-rc1-board-rockchip-add-ArmSoM-Sige7-Rk3588-board.patch b/package/boot/uboot-rockchip/patches/108-v2024.10-rc1-board-rockchip-add-ArmSoM-Sige7-Rk3588-board.patch new file mode 100644 index 00000000000000..7fa4d679e48191 --- /dev/null +++ b/package/boot/uboot-rockchip/patches/108-v2024.10-rc1-board-rockchip-add-ArmSoM-Sige7-Rk3588-board.patch @@ -0,0 +1,257 @@ +From 40b573e4f6ed629eab54633f8836a2be5e5aa75a Mon Sep 17 00:00:00 2001 +From: Jianfeng Liu +Date: Wed, 29 May 2024 01:04:06 +0800 +Subject: [PATCH] board: rockchip: add ArmSoM Sige7 Rk3588 board + +ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by +ArmSoM. + +There are two variants depending on the DRAM size : 8G and 16G. + +Specification: + + Rockchip Rk3588 SoC + 4x ARM Cortex-A76, 4x ARM Cortex-A55 + 8/16GB memory LPDDR4x + Mali G610MC4 GPU + 2x MIPI CSI 2 multiple lanes connector + 64GB/128GB on board eMMC + uSD slot + 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C + 1x HDMI 2.1 output + 2x 2.5 Gbps Ethernet port + 40-pin IO header including UART, SPI and I2C + USB PD over USB Type-C + Size: 92mm x 62mm + +Kernel commit: +81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board) + +Signed-off-by: Jianfeng Liu +Reviewed-by: Kever Yang +--- + MAINTAINERS | 1 + + arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi | 6 ++ + arch/arm/mach-rockchip/rk3588/Kconfig | 26 ++++++ + board/armsom/sige7-rk3588/Kconfig | 12 +++ + board/armsom/sige7-rk3588/MAINTAINERS | 7 ++ + configs/sige7-rk3588_defconfig | 93 ++++++++++++++++++++ + doc/board/rockchip/rockchip.rst | 1 + + include/configs/sige7-rk3588.h | 15 ++++ + 8 files changed, 161 insertions(+) + create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi + create mode 100644 board/armsom/sige7-rk3588/Kconfig + create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS + create mode 100644 configs/sige7-rk3588_defconfig + create mode 100644 include/configs/sige7-rk3588.h + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -533,6 +533,7 @@ F: arch/arm/include/asm/arch-rockchip/ + F: arch/arm/mach-rockchip/ + F: board/amarula/vyasa-rk3288/ + F: board/anbernic/rgxx3_rk3566/ ++F: board/armsom/sige7-rk3588/ + F: board/chipspark/popmetal_rk3288 + F: board/engicam/px30_core/ + F: board/firefly/ +--- /dev/null ++++ b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi +@@ -0,0 +1,6 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2024 ArmSoM Technology Co., Ltd. ++ */ ++ ++#include "rk3588-u-boot.dtsi" +--- a/arch/arm/mach-rockchip/rk3588/Kconfig ++++ b/arch/arm/mach-rockchip/rk3588/Kconfig +@@ -185,6 +185,31 @@ config TARGET_ROCK5B_RK3588 + USB PD over USB Type-C + Size: 100mm x 72mm (Pico-ITX form factor) + ++config TARGET_SIGE7_RK3588 ++ bool "ArmSoM Sige7 RK3588 board" ++ select BOARD_LATE_INIT ++ help ++ ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) ++ by ArmSoM. ++ ++ There are two variants depending on the DRAM size : 8G and 16G. ++ ++ Specification: ++ ++ Rockchip Rk3588 SoC ++ 4x ARM Cortex-A76, 4x ARM Cortex-A55 ++ 8/16GB memory LPDDR4x ++ Mali G610MC4 GPU ++ 2x MIPI CSI 2 multiple lanes connector ++ 64GB/128GB on board eMMC ++ uSD slot ++ 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C ++ 1x HDMI 2.1 output ++ 2x 2.5 Gbps Ethernet port ++ 40-pin IO header including UART, SPI and I2C ++ USB PD over USB Type-C ++ Size: 92mm x 62mm ++ + config TARGET_QUARTZPRO64_RK3588 + bool "Pine64 QuartzPro64 RK3588 board" + select BOARD_LATE_INIT +@@ -254,6 +279,7 @@ config ROCKCHIP_COMMON_STACK_ADDR + config TEXT_BASE + default 0x00a00000 + ++source "board/armsom/sige7-rk3588/Kconfig" + source "board/edgeble/neural-compute-module-6/Kconfig" + source "board/friendlyelec/nanopc-t6-rk3588/Kconfig" + source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" +--- /dev/null ++++ b/board/armsom/sige7-rk3588/Kconfig +@@ -0,0 +1,12 @@ ++if TARGET_SIGE7_RK3588 ++ ++config SYS_BOARD ++ default "sige7-rk3588" ++ ++config SYS_VENDOR ++ default "armsom" ++ ++config SYS_CONFIG_NAME ++ default "sige7-rk3588" ++ ++endif +--- /dev/null ++++ b/board/armsom/sige7-rk3588/MAINTAINERS +@@ -0,0 +1,7 @@ ++SIGE7-RK3588 ++M: Jianfeng Liu ++S: Maintained ++F: board/armsom/sige7-rk3588 ++F: include/configs/sige7-rk3588.h ++F: configs/sige7-rk3588_defconfig ++F: arch/arm/dts/rk3588-armsom-sige7* +--- /dev/null ++++ b/configs/sige7-rk3588_defconfig +@@ -0,0 +1,93 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_SYS_HAS_NONCACHED_MEMORY=y ++CONFIG_COUNTER_FREQUENCY=24000000 ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-armsom-sige7" ++CONFIG_ROCKCHIP_RK3588=y ++CONFIG_SPL_SERIAL=y ++CONFIG_TARGET_SIGE7_RK3588=y ++CONFIG_DEBUG_UART_BASE=0xFEB50000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_SPI=y ++CONFIG_SYS_LOAD_ADDR=0xc00800 ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_LEGACY_IMAGE_FORMAT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-armsom-sige7.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_SPL_MAX_SIZE=0x40000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_ATF=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++# CONFIG_SPL_DOS_PARTITION is not set ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_SYSCON=y ++CONFIG_AHCI_PCI=y ++CONFIG_DWC_AHCI=y ++CONFIG_SPL_CLK=y ++# CONFIG_USB_FUNCTION_FASTBOOT is not set ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_SUPPORT_EMMC_RPMB=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_PHYLIB=y ++CONFIG_RTL8169=y ++CONFIG_NVME_PCI=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_USBDP=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_SPL_RAM=y ++CONFIG_SCSI=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYS_NS16550_MEM32=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_SPL_USB_DWC3_GENERIC=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_USB_ETHER_LAN75XX=y ++CONFIG_USB_ETHER_LAN78XX=y ++CONFIG_USB_ETHER_MCS7830=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_FUNCTION_ROCKUSB=y ++CONFIG_ERRNO_STR=y +--- a/doc/board/rockchip/rockchip.rst ++++ b/doc/board/rockchip/rockchip.rst +@@ -122,6 +122,7 @@ List of mainline supported Rockchip boar + - Radxa ROCK 3B (rock-3b-rk3568) + + * rk3588 ++ - ArmSoM Sige7 (sige7-rk3588) + - Rockchip EVB (evb-rk3588) + - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) + - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588) +--- /dev/null ++++ b/include/configs/sige7-rk3588.h +@@ -0,0 +1,15 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++/* ++ * Copyright (c) 2024 ArmSoM Technology Co., Ltd. ++ */ ++ ++#ifndef __SIGE7_RK3588_H ++#define __SIGE7_RK3588_H ++ ++#define ROCKCHIP_DEVICE_SETTINGS \ ++ "stdout=serial,vidconsole\0" \ ++ "stderr=serial,vidconsole\0" ++ ++#include ++ ++#endif /* __SIGE7_RK3588_H */ diff --git a/package/firmware/layerscape/ls-dpl/Makefile b/package/firmware/layerscape/ls-dpl/Makefile index 058fe5443b3ba7..b4b10b9b0df455 100644 --- a/package/firmware/layerscape/ls-dpl/Makefile +++ b/package/firmware/layerscape/ls-dpl/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-dpl -PKG_VERSION:=10.38.0 +PKG_VERSION:=10.39.0 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/nxp-qoriq/mc-utils -PKG_SOURCE_VERSION:=mc_release_10.38.0 -PKG_MIRROR_HASH:=9ada83ac4cc259cdf2ea2ebfc2328292f7dace701bfac2b5514749bd9f8315f0 +PKG_SOURCE_VERSION:=mc_release_10.39.0 +PKG_MIRROR_HASH:=48e0ad66f536689bf8cfd115420422a1c746cd609816bd9b07ef8ef358a85cf4 PKG_FLAGS:=nonshared diff --git a/package/firmware/layerscape/ls-mc/Makefile b/package/firmware/layerscape/ls-mc/Makefile index 4d01a531cd27fd..31ed1f98dc5902 100644 --- a/package/firmware/layerscape/ls-mc/Makefile +++ b/package/firmware/layerscape/ls-mc/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-mc -PKG_VERSION:=10.38.0 +PKG_VERSION:=10.39.0 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/NXP/qoriq-mc-binary.git -PKG_SOURCE_VERSION:=mc_release_10.38.0 -PKG_MIRROR_HASH:=4bd0eab4b600d6dee67b4c5b32624a92fd84e6c93f506e46a4fe52217e2d1593 +PKG_SOURCE_VERSION:=mc_release_10.39.0 +PKG_MIRROR_HASH:=0676072ec3fcb7ad3ec101ea279f5e7b41b292b44426563aba9062668f9855ab PKG_FLAGS:=nonshared diff --git a/package/firmware/layerscape/ls-rcw/Makefile b/package/firmware/layerscape/ls-rcw/Makefile index 98ffe3c6790e25..ca72d45b5b8c61 100644 --- a/package/firmware/layerscape/ls-rcw/Makefile +++ b/package/firmware/layerscape/ls-rcw/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ls-rcw -PKG_VERSION:=6.6.3.1.0.0 +PKG_VERSION:=6.6.23.2.0.0 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/nxp-qoriq/rcw -PKG_SOURCE_VERSION:=lf-6.6.3-1.0.0 -PKG_MIRROR_HASH:=da45ce99a0ff85375673fa8c05110c3bda36dedca4ac66190809328f79878a0a +PKG_SOURCE_VERSION:=lf-6.6.23-2.0.0 +PKG_MIRROR_HASH:=f5e62ac040564eb97f4d1c58496a1586a470008469cb4daee6d7c70be7fdfa07 PKG_FLAGS:=nonshared diff --git a/package/firmware/linux-firmware/Makefile b/package/firmware/linux-firmware/Makefile index f256a1efe4f9b0..43a983355583e5 100644 --- a/package/firmware/linux-firmware/Makefile +++ b/package/firmware/linux-firmware/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=linux-firmware -PKG_VERSION:=20240513 +PKG_VERSION:=20240909 PKG_RELEASE:=1 PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=9f05edb99668135d37cedc4fdd18aac2802dc9e4566e086e6c6c2e321f3ecc4e +PKG_HASH:=943fbd19883cf8eadf89e0b22422549db056557b1ecd30a56400615971369671 PKG_MAINTAINER:=Felix Fietkau diff --git a/package/firmware/linux-firmware/qca_ath12k.mk b/package/firmware/linux-firmware/qca_ath12k.mk new file mode 100644 index 00000000000000..dc719c61af46af --- /dev/null +++ b/package/firmware/linux-firmware/qca_ath12k.mk @@ -0,0 +1,7 @@ +Package/ath12k-firmware-wcn7850 = $(call Package/firmware-default,WCN7850 ath12k firmware) +define Package/ath12k-firmware-wcn7850/install + $(INSTALL_DIR) $(1)/lib/firmware/ath12k/WCN7850/hw2.0 + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/ath12k/WCN7850/hw2.0/* $(1)/lib/firmware/ath12k/WCN7850/hw2.0/ +endef +$(eval $(call BuildPackage,ath12k-firmware-wcn7850)) diff --git a/package/kernel/gpio-button-hotplug/Makefile b/package/kernel/gpio-button-hotplug/Makefile index 04cbb69ada9001..5b4085887d4828 100644 --- a/package/kernel/gpio-button-hotplug/Makefile +++ b/package/kernel/gpio-button-hotplug/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=gpio-button-hotplug -PKG_RELEASE:=3 +PKG_RELEASE:=4 PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk diff --git a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c index 17748219e8ccc3..de100777f240e4 100644 --- a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c +++ b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c @@ -525,10 +525,9 @@ static int gpio_keys_button_probe(struct platform_device *pdev, button->active_low ? GPIOF_ACTIVE_LOW : 0), desc); if (error) { - if (error != -EPROBE_DEFER) { - dev_err(dev, "unable to claim gpio %d, err=%d\n", - button->gpio, error); - } + dev_err_probe(dev, error, + "unable to claim gpio %d", + button->gpio); goto out; } diff --git a/package/kernel/linux/modules/gpio.mk b/package/kernel/linux/modules/gpio.mk index 511cd3af8ca221..fc6ab66ba80f5b 100644 --- a/package/kernel/linux/modules/gpio.mk +++ b/package/kernel/linux/modules/gpio.mk @@ -109,7 +109,8 @@ define KernelPackage/gpio-pca953x SUBMENU:=$(GPIO_MENU) DEPENDS:=@GPIO_SUPPORT +kmod-i2c-core +kmod-regmap-i2c TITLE:=PCA95xx, TCA64xx, and MAX7310 I/O ports - KCONFIG:=CONFIG_GPIO_PCA953X + KCONFIG:=CONFIG_GPIO_PCA953X \ + CONFIG_GPIO_PCA953X_IRQ=y FILES:=$(LINUX_DIR)/drivers/gpio/gpio-pca953x.ko AUTOLOAD:=$(call AutoLoad,55,gpio-pca953x) endef diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index fa837306e6f1bb..d77dabfa79b6db 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -33,6 +33,33 @@ endef $(eval $(call KernelPackage,skge)) +define KernelPackage/ag71xx + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Atheros AR7XXX/AR9XXX ethernet mac support + DEPENDS:=@PCI_SUPPORT||TARGET_ath79 +kmod-phylink +kmod-mdio-devres +kmod-net-selftests + KCONFIG:=CONFIG_AG71XX + FILES:=$(LINUX_DIR)/drivers/net/ethernet/atheros/ag71xx.ko + AUTOLOAD:=$(call AutoLoad,50,ag71xx,1) +endef + +$(eval $(call KernelPackage,ag71xx)) + + +define KernelPackage/ag71xx-legacy + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Downstream Atheros AR7XXX/AR9XXX ethernet mac support + DEPENDS:=@TARGET_ath79 +kmod-libphy +kmod-mdio-devres + KCONFIG:=CONFIG_AG71XX_LEGACY \ + CONFIG_AG71XX_LEGACY_DEBUG=n \ + CONFIG_AG71XX_LEGACY_DEBUG_FS=y + FILES:=$(LINUX_DIR)/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy.ko \ + $(LINUX_DIR)/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_mdio.ko + AUTOLOAD:=$(call AutoLoad,50,ag71xx-legacy ag71xx-legacy-mdio,1) +endef + +$(eval $(call KernelPackage,ag71xx-legacy)) + + define KernelPackage/alx SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Qualcomm Atheros AR816x/AR817x PCI-E Ethernet Network Driver @@ -96,7 +123,8 @@ $(eval $(call KernelPackage,atl1e)) define KernelPackage/libphy SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=PHY library - KCONFIG:=CONFIG_PHYLIB + KCONFIG:=CONFIG_PHYLIB \ + CONFIG_PHYLIB_LEDS=y FILES:=$(LINUX_DIR)/drivers/net/phy/libphy.ko AUTOLOAD:=$(call AutoLoad,15,libphy,1) endef @@ -224,6 +252,19 @@ endef $(eval $(call KernelPackage,phylib-broadcom)) +define KernelPackage/phylib-qcom + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Qualcomm Ethernet PHY library + KCONFIG:=CONFIG_QCOM_NET_PHYLIB + HIDDEN:=1 + DEPENDS:=+kmod-libphy + FILES:=$(LINUX_DIR)/drivers/net/phy/qcom/qcom-phy-lib.ko + AUTOLOAD:=$(call AutoLoad,17,qcom-phy-lib) +endef + +$(eval $(call KernelPackage,phylib-qcom)) + + define KernelPackage/phy-amd SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=AMD PHY driver @@ -240,6 +281,18 @@ endef $(eval $(call KernelPackage,phy-amd)) +define KernelPackage/phy-at803x + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Qualcomm Atheros 8337 internal PHY + KCONFIG:=CONFIG_AT803X_PHY + DEPENDS:=+kmod-phylib-qcom + FILES:=$(LINUX_DIR)/drivers/net/phy/qcom/at803x.ko + AUTOLOAD:=$(call AutoLoad,18,at803x,1) +endef + +$(eval $(call KernelPackage,phy-at803x)) + + define KernelPackage/phy-ax88796b SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Asix PHY driver @@ -290,6 +343,37 @@ endef $(eval $(call KernelPackage,phy-bcm84881)) +define KernelPackage/phy-intel-xway + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Intel XWAY PHYs + KCONFIG:=CONFIG_INTEL_XWAY_PHY + DEPENDS:=+kmod-libphy + FILES:=$(LINUX_DIR)/drivers/net/phy/intel-xway.ko + AUTOLOAD:=$(call AutoLoad,18,intel-xway,1) +endef + +define KernelPackage/phy-intel-xway/description + Supports the Intel XWAY (former Lantiq) 11G and 22E PHYs. + These PHYs are marked as standalone chips under the names + PEF 7061, PEF 7071 and PEF 7072 or integrated into the Intel + SoCs xRX200, xRX300, xRX330, xRX350 and xRX550. +endef + +$(eval $(call KernelPackage,phy-intel-xway)) + + +define KernelPackage/phy-qca83xx + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Qualcomm Atheros QCA833x PHY driver + KCONFIG:=CONFIG_QCA83XX_PHY + DEPENDS:=+kmod-phylib-qcom + FILES:=$(LINUX_DIR)/drivers/net/phy/qcom/qca83xx.ko + AUTOLOAD:=$(call AutoLoad,18,qca83xx,1) +endef + +$(eval $(call KernelPackage,phy-qca83xx)) + + define KernelPackage/phy-marvell SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Marvell Gigabit Ethernet PHY driver @@ -343,6 +427,23 @@ endef $(eval $(call KernelPackage,phy-marvell-10g)) + +define KernelPackage/phy-micrel + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Micrel PHYs + KCONFIG:=CONFIG_MICREL_PHY + DEPENDS:=+kmod-libphy +kmod-ptp + FILES:=$(LINUX_DIR)/drivers/net/phy/micrel.ko + AUTOLOAD:=$(call AutoLoad,18,micrel,1) +endef + +define KernelPackage/phy-micrel/description + Supports the KSZ9021, VSC8201, KS8001 PHYs. +endef + +$(eval $(call KernelPackage,phy-micrel)) + + define KernelPackage/phy-realtek SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Realtek Ethernet PHY driver @@ -375,6 +476,22 @@ endef $(eval $(call KernelPackage,phy-smsc)) +define KernelPackage/phy-vitesse + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Vitesse PHYs + KCONFIG:=CONFIG_VITESSE_PHY + DEPENDS:=+kmod-libphy + FILES:=$(LINUX_DIR)/drivers/net/phy/vitesse.ko + AUTOLOAD:=$(call AutoLoad,18,vitesse,1) +endef + +define KernelPackage/phy-vitesse/description + Currently supports the vsc8244 +endef + +$(eval $(call KernelPackage,phy-vitesse)) + + define KernelPackage/phy-airoha-en8811h SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Airoha EN8811H 2.5G Ethernet PHY @@ -407,13 +524,27 @@ endef $(eval $(call KernelPackage,phy-aquantia)) +define KernelPackage/dsa + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Distributed Switch Architecture support + DEPENDS:=+kmod-mdio-devres +kmod-net-selftests +kmod-phylink + KCONFIG:=CONFIG_NET_DSA + FILES:=$(LINUX_DIR)/net/dsa/dsa_core.ko +endef + +define KernelPackage/dsa/description + Kernel module support for Distributed Switch Architecture +endef + +$(eval $(call KernelPackage,dsa)) + define KernelPackage/dsa-tag-dsa SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Marvell DSA type DSA and EDSA taggers + DEPENDS:=+kmod-dsa KCONFIG:= CONFIG_NET_DSA_TAG_DSA_COMMON \ CONFIG_NET_DSA_TAG_DSA \ - CONFIG_NET_DSA_TAG_EDSA \ - CONFIG_NET_DSA=y + CONFIG_NET_DSA_TAG_EDSA FILES:=$(LINUX_DIR)/net/dsa/tag_dsa.ko AUTOLOAD:=$(call AutoLoad,40,tag_dsa,1) endef @@ -427,10 +558,9 @@ $(eval $(call KernelPackage,dsa-tag-dsa)) define KernelPackage/dsa-mv88e6xxx SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Marvell MV88E6XXX DSA Switch - DEPENDS:=+kmod-ptp +kmod-phy-marvell +kmod-dsa-tag-dsa + DEPENDS:=+kmod-dsa +kmod-ptp +kmod-phy-marvell +kmod-dsa-tag-dsa KCONFIG:=CONFIG_NET_DSA_MV88E6XXX \ - CONFIG_NET_DSA_MV88E6XXX_PTP=y \ - CONFIG_NET_DSA=y + CONFIG_NET_DSA_MV88E6XXX_PTP=y FILES:=$(LINUX_DIR)/drivers/net/dsa/mv88e6xxx/mv88e6xxx.ko AUTOLOAD:=$(call AutoLoad,41,mv88e6xxx,1) endef @@ -441,12 +571,32 @@ endef $(eval $(call KernelPackage,dsa-mv88e6xxx)) +define KernelPackage/dsa-qca8k + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Qualcomm Atheros QCA8xxx switch family DSA support + DEPENDS:=+kmod-dsa +kmod-regmap-core + KCONFIG:= \ + CONFIG_NET_DSA_QCA8K \ + CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT=y \ + CONFIG_NET_DSA_TAG_QCA + FILES:= \ + $(LINUX_DIR)/drivers/net/dsa/qca/qca8k.ko \ + $(LINUX_DIR)/net/dsa/tag_qca.ko + AUTOLOAD:=$(call AutoLoad,42,qca8k,1) +endef + +define KernelPackage/dsa-qca8k/description + DSA based kernel modules for the Qualcomm Atheros QCA8xxx switch family +endef + +$(eval $(call KernelPackage,dsa-qca8k)) define KernelPackage/swconfig SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=switch configuration API DEPENDS:=+kmod-libphy - KCONFIG:=CONFIG_SWCONFIG + KCONFIG:=CONFIG_SWCONFIG \ + CONFIG_SWCONFIG_LEDS=y FILES:=$(LINUX_DIR)/drivers/net/phy/swconfig.ko AUTOLOAD:=$(call AutoLoad,41,swconfig) endef @@ -604,7 +754,8 @@ define KernelPackage/switch-ar8xxx SUBMENU:=$(NETWORK_DEVICES_MENU) TITLE:=Atheros AR8216/8327 switch support DEPENDS:=+kmod-swconfig +kmod-mdio-devres - KCONFIG:=CONFIG_AR8216_PHY + KCONFIG:=CONFIG_AR8216_PHY \ + CONFIG_AR8216_PHY_LEDS=y FILES:=$(LINUX_DIR)/drivers/net/phy/ar8xxx.ko AUTOLOAD:=$(call AutoLoad,43,ar8xxx,1) endef diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk index 7172bdf502375f..458c8c4ba68f86 100644 --- a/package/kernel/linux/modules/usb.mk +++ b/package/kernel/linux/modules/usb.mk @@ -272,13 +272,13 @@ $(eval $(call KernelPackage,usb-uhci,1)) define KernelPackage/usb-ohci TITLE:=Support for OHCI controllers DEPENDS:= \ + +TARGET_ath79:kmod-phy-ath79-usb \ +TARGET_bcm53xx:kmod-usb-bcma \ +TARGET_bcm47xx:kmod-usb-bcma \ +TARGET_bcm47xx:kmod-usb-ssb KCONFIG:= \ CONFIG_USB_OHCI \ CONFIG_USB_OHCI_HCD \ - CONFIG_USB_OHCI_ATH79=y \ CONFIG_USB_OHCI_HCD_AT91=y \ CONFIG_USB_OHCI_BCM63XX=y \ CONFIG_USB_OCTEON_OHCI=y \ diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile index aa022c9cd3671e..099bdae46fe154 100644 --- a/package/kernel/mac80211/Makefile +++ b/package/kernel/mac80211/Makefile @@ -348,6 +348,7 @@ define Build/Patch $(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/) $(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/) $(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/) + $(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath12k,ath12k/) $(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/) $(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mt7601u,mt7601u/) $(call PatchDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/) @@ -364,6 +365,7 @@ define Quilt/Refresh/Package $(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath9k,ath9k/) $(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath10k,ath10k/) $(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath11k,ath11k/) + $(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/ath12k,ath12k/) $(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/rt2x00,rt2x00/) $(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mt7601u,mt7601u/) $(call Quilt/RefreshDir,$(PKG_BUILD_DIR),$(PATCH_DIR)/mwl,mwl/) diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk index b0c3691a572ae6..f56fd7a961ccef 100644 --- a/package/kernel/mac80211/ath.mk +++ b/package/kernel/mac80211/ath.mk @@ -1,6 +1,6 @@ PKG_DRIVERS += \ ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k ath10k-smallbuffers \ - ath11k ath11k-ahb ath11k-pci carl9170 owl-loader ar5523 wil6210 + ath11k ath11k-ahb ath11k-pci ath12k carl9170 owl-loader ar5523 wil6210 qcom-qmi-helpers PKG_CONFIG_DEPENDS += \ CONFIG_PACKAGE_ATH_DEBUG \ @@ -21,6 +21,7 @@ ifdef CONFIG_PACKAGE_MAC80211_DEBUGFS ATH9K_HTC_DEBUGFS \ ATH10K_DEBUGFS \ ATH11K_DEBUGFS \ + ATH12K_DEBUGFS \ CARL9170_DEBUGFS \ ATH5K_DEBUG \ ATH6KL_DEBUG \ @@ -31,14 +32,16 @@ ifdef CONFIG_PACKAGE_MAC80211_TRACING config-y += \ ATH10K_TRACING \ ATH11K_TRACING \ + ATH12K_TRACING \ ATH6KL_TRACING \ ATH_TRACEPOINTS \ ATH5K_TRACER \ WIL6210_TRACING endif +config-$(call config_package,qcom-qmi-helpers) += QCOM_QMI_HELPERS config-$(call config_package,ath,regular smallbuffers) += ATH_CARDS ATH_COMMON -config-$(CONFIG_PACKAGE_ATH_DEBUG) += ATH_DEBUG ATH10K_DEBUG ATH11K_DEBUG ATH9K_STATION_STATISTICS +config-$(CONFIG_PACKAGE_ATH_DEBUG) += ATH_DEBUG ATH10K_DEBUG ATH11K_DEBUG ATH12K_DEBUG ATH9K_STATION_STATISTICS config-$(CONFIG_PACKAGE_ATH_DFS) += ATH9K_DFS_CERTIFIED ATH10K_DFS_CERTIFIED config-$(CONFIG_PACKAGE_ATH_SPECTRAL) += ATH9K_COMMON_SPECTRAL ATH10K_SPECTRAL ATH11K_SPECTRAL config-$(CONFIG_PACKAGE_ATH_DYNACK) += ATH9K_DYNACK @@ -63,6 +66,7 @@ config-$(call config_package,ath10k-smallbuffers,smallbuffers) += ATH10K ATH10K_ config-$(call config_package,ath11k) += ATH11K config-$(call config_package,ath11k-ahb) += ATH11K_AHB config-$(call config_package,ath11k-pci) += ATH11K_PCI +config-$(call config_package,ath12k) += ATH12K config-$(call config_package,ath5k) += ATH5K ATH5K_PCI @@ -125,6 +129,14 @@ define KernelPackage/ath/config endif endef +define KernelPackage/qcom-qmi-helpers + $(call KernelPackage/mac80211/Default) + TITLE:=Qualcomm QMI backports helpers + HIDDEN:=1 + FILES:=$(PKG_BUILD_DIR)/drivers/soc/qcom/qmi_helpers.ko + AUTOLOAD:=$(call AutoProbe,qmi_helpers) +endef + define KernelPackage/ath $(call KernelPackage/mac80211/Default) TITLE:=Atheros common driver part @@ -297,9 +309,9 @@ define KernelPackage/ath11k TITLE:=Qualcomm 802.11ax wireless chipset support (common code) URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath11k DEPENDS+= +kmod-ath +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT \ - +kmod-crypto-michael-mic +ATH11K_THERMAL:kmod-hwmon-core +ATH11K_THERMAL:kmod-thermal - FILES:=$(PKG_BUILD_DIR)/drivers/soc/qcom/qmi_helpers.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k.ko + +kmod-crypto-michael-mic +ATH11K_THERMAL:kmod-hwmon-core \ + +ATH11K_THERMAL:kmod-thermal +kmod-qcom-qmi-helpers + FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k.ko endef define KernelPackage/ath11k/description @@ -344,6 +356,22 @@ This module adds support for Qualcomm Technologies 802.11ax family of chipsets with PCI bus. endef +define KernelPackage/ath12k + $(call KernelPackage/mac80211/Default) + TITLE:=Qualcomm 802.11be wireless chipset support + URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath12k + DEPENDS+= +kmod-ath +@DRIVER_11AC_SUPPORT +@DRIVER_11AX_SUPPORT \ + +kmod-crypto-michael-mic +kmod-qrtr-mhi \ + +kmod-qcom-qmi-helpers + FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath12k/ath12k.ko + AUTOLOAD:=$(call AutoProbe,ath12k) +endef + +define KernelPackage/ath12k/description +This module adds support for Qualcomm Technologies 802.11be family of +chipsets with PCI bus. +endef + define KernelPackage/carl9170 $(call KernelPackage/mac80211/Default) TITLE:=Driver for Atheros AR9170 USB sticks diff --git a/package/kernel/mac80211/patches/ath12k/100-ath12k-prevent-ltssm-startup-crash.patch b/package/kernel/mac80211/patches/ath12k/100-ath12k-prevent-ltssm-startup-crash.patch new file mode 100644 index 00000000000000..cd85a0f6aa2652 --- /dev/null +++ b/package/kernel/mac80211/patches/ath12k/100-ath12k-prevent-ltssm-startup-crash.patch @@ -0,0 +1,17 @@ +Fix ltssm crashes on BPI-Rx boards. +Seems read32/write32 using wrong address which +is not a problem on x86/64 PCI controllers. +But have issues on BPI-Rx boards. + +--- a/drivers/net/wireless/ath/ath12k/pci.c ++++ b/drivers/net/wireless/ath/ath12k/pci.c +@@ -277,6 +277,9 @@ static void ath12k_pci_enable_ltssm(stru + u32 val; + int i; + ++ /* Prevent startup crash on BPI-Rx */ ++ return; ++ + val = ath12k_pci_read32(ab, PCIE_PCIE_PARF_LTSSM); + + /* PCIE link seems very unstable after the Hot Reset*/ diff --git a/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch b/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch index f90e109a88167d..1516c6cb4349af 100644 --- a/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch +++ b/package/kernel/mac80211/patches/rt2x00/602-01-wifi-rt2x00-Add-support-for-loading-EEPROM-from-user.patch @@ -198,11 +198,23 @@ Signed-off-by: Christian Marangi rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC); retval = rt2x00soc_alloc_reg(rt2x00dev); ---- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h -+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h -@@ -26,4 +26,13 @@ int rt2x00soc_resume(struct platform_dev - #define rt2x00soc_resume NULL - #endif /* CONFIG_PM */ +--- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c ++++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c +@@ -278,6 +278,9 @@ static int rt2800pci_read_eeprom(struct + { + int retval; + ++ if (!rt2x00lib_read_eeprom(rt2x00dev)) ++ return 0; ++ + if (rt2800pci_efuse_detect(rt2x00dev)) + retval = rt2800pci_read_eeprom_efuse(rt2x00dev); + else +--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h ++++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h +@@ -270,4 +270,13 @@ void rt2800_get_txwi_rxwi_size(struct rt + unsigned short *rxwi_size); + void rt2800_pre_reset_hw(struct rt2x00_dev *rt2x00dev); +/* + * EEPROM file handlers. @@ -213,4 +225,4 @@ Signed-off-by: Christian Marangi +#define rt2x00lib_read_eeprom NULL +#endif /* CPTCFG_RT2X00_LIB_EEPROM */ + - #endif /* RT2X00SOC_H */ + #endif /* RT2800LIB_H */ diff --git a/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch b/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch index b3828052e9a779..cb7a3617eeca28 100644 --- a/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch +++ b/package/kernel/mac80211/patches/rt2x00/995-rt2x00-mt7620-introduce-accessors-for-CHIP_VER-register.patch @@ -40,7 +40,7 @@ const u8 arg0, const u8 arg1); --- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c -@@ -286,6 +286,10 @@ static int rt2800pci_read_eeprom(struct +@@ -289,6 +289,10 @@ static int rt2800pci_read_eeprom(struct return retval; } @@ -51,7 +51,7 @@ static const struct ieee80211_ops rt2800pci_mac80211_ops = { .add_chanctx = ieee80211_emulate_add_chanctx, .remove_chanctx = ieee80211_emulate_remove_chanctx, -@@ -333,6 +337,9 @@ static const struct rt2800_ops rt2800pci +@@ -336,6 +340,9 @@ static const struct rt2800_ops rt2800pci .drv_init_registers = rt2800mmio_init_registers, .drv_get_txwi = rt2800mmio_get_txwi, .drv_get_dma_done = rt2800mmio_get_dma_done, diff --git a/package/libs/libpcap/Makefile b/package/libs/libpcap/Makefile index d7358e32d036c3..09aab0981ccfc3 100644 --- a/package/libs/libpcap/Makefile +++ b/package/libs/libpcap/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libpcap -PKG_VERSION:=1.10.4 +PKG_VERSION:=1.10.5 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://www.tcpdump.org/release/ -PKG_HASH:=ed19a0383fad72e3ad435fd239d7cd80d64916b87269550159d20e47160ebe5f +PKG_HASH:=37ced90a19a302a7f32e458224a00c365c117905c2cd35ac544b6880a81488f0 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=BSD-3-Clause diff --git a/package/libs/libpcap/patches/100-no-openssl.patch b/package/libs/libpcap/patches/100-no-openssl.patch index 434f1ce006ada9..1f5dac8f7ef607 100644 --- a/package/libs/libpcap/patches/100-no-openssl.patch +++ b/package/libs/libpcap/patches/100-no-openssl.patch @@ -1,10 +1,10 @@ --- a/CMakeLists.txt +++ b/CMakeLists.txt -@@ -1325,7 +1325,6 @@ endif() - # - # OpenSSL/libressl. - # --find_package(OpenSSL) - if(OPENSSL_FOUND) +@@ -1441,7 +1441,6 @@ if(ENABLE_REMOTE) # - # We have OpenSSL. + # OpenSSL/libressl. + # +- find_package(OpenSSL) + if(OPENSSL_FOUND) + # + # We have OpenSSL. diff --git a/package/libs/libpcap/patches/102-skip-manpages.patch b/package/libs/libpcap/patches/102-skip-manpages.patch index 43d393ac5f67b6..7ab651121b9d9c 100644 --- a/package/libs/libpcap/patches/102-skip-manpages.patch +++ b/package/libs/libpcap/patches/102-skip-manpages.patch @@ -9,7 +9,7 @@ Subject: [PATCH] skip manpages --- a/CMakeLists.txt +++ b/CMakeLists.txt -@@ -3325,57 +3325,6 @@ if(NOT MSVC) +@@ -3548,57 +3548,6 @@ if(NOT MSVC) if(MINGW) find_program(LINK_EXECUTABLE ln) endif(MINGW) diff --git a/package/libs/libpcap/patches/300-Add-support-for-B.A.T.M.A.N.-Advanced.patch b/package/libs/libpcap/patches/300-Add-support-for-B.A.T.M.A.N.-Advanced.patch index b3ff25286d75b6..0b998fa49878a7 100644 --- a/package/libs/libpcap/patches/300-Add-support-for-B.A.T.M.A.N.-Advanced.patch +++ b/package/libs/libpcap/patches/300-Add-support-for-B.A.T.M.A.N.-Advanced.patch @@ -36,7 +36,7 @@ Signed-off-by: Linus Lüssing --- a/Makefile.in +++ b/Makefile.in -@@ -133,6 +133,8 @@ PUBHDR = \ +@@ -130,6 +130,8 @@ PUBHDR = \ HDR = $(PUBHDR) \ arcnet.h \ atmuni31.h \ @@ -220,7 +220,7 @@ Signed-off-by: Linus Lüssing #endif --- a/gencode.c +++ b/gencode.c -@@ -60,6 +60,8 @@ +@@ -58,6 +58,8 @@ #include "sunatmpos.h" #include "pflog.h" #include "ppp.h" @@ -229,7 +229,7 @@ Signed-off-by: Linus Lüssing #include "pcap/sll.h" #include "pcap/ipnet.h" #include "arcnet.h" -@@ -9436,6 +9438,168 @@ gen_geneve(compiler_state_t *cstate, bpf +@@ -9704,6 +9706,168 @@ gen_geneve(compiler_state_t *cstate, bpf return b1; } @@ -412,7 +412,7 @@ Signed-off-by: Linus Lüssing struct block *gen_atmtype_abbrev(compiler_state_t *, int); --- a/grammar.y.in +++ b/grammar.y.in -@@ -375,6 +375,7 @@ DIAG_OFF_BISON_BYACC +@@ -383,6 +383,7 @@ DIAG_OFF_BISON_BYACC %type mtp2type %type mtp3field %type mtp3fieldvalue mtp3value mtp3listvalue @@ -420,7 +420,7 @@ Signed-off-by: Linus Lüssing %token DST SRC HOST GATEWAY -@@ -393,7 +394,7 @@ DIAG_OFF_BISON_BYACC +@@ -401,7 +402,7 @@ DIAG_OFF_BISON_BYACC %token LEN %token IPV6 ICMPV6 AH ESP %token VLAN MPLS @@ -429,7 +429,7 @@ Signed-off-by: Linus Lüssing %token ISO ESIS CLNP ISIS L1 L2 IIH LSP SNP CSNP PSNP %token STP %token IPX -@@ -620,11 +621,40 @@ other: pqual TK_BROADCAST { CHECK_PTR_ +@@ -698,11 +699,40 @@ other: pqual TK_BROADCAST { CHECK_PTR_ | PPPOES { CHECK_PTR_VAL(($$ = gen_pppoes(cstate, 0, 0))); } | GENEVE pnum { CHECK_PTR_VAL(($$ = gen_geneve(cstate, $2, 1))); } | GENEVE { CHECK_PTR_VAL(($$ = gen_geneve(cstate, 0, 0))); } @@ -472,7 +472,7 @@ Signed-off-by: Linus Lüssing | PF_RNR NUM { CHECK_PTR_VAL(($$ = gen_pf_rnr(cstate, $2))); } --- a/nametoaddr.c +++ b/nametoaddr.c -@@ -136,8 +136,12 @@ +@@ -134,8 +134,12 @@ #include "diag-control.h" @@ -484,8 +484,8 @@ Signed-off-by: Linus Lüssing + #include "nametoaddr.h" - #ifdef HAVE_OS_PROTO_H -@@ -604,6 +608,7 @@ PCAP_API_DEF struct eproto eproto_db[] = + #include "thread-local.h" +@@ -597,6 +601,7 @@ PCAP_API_DEF struct eproto eproto_db[] = { "moprc", ETHERTYPE_MOPRC }, { "rarp", ETHERTYPE_REVARP }, { "sca", ETHERTYPE_SCA }, @@ -493,7 +493,7 @@ Signed-off-by: Linus Lüssing { (char *)0, 0 } }; -@@ -638,6 +643,60 @@ pcap_nametollc(const char *s) +@@ -631,6 +636,60 @@ pcap_nametollc(const char *s) while (p->s != 0) { if (strcmp(p->s, s) == 0) @@ -582,7 +582,7 @@ Signed-off-by: Linus Lüssing Abbreviations for: .in +.5i .nf -@@ -792,6 +793,36 @@ For example: +@@ -795,6 +796,36 @@ For example: filters IPv4 protocol encapsulated in Geneve with VNI 0xb. This will match both IPv4 directly encapsulated in Geneve as well as IPv4 contained inside an Ethernet frame. @@ -621,18 +621,18 @@ Signed-off-by: Linus Lüssing \fIProtocol\fP can be a number or one of the names --- a/pcap/namedb.h +++ b/pcap/namedb.h -@@ -70,6 +70,8 @@ PCAP_API int pcap_nametoportrange(const - PCAP_API int pcap_nametoproto(const char *); - PCAP_API int pcap_nametoeproto(const char *); +@@ -94,6 +94,8 @@ PCAP_API int pcap_nametoeproto(const cha + + PCAP_AVAILABLE_0_9 PCAP_API int pcap_nametollc(const char *); +PCAP_API int pcap_nametobatadvtype_v14(const char *); +PCAP_API int pcap_nametobatadvtype_v15(const char *); + /* * If a protocol is unknown, PROTO_UNDEF is returned. - * Also, pcap_nametoport() returns the protocol along with the port number. --- a/scanner.l +++ b/scanner.l -@@ -347,6 +347,7 @@ mpls return MPLS; +@@ -365,6 +365,7 @@ mpls return MPLS; pppoed return PPPOED; pppoes return PPPOES; geneve return GENEVE; diff --git a/package/libs/libusb/Makefile b/package/libs/libusb/Makefile index 0c6de7cb618901..6171c314797af2 100644 --- a/package/libs/libusb/Makefile +++ b/package/libs/libusb/Makefile @@ -8,14 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libusb -PKG_VERSION:=1.0.26 -PKG_RELEASE:=3 +PKG_VERSION:=1.0.27 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 -PKG_SOURCE_URL:=\ - https://github.com/libusb/libusb/releases/download/v$(PKG_VERSION) \ - @SF/$(PKG_NAME) -PKG_HASH:=12ce7a61fc9854d1d2a1ffe095f7b5fac19ddba095c259e6067a46500381b5a5 +PKG_SOURCE_URL:=https://github.com/libusb/libusb/releases/download/v$(PKG_VERSION) +PKG_HASH:=ffaa41d741a8a3bee244ac8e54a72ea05bf2879663c098c82fc5757853441575 PKG_MAINTAINER:= Felix Fietkau PKG_LICENSE:=LGPL-2.1-or-later @@ -32,7 +30,7 @@ define Package/libusb-1.0 CATEGORY:=Libraries TITLE:=A library for accessing Linux USB devices DEPENDS:=+libpthread +librt +libatomic - URL:=http://libusb.info/ + URL:=https://libusb.info/ ABI_VERSION:=0 endef @@ -45,7 +43,7 @@ define Package/fxload SECTION:=utils CATEGORY:=Utilities TITLE:=fxload firmware loader - URL:=http://linux-hotplug.sourceforge.net + URL:=https://linux-hotplug.sourceforge.net DEPENDS:=+libusb-1.0 endef diff --git a/package/libs/mbedtls/Makefile b/package/libs/mbedtls/Makefile index 8990db6fdc82e1..19d8c273034ed8 100644 --- a/package/libs/mbedtls/Makefile +++ b/package/libs/mbedtls/Makefile @@ -8,17 +8,16 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mbedtls -PKG_VERSION:=3.6.0 +PKG_VERSION:=3.6.1 PKG_RELEASE:=1 PKG_BUILD_FLAGS:=no-mips16 gc-sections no-lto -PKG_SOURCE_PROTO:=git -PKG_SOURCE_URL=https://github.com/Mbed-TLS/mbedtls.git -PKG_SOURCE_VERSION:=2ca6c285a0dd3f33982dd57299012dacab1ff206 -PKG_MIRROR_HASH:=a684012126590b4e0b6ab41e244cc2af0d2bcfc4b6c94bf42fc37d2d08f0553e +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 +PKG_SOURCE_URL=https://github.com/Mbed-TLS/$(PKG_NAME)/releases/download/$(PKG_NAME)-$(PKG_VERSION) +PKG_HASH:=fc8bef0991b43629b7e5319de6f34f13359011105e08e3e16eed3a9fe6ffd3a3 PKG_LICENSE:=GPL-2.0-or-later -PKG_LICENSE_FILES:=gpl-2.0.txt +PKG_LICENSE_FILES:=LICENSE PKG_CPE_ID:=cpe:/a:arm:mbed_tls MBEDTLS_BUILD_OPTS_CURVES= \ @@ -88,7 +87,7 @@ include $(INCLUDE_DIR)/cmake.mk define Package/mbedtls/Default TITLE:=Embedded SSL - URL:=https://tls.mbed.org + URL:=https://www.trustedfirmware.org/projects/mbed-tls/ endef define Package/mbedtls/Default/description diff --git a/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh b/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh index 232f9021b9c3dd..32b9d9d082b520 100644 --- a/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh +++ b/package/network/config/wifi-scripts/files/lib/netifd/hostapd.sh @@ -376,8 +376,8 @@ hostapd_common_add_bss_config() { config_add_array radius_auth_req_attr config_add_array radius_acct_req_attr - config_add_int eap_server - config_add_string eap_user_file ca_cert server_cert private_key private_key_passwd server_id + config_add_int eap_server radius_server_auth_port + config_add_string eap_user_file ca_cert server_cert private_key private_key_passwd server_id radius_server_clients config_add_boolean fils config_add_string fils_dhcp @@ -571,7 +571,7 @@ hostapd_set_bss_options() { multi_ap multi_ap_backhaul_ssid multi_ap_backhaul_key skip_inactivity_poll \ ppsk airtime_bss_weight airtime_bss_limit airtime_sta_weight \ multicast_to_unicast_all proxy_arp per_sta_vif \ - eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \ + eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id radius_server_clients radius_server_auth_port \ vendor_elements fils ocv apup set_default fils 0 @@ -1151,6 +1151,8 @@ hostapd_set_bss_options() { [ -n "$private_key" ] && append bss_conf "private_key=$private_key" "$N" [ -n "$private_key_passwd" ] && append bss_conf "private_key_passwd=$private_key_passwd" "$N" [ -n "$server_id" ] && append bss_conf "server_id=$server_id" "$N" + [ -n "$radius_server_clients" ] && append bss_conf "radius_server_clients=$radius_server_clients" "$N" + [ -n "$radius_server_auth_port" ] && append bss_conf "radius_server_auth_port=$radius_server_auth_port" "$N" fi set_default multicast_to_unicast_all 0 diff --git a/package/network/ipv6/6in4/Makefile b/package/network/ipv6/6in4/Makefile index edbb7d71a01af8..b70da23e82a905 100644 --- a/package/network/ipv6/6in4/Makefile +++ b/package/network/ipv6/6in4/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=6in4 -PKG_RELEASE:=28 +PKG_RELEASE:=29 PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk @@ -16,7 +16,7 @@ include $(INCLUDE_DIR)/package.mk define Package/6in4 SECTION:=net CATEGORY:=Network - DEPENDS:=@IPV6 +kmod-sit +uclient-fetch + DEPENDS:=@IPV6 +kmod-sit +uclient-fetch +resolveip TITLE:=IPv6-in-IPv4 configuration support MAINTAINER:=Jo-Philipp Wich PKGARCH:=all diff --git a/package/network/ipv6/6in4/files/6in4.sh b/package/network/ipv6/6in4/files/6in4.sh index 5b5c7b36af9cd1..dd055ecb63fd5c 100755 --- a/package/network/ipv6/6in4/files/6in4.sh +++ b/package/network/ipv6/6in4/files/6in4.sh @@ -44,18 +44,35 @@ proto_6in4_setup() { local cfg="$1" local iface="$2" local link="6in4-$cfg" + local remoteip - local mtu ttl tos ipaddr peeraddr ip6addr ip6prefix ip6prefixes tunlink tunnelid username password updatekey - json_get_vars mtu ttl tos ipaddr peeraddr ip6addr tunlink tunnelid username password updatekey + local mtu ttl tos ipaddr peeraddr ip6addr ip6prefix ip6prefixes tunlink tunnelid username password updatekey device nohostroute + json_get_vars mtu ttl tos ipaddr peeraddr ip6addr tunlink tunnelid username password updatekey device nohostroute json_for_each_item proto_6in4_add_prefix ip6prefix ip6prefixes + [ -n "$device" ] && link="$device" + [ -z "$peeraddr" ] && { - proto_notify_error "$cfg" "MISSING_ADDRESS" + proto_notify_error "$cfg" "MISSING_PEER_ADDRESS" proto_block_restart "$cfg" return } - ( proto_add_host_dependency "$cfg" "$peeraddr" "$tunlink" ) + remoteip=$(resolveip -t 10 -4 "$peeraddr") + + if [ -z "$remoteip" ]; then + proto_notify_error "$cfg" "PEER_RESOLVE_FAIL" + return + fi + + for ip in $remoteip; do + peeraddr=$ip + break + done + + if [ "${nohostroute}" != "1" ]; then + ( proto_add_host_dependency "$cfg" "$peeraddr" "$tunlink" ) + fi [ -z "$ipaddr" ] && { local wanif="$tunlink" @@ -156,6 +173,8 @@ proto_6in4_init_config() { proto_config_add_int "mtu" proto_config_add_int "ttl" proto_config_add_string "tos" + proto_config_add_string "device" + proto_config_add_boolean "nohostroute" } [ -n "$INCLUDE_ONLY" ] || { diff --git a/package/network/services/hostapd/src/src/ap/ucode.c b/package/network/services/hostapd/src/src/ap/ucode.c index c8a2b13a288d99..a5630d7eaac354 100644 --- a/package/network/services/hostapd/src/src/ap/ucode.c +++ b/package/network/services/hostapd/src/src/ap/ucode.c @@ -533,10 +533,12 @@ uc_hostapd_iface_start(uc_vm_t *vm, size_t nargs) return NULL; #define UPDATE_VAL(field, name) \ - if ((intval = ucv_int64_get(ucv_object_get(info, name, NULL))) && \ - !errno && intval != conf->field) do { \ - conf->field = intval; \ - changed = true; \ + do { \ + intval = ucv_int64_get(ucv_object_get(info, name, NULL)); \ + if (!errno && intval != conf->field) { \ + conf->field = intval; \ + changed = true; \ + } \ } while(0) conf = iface->conf; diff --git a/package/network/services/ppp/Makefile b/package/network/services/ppp/Makefile index 3ed43e9a5a4182..6d5db5c7040582 100644 --- a/package/network/services/ppp/Makefile +++ b/package/network/services/ppp/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=ppp -PKG_RELEASE:=5 +PKG_RELEASE:=6 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/paulusmack/ppp diff --git a/package/network/services/ppp/files/lib/netifd/ppp6-up b/package/network/services/ppp/files/lib/netifd/ppp6-up index 9355f596784b3f..51339ad3ec5d4f 100755 --- a/package/network/services/ppp/files/lib/netifd/ppp6-up +++ b/package/network/services/ppp/files/lib/netifd/ppp6-up @@ -28,6 +28,7 @@ if [ -n "$AUTOIPV6" ]; then [ -n "$IP6TABLE" ] && json_add_string ip6table $IP6TABLE [ -n "$PEERDNS" ] && json_add_boolean peerdns $PEERDNS [ "$NOSOURCEFILTER" = "1" ] && json_add_boolean sourcefilter "0" + [ "$DELEGATE" = "0" ] && json_add_boolean delegate "0" json_close_object ubus call network add_dynamic "$(json_dump)" fi diff --git a/package/network/services/ppp/files/ppp.sh b/package/network/services/ppp/files/ppp.sh index 074c1f12c8c0c1..d7c0cdb1ae794a 100755 --- a/package/network/services/ppp/files/ppp.sh +++ b/package/network/services/ppp/files/ppp.sh @@ -83,13 +83,14 @@ ppp_generic_init_config() { proto_config_add_int maxfail proto_config_add_int holdoff proto_config_add_boolean sourcefilter + proto_config_add_boolean delegate } ppp_generic_setup() { local config="$1"; shift local localip - json_get_vars ip6table demand keepalive keepalive_adaptive username password pppd_options pppname unnumbered persist maxfail holdoff peerdns sourcefilter + json_get_vars ip6table demand keepalive keepalive_adaptive username password pppd_options pppname unnumbered persist maxfail holdoff peerdns sourcefilter delegate [ ! -e /proc/sys/net/ipv6 ] && ipv6=0 || json_get_var ipv6 ipv6 @@ -135,6 +136,7 @@ ppp_generic_setup() { [ -n "$connect" ] || json_get_var connect connect [ -n "$disconnect" ] || json_get_var disconnect disconnect [ "$sourcefilter" = "0" ] || sourcefilter="" + [ "$delegate" != "0" ] && delegate="" proto_run_command "$config" /usr/sbin/pppd \ nodetach ipparam "$config" \ @@ -146,6 +148,7 @@ ppp_generic_setup() { ${ip6table:+set IP6TABLE=$ip6table} \ ${peerdns:+set PEERDNS=$peerdns} \ ${sourcefilter:+set NOSOURCEFILTER=1} \ + ${delegate:+set DELEGATE=0} \ nodefaultroute \ usepeerdns \ $demand $persist maxfail $maxfail \ diff --git a/package/network/utils/comgt/Makefile b/package/network/utils/comgt/Makefile index 429c9386027094..0e826e12cdc4d2 100644 --- a/package/network/utils/comgt/Makefile +++ b/package/network/utils/comgt/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=comgt PKG_VERSION:=0.32 -PKG_RELEASE:=35 +PKG_RELEASE:=36 PKG_SOURCE:=$(PKG_NAME).$(PKG_VERSION).tgz PKG_SOURCE_URL:=@SF/comgt diff --git a/package/network/utils/comgt/files/directip.sh b/package/network/utils/comgt/files/directip.sh index 3452fa5db702c9..6535de936fc13c 100644 --- a/package/network/utils/comgt/files/directip.sh +++ b/package/network/utils/comgt/files/directip.sh @@ -15,6 +15,8 @@ proto_directip_init_config() { proto_config_add_string "auth" proto_config_add_string "username" proto_config_add_string "password" + proto_config_add_boolean sourcefilter + proto_config_add_boolean delegate proto_config_add_defaults } @@ -22,8 +24,8 @@ proto_directip_setup() { local interface="$1" local chat devpath devname - local device apn pincode ifname auth username password $PROTO_DEFAULT_OPTIONS - json_get_vars device apn pincode auth username password $PROTO_DEFAULT_OPTIONS + local device apn pincode ifname auth username password sourcefilter delegate $PROTO_DEFAULT_OPTIONS + json_get_vars device apn pincode auth username password sourcefilter delegate $PROTO_DEFAULT_OPTIONS [ -n "$ctl_device" ] && device=$ctl_device @@ -89,6 +91,8 @@ proto_directip_setup() { json_add_string ifname "@$interface" json_add_string proto "dhcpv6" json_add_string extendprefix 1 + [ "$delegate" = "0" ] && json_add_boolean delegate "0" + [ "$sourcefilter" = "0" ] && json_add_boolean sourcefilter "0" proto_add_dynamic_defaults ubus call network add_dynamic "$(json_dump)" diff --git a/package/network/utils/comgt/files/ncm.sh b/package/network/utils/comgt/files/ncm.sh index 4c829fa930d584..e9412b28feb38b 100644 --- a/package/network/utils/comgt/files/ncm.sh +++ b/package/network/utils/comgt/files/ncm.sh @@ -20,6 +20,7 @@ proto_ncm_init_config() { proto_config_add_string mode proto_config_add_string pdptype proto_config_add_boolean sourcefilter + proto_config_add_boolean delegate proto_config_add_int profile proto_config_add_defaults } @@ -30,7 +31,7 @@ proto_ncm_setup() { local manufacturer initialize setmode connect finalize devname devpath ifpath local device ifname apn auth username password pincode delay mode pdptype profile $PROTO_DEFAULT_OPTIONS - json_get_vars device ifname apn auth username password pincode delay mode pdptype sourcefilter profile $PROTO_DEFAULT_OPTIONS + json_get_vars device ifname apn auth username password pincode delay mode pdptype sourcefilter delegate profile $PROTO_DEFAULT_OPTIONS local context_type @@ -203,6 +204,7 @@ proto_ncm_setup() { json_add_string ifname "@$interface" json_add_string proto "dhcpv6" json_add_string extendprefix 1 + [ "$delegate" = "0" ] && json_add_boolean delegate "0" [ "$sourcefilter" = "0" ] && json_add_boolean sourcefilter "0" proto_add_dynamic_defaults [ -n "$zone" ] && { diff --git a/package/network/utils/layerscape/restool/Makefile b/package/network/utils/layerscape/restool/Makefile index bca78fbda85d30..ac8c5887a2df21 100644 --- a/package/network/utils/layerscape/restool/Makefile +++ b/package/network/utils/layerscape/restool/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=restool -PKG_VERSION:=21.08 -PKG_RELEASE:=4 +PKG_VERSION:=6.6.23.2.0.0 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/nxp-qoriq/restool -PKG_SOURCE_VERSION:=LSDK-21.08 -PKG_MIRROR_HASH:=3c289e6c9adc2c61445473ecd8b1b1a7b6dfd19a66d3c65f3b83b669e4c3e25b +PKG_SOURCE_VERSION:=lf-6.6.23-2.0.0 +PKG_MIRROR_HASH:=e669c9faf5a00e36d763dbbd6dd866d878b0101df086582c38908d281fa3b465 PKG_FLAGS:=nonshared diff --git a/package/network/utils/layerscape/restool/patches/remove-manpage.patch b/package/network/utils/layerscape/restool/patches/remove-manpage.patch index 5cb9e0a55fca0f..ffd73c31fac2bd 100644 --- a/package/network/utils/layerscape/restool/patches/remove-manpage.patch +++ b/package/network/utils/layerscape/restool/patches/remove-manpage.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -53,14 +53,13 @@ restool: $(OBJ) +@@ -55,14 +55,13 @@ restool: $(OBJ) %.1: %.md pandoc --standalone --to man $^ -o $@ diff --git a/package/network/utils/tcpdump/Makefile b/package/network/utils/tcpdump/Makefile index d2e933a1a1a4e1..bb428881d1be79 100644 --- a/package/network/utils/tcpdump/Makefile +++ b/package/network/utils/tcpdump/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=tcpdump -PKG_VERSION:=4.99.4 +PKG_VERSION:=4.99.5 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://www.tcpdump.org/release/ -PKG_HASH:=0232231bb2f29d6bf2426e70a08a7e0c63a0d59a9b44863b7f5e2357a6e49fea +PKG_HASH:=8c75856e00addeeadf70dad67c9ff3dd368536b2b8563abf6854d7c764cd3adb PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=BSD-3-Clause diff --git a/package/network/utils/tcpdump/patches/001-remove_pcap_debug.patch b/package/network/utils/tcpdump/patches/001-remove_pcap_debug.patch index 1988587029b65a..948e3b5f569b6c 100644 --- a/package/network/utils/tcpdump/patches/001-remove_pcap_debug.patch +++ b/package/network/utils/tcpdump/patches/001-remove_pcap_debug.patch @@ -1,35 +1,31 @@ --- a/configure +++ b/configure -@@ -6568,97 +6568,6 @@ fi - +@@ -7346,97 +7346,6 @@ esac + fi -# -# Check for special debugging functions -# --for ac_func in pcap_set_parser_debug --do : -- ac_fn_c_check_func "$LINENO" "pcap_set_parser_debug" "ac_cv_func_pcap_set_parser_debug" --if test "x$ac_cv_func_pcap_set_parser_debug" = xyes; then : -- cat >>confdefs.h <<_ACEOF --#define HAVE_PCAP_SET_PARSER_DEBUG 1 --_ACEOF +-ac_fn_c_check_func "$LINENO" "pcap_set_parser_debug" "ac_cv_func_pcap_set_parser_debug" +-if test "x$ac_cv_func_pcap_set_parser_debug" = xyes +-then : +- printf "%s\n" "#define HAVE_PCAP_SET_PARSER_DEBUG 1" >>confdefs.h - -fi --done - -if test "$ac_cv_func_pcap_set_parser_debug" = "no" ; then - # - # OK, we don't have pcap_set_parser_debug() to set the libpcap - # filter expression parser debug flag; can we directly set the - # flag? -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether pcap_debug is defined by libpcap" >&5 --$as_echo_n "checking whether pcap_debug is defined by libpcap... " >&6; } +- { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether pcap_debug is defined by libpcap" >&5 +-printf %s "checking whether pcap_debug is defined by libpcap... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ - -int --main () +-main (void) -{ - - extern int pcap_debug; @@ -39,33 +35,35 @@ - ; - return 0; -} +- -_ACEOF --if ac_fn_c_try_link "$LINENO"; then : +-if ac_fn_c_try_link "$LINENO" +-then : - ac_lbl_cv_pcap_debug_defined=yes --else +-else $as_nop - ac_lbl_cv_pcap_debug_defined=no -fi --rm -f core conftest.err conftest.$ac_objext \ +-rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - if test "$ac_lbl_cv_pcap_debug_defined" = yes ; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } +- { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +-printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_PCAP_DEBUG 1" >>confdefs.h +-printf "%s\n" "#define HAVE_PCAP_DEBUG 1" >>confdefs.h - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } +- { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 +-printf "%s\n" "no" >&6; } - # - # OK, what about "yydebug"? - # -- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether yydebug is defined by libpcap" >&5 --$as_echo_n "checking whether yydebug is defined by libpcap... " >&6; } +- { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking whether yydebug is defined by libpcap" >&5 +-printf %s "checking whether yydebug is defined by libpcap... " >&6; } - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ - -int --main () +-main (void) -{ - - extern int yydebug; @@ -75,26 +73,28 @@ - ; - return 0; -} +- -_ACEOF --if ac_fn_c_try_link "$LINENO"; then : +-if ac_fn_c_try_link "$LINENO" +-then : - ac_lbl_cv_yydebug_defined=yes --else +-else $as_nop - ac_lbl_cv_yydebug_defined=no -fi --rm -f core conftest.err conftest.$ac_objext \ +-rm -f core conftest.err conftest.$ac_objext conftest.beam \ - conftest$ac_exeext conftest.$ac_ext - if test "$ac_lbl_cv_yydebug_defined" = yes ; then -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 --$as_echo "yes" >&6; } +- { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5 +-printf "%s\n" "yes" >&6; } - --$as_echo "#define HAVE_YYDEBUG 1" >>confdefs.h +-printf "%s\n" "#define HAVE_YYDEBUG 1" >>confdefs.h - - else -- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 --$as_echo "no" >&6; } +- { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5 +-printf "%s\n" "no" >&6; } - fi - fi -fi - for ac_func in pcap_set_optimizer_debug - do : - ac_fn_c_check_func "$LINENO" "pcap_set_optimizer_debug" "ac_cv_func_pcap_set_optimizer_debug" + ac_fn_c_check_func "$LINENO" "pcap_set_optimizer_debug" "ac_cv_func_pcap_set_optimizer_debug" + if test "x$ac_cv_func_pcap_set_optimizer_debug" = xyes + then : diff --git a/package/network/utils/tcpdump/patches/100-tcpdump_mini.patch b/package/network/utils/tcpdump/patches/100-tcpdump_mini.patch index 8a014cabf0b4ec..eeaa17c8b2fbba 100644 --- a/package/network/utils/tcpdump/patches/100-tcpdump_mini.patch +++ b/package/network/utils/tcpdump/patches/100-tcpdump_mini.patch @@ -98,7 +98,7 @@ --- a/addrtoname.c +++ b/addrtoname.c -@@ -680,8 +680,10 @@ linkaddr_string(netdissect_options *ndo, +@@ -677,8 +677,10 @@ linkaddr_string(netdissect_options *ndo, if (type == LINKADDR_ETHER && len == MAC_ADDR_LEN) return (etheraddr_string(ndo, ep)); @@ -109,7 +109,7 @@ tp = lookup_bytestring(ndo, ep, len); if (tp->bs_name) -@@ -1260,6 +1262,7 @@ init_addrtoname(netdissect_options *ndo, +@@ -1257,6 +1259,7 @@ init_addrtoname(netdissect_options *ndo, init_ipxsaparray(ndo); } @@ -117,7 +117,7 @@ const char * dnaddr_string(netdissect_options *ndo, u_short dnaddr) { -@@ -1276,6 +1279,7 @@ dnaddr_string(netdissect_options *ndo, u +@@ -1273,6 +1276,7 @@ dnaddr_string(netdissect_options *ndo, u return(tp->name); } @@ -127,7 +127,7 @@ struct hnamemem * --- a/print-ether.c +++ b/print-ether.c -@@ -545,6 +545,7 @@ ethertype_print(netdissect_options *ndo, +@@ -543,6 +543,7 @@ ethertype_print(netdissect_options *ndo, arp_print(ndo, p, length, caplen); return (1); @@ -135,7 +135,7 @@ case ETHERTYPE_DN: decnet_print(ndo, p, length, caplen); return (1); -@@ -575,6 +576,7 @@ ethertype_print(netdissect_options *ndo, +@@ -573,6 +574,7 @@ ethertype_print(netdissect_options *ndo, ND_TCHECK_LEN(p, 1); isoclns_print(ndo, p + 1, length - 1); return(1); @@ -143,7 +143,7 @@ case ETHERTYPE_PPPOED: case ETHERTYPE_PPPOES: -@@ -587,9 +589,11 @@ ethertype_print(netdissect_options *ndo, +@@ -585,9 +587,11 @@ ethertype_print(netdissect_options *ndo, eapol_print(ndo, p); return (1); @@ -155,7 +155,7 @@ case ETHERTYPE_PPP: if (length) { -@@ -598,6 +602,7 @@ ethertype_print(netdissect_options *ndo, +@@ -596,6 +600,7 @@ ethertype_print(netdissect_options *ndo, } return (1); @@ -163,7 +163,7 @@ case ETHERTYPE_MPCP: mpcp_print(ndo, p, length); return (1); -@@ -610,19 +615,23 @@ ethertype_print(netdissect_options *ndo, +@@ -608,19 +613,23 @@ ethertype_print(netdissect_options *ndo, case ETHERTYPE_CFM_OLD: cfm_print(ndo, p, length); return (1); @@ -187,7 +187,7 @@ case ETHERTYPE_MPLS: case ETHERTYPE_MPLS_MULTI: mpls_print(ndo, p, length); -@@ -652,6 +661,7 @@ ethertype_print(netdissect_options *ndo, +@@ -650,6 +659,7 @@ ethertype_print(netdissect_options *ndo, case ETHERTYPE_PTP: ptp_print(ndo, p, length); return (1); @@ -197,7 +197,7 @@ case ETHERTYPE_SCA: --- a/print-gre.c +++ b/print-gre.c -@@ -207,6 +207,7 @@ gre_print_0(netdissect_options *ndo, con +@@ -205,6 +205,7 @@ gre_print_0(netdissect_options *ndo, con case ETHERTYPE_IPV6: ip6_print(ndo, bp, len); break; @@ -205,7 +205,7 @@ case ETHERTYPE_MPLS: mpls_print(ndo, bp, len); break; -@@ -219,6 +220,7 @@ gre_print_0(netdissect_options *ndo, con +@@ -217,6 +218,7 @@ gre_print_0(netdissect_options *ndo, con case ETHERTYPE_GRE_ISO: isoclns_print(ndo, bp, len); break; @@ -215,7 +215,7 @@ break; --- a/print-icmp6.c +++ b/print-icmp6.c -@@ -1371,7 +1371,7 @@ get_upperlayer(netdissect_options *ndo, +@@ -1369,7 +1369,7 @@ get_upperlayer(netdissect_options *ndo, nh = GET_U_1(fragh->ip6f_nxt); hlen = sizeof(struct ip6_frag); break; @@ -224,7 +224,7 @@ case IPPROTO_AH: ah = (const struct ah *)bp; if (!ND_TTEST_1(ah->ah_len)) -@@ -1379,7 +1379,7 @@ get_upperlayer(netdissect_options *ndo, +@@ -1377,7 +1377,7 @@ get_upperlayer(netdissect_options *ndo, nh = GET_U_1(ah->ah_nxt); hlen = (GET_U_1(ah->ah_len) + 2) << 2; break; @@ -235,7 +235,7 @@ return(NULL); --- a/print-igmp.c +++ b/print-igmp.c -@@ -269,6 +269,7 @@ igmp_print(netdissect_options *ndo, +@@ -267,6 +267,7 @@ igmp_print(netdissect_options *ndo, case 0x17: ND_PRINT("igmp leave %s", GET_IPADDR_STRING(bp + 4)); break; @@ -243,7 +243,7 @@ case 0x13: ND_PRINT("igmp dvmrp"); if (len < 8) -@@ -280,6 +281,7 @@ igmp_print(netdissect_options *ndo, +@@ -278,6 +279,7 @@ igmp_print(netdissect_options *ndo, ND_PRINT("igmp pimv1"); pimv1_print(ndo, bp, len); break; @@ -253,7 +253,7 @@ break; --- a/print-ip-demux.c +++ b/print-ip-demux.c -@@ -48,6 +48,7 @@ ip_demux_print(netdissect_options *ndo, +@@ -46,6 +46,7 @@ ip_demux_print(netdissect_options *ndo, again: switch (nh) { @@ -261,7 +261,7 @@ case IPPROTO_AH: if (!ND_TTEST_1(bp)) { ndo->ndo_protocol = "ah"; -@@ -85,7 +86,9 @@ again: +@@ -83,7 +84,9 @@ again: */ break; } @@ -271,7 +271,7 @@ case IPPROTO_SCTP: sctp_print(ndo, bp, iph, length); break; -@@ -93,7 +96,7 @@ again: +@@ -91,7 +94,7 @@ again: case IPPROTO_DCCP: dccp_print(ndo, bp, iph, length); break; @@ -280,7 +280,7 @@ case IPPROTO_TCP: tcp_print(ndo, bp, length, iph, fragmented); break; -@@ -122,6 +125,7 @@ again: +@@ -120,6 +123,7 @@ again: } break; @@ -288,7 +288,7 @@ case IPPROTO_PIGP: /* * XXX - the current IANA protocol number assignments -@@ -142,14 +146,17 @@ again: +@@ -140,14 +144,17 @@ again: case IPPROTO_EIGRP: eigrp_print(ndo, bp, length); break; @@ -306,7 +306,7 @@ case IPPROTO_OSPF: if (ver == 6) -@@ -186,6 +193,7 @@ again: +@@ -184,6 +191,7 @@ again: gre_print(ndo, bp, length); break; @@ -314,7 +314,7 @@ case IPPROTO_MOBILE: mobile_print(ndo, bp, length); break; -@@ -205,6 +213,7 @@ again: +@@ -203,6 +211,7 @@ again: case IPPROTO_PGM: pgm_print(ndo, bp, length, iph); break; @@ -324,7 +324,7 @@ if (ver == 6) --- a/print-ip6.c +++ b/print-ip6.c -@@ -135,10 +135,11 @@ ip6_finddst(netdissect_options *ndo, nd_ +@@ -133,10 +133,11 @@ ip6_finddst(netdissect_options *ndo, nd_ * Only one routing header to a customer. */ goto done; @@ -337,7 +337,7 @@ default: /* * AH and ESP are, in the RFCs that describe them, -@@ -375,6 +376,7 @@ ip6_print(netdissect_options *ndo, const +@@ -371,6 +372,7 @@ ip6_print(netdissect_options *ndo, const nh = GET_U_1(cp); break; @@ -345,7 +345,7 @@ case IPPROTO_FRAGMENT: advance = frag6_print(ndo, cp, (const u_char *)ip6); if (advance < 0 || ndo->ndo_snapend <= cp + advance) { -@@ -405,7 +407,7 @@ ip6_print(netdissect_options *ndo, const +@@ -401,7 +403,7 @@ ip6_print(netdissect_options *ndo, const nh = GET_U_1(cp); nd_pop_packet_info(ndo); return; @@ -356,7 +356,7 @@ advance = rt6_print(ndo, cp, (const u_char *)ip6); --- a/print-llc.c +++ b/print-llc.c -@@ -207,6 +207,7 @@ llc_print(netdissect_options *ndo, const +@@ -205,6 +205,7 @@ llc_print(netdissect_options *ndo, const hdrlen = 4; /* DSAP, SSAP, 2-byte control field */ } @@ -364,7 +364,7 @@ if (ssap_field == LLCSAP_GLOBAL && dsap_field == LLCSAP_GLOBAL) { /* * This is an Ethernet_802.3 IPX frame; it has an -@@ -229,6 +230,7 @@ llc_print(netdissect_options *ndo, const +@@ -227,6 +228,7 @@ llc_print(netdissect_options *ndo, const ipx_print(ndo, p, length); return (0); /* no LLC header */ } @@ -372,7 +372,7 @@ dsap = dsap_field & ~LLC_IG; ssap = ssap_field & ~LLC_GSAP; -@@ -292,6 +294,7 @@ llc_print(netdissect_options *ndo, const +@@ -290,6 +292,7 @@ llc_print(netdissect_options *ndo, const return (hdrlen); } @@ -380,7 +380,7 @@ if (ssap == LLCSAP_IPX && dsap == LLCSAP_IPX && control == LLC_UI) { /* -@@ -305,6 +308,7 @@ llc_print(netdissect_options *ndo, const +@@ -303,6 +306,7 @@ llc_print(netdissect_options *ndo, const ipx_print(ndo, p, length); return (hdrlen); } @@ -388,7 +388,7 @@ #ifdef ENABLE_SMB if (ssap == LLCSAP_NETBEUI && dsap == LLCSAP_NETBEUI -@@ -323,12 +327,13 @@ llc_print(netdissect_options *ndo, const +@@ -321,12 +325,13 @@ llc_print(netdissect_options *ndo, const return (hdrlen); } #endif @@ -403,7 +403,7 @@ if (!ndo->ndo_eflag) { if (ssap == dsap) { if (src == NULL || dst == NULL) -@@ -484,6 +489,7 @@ snap_print(netdissect_options *ndo, cons +@@ -482,6 +487,7 @@ snap_print(netdissect_options *ndo, cons case OUI_CISCO: switch (et) { @@ -411,7 +411,7 @@ case PID_CISCO_CDP: cdp_print(ndo, p, length); return (1); -@@ -496,6 +502,7 @@ snap_print(netdissect_options *ndo, cons +@@ -494,6 +500,7 @@ snap_print(netdissect_options *ndo, cons case PID_CISCO_VTP: vtp_print(ndo, p, length); return (1); @@ -419,7 +419,7 @@ case PID_CISCO_PVST: case PID_CISCO_VLANBRIDGE: stp_print(ndo, p, length); -@@ -508,6 +515,7 @@ snap_print(netdissect_options *ndo, cons +@@ -506,6 +513,7 @@ snap_print(netdissect_options *ndo, cons case OUI_RFC2684: switch (et) { @@ -427,7 +427,7 @@ case PID_RFC2684_ETH_FCS: case PID_RFC2684_ETH_NOFCS: /* -@@ -569,6 +577,7 @@ snap_print(netdissect_options *ndo, cons +@@ -567,6 +575,7 @@ snap_print(netdissect_options *ndo, cons */ fddi_print(ndo, p, length, caplen); return (1); @@ -437,7 +437,7 @@ stp_print(ndo, p, length); --- a/print-null.c +++ b/print-null.c -@@ -116,6 +116,7 @@ null_if_print(netdissect_options *ndo, c +@@ -114,6 +114,7 @@ null_if_print(netdissect_options *ndo, c ip6_print(ndo, p, length); break; @@ -445,7 +445,7 @@ case BSD_AFNUM_ISO: isoclns_print(ndo, p, length); break; -@@ -127,6 +128,7 @@ null_if_print(netdissect_options *ndo, c +@@ -125,6 +126,7 @@ null_if_print(netdissect_options *ndo, c case BSD_AFNUM_IPX: ipx_print(ndo, p, length); break; @@ -455,7 +455,7 @@ /* unknown AF_ value */ --- a/print-ppp.c +++ b/print-ppp.c -@@ -1355,6 +1355,7 @@ trunc: +@@ -1354,6 +1354,7 @@ trunc: * The length argument is the on-the-wire length, not the captured * length; we can only un-escape the captured part. */ @@ -464,7 +464,7 @@ ppp_hdlc(netdissect_options *ndo, const u_char *p, u_int length) @@ -1451,17 +1452,19 @@ trunc: - ndo->ndo_snapend = se; + nd_pop_packet_info(ndo); nd_print_trunc(ndo); } - @@ -515,7 +515,7 @@ +#endif --- a/print-sll.c +++ b/print-sll.c -@@ -465,12 +465,14 @@ recurse: +@@ -463,12 +463,14 @@ recurse: */ switch (ether_type) { @@ -532,7 +532,7 @@ /* --- a/print-tcp.c +++ b/print-tcp.c -@@ -614,6 +614,7 @@ tcp_print(netdissect_options *ndo, +@@ -612,6 +612,7 @@ tcp_print(netdissect_options *ndo, ND_PRINT(" %u", utoval); break; @@ -540,7 +540,7 @@ case TCPOPT_MPTCP: { const u_char *snapend_save; -@@ -637,7 +638,7 @@ tcp_print(netdissect_options *ndo, +@@ -635,7 +636,7 @@ tcp_print(netdissect_options *ndo, goto bad; break; } @@ -549,7 +549,7 @@ case TCPOPT_FASTOPEN: datalen = len - 2; LENCHECK(datalen); -@@ -722,6 +723,7 @@ tcp_print(netdissect_options *ndo, +@@ -720,6 +721,7 @@ tcp_print(netdissect_options *ndo, return; } @@ -557,65 +557,64 @@ if (ndo->ndo_packettype) { switch (ndo->ndo_packettype) { case PT_ZMTP1: -@@ -737,6 +739,7 @@ tcp_print(netdissect_options *ndo, +@@ -735,12 +737,15 @@ tcp_print(netdissect_options *ndo, } return; } +#endif - if (IS_SRC_OR_DST_PORT(TELNET_PORT)) { - telnet_print(ndo, bp, length); -@@ -746,24 +749,31 @@ tcp_print(netdissect_options *ndo, - } else if (IS_SRC_OR_DST_PORT(WHOIS_PORT)) { + if (IS_SRC_OR_DST_PORT(FTP_PORT)) { ND_PRINT(": "); - whois_print(ndo, bp, length); -- } else if (IS_SRC_OR_DST_PORT(BGP_PORT)) -+ } -+#ifndef TCPDUMP_MINI -+ else if (IS_SRC_OR_DST_PORT(BGP_PORT)) - bgp_print(ndo, bp, length); -+#endif - else if (IS_SRC_OR_DST_PORT(PPTP_PORT)) - pptp_print(ndo, bp); + ftp_print(ndo, bp, length); +#ifndef TCPDUMP_MINI - else if (IS_SRC_OR_DST_PORT(REDIS_PORT)) - resp_print(ndo, bp, length); - else if (IS_SRC_OR_DST_PORT(SSH_PORT)) + } else if (IS_SRC_OR_DST_PORT(SSH_PORT)) { ssh_print(ndo, bp, length); +#endif - #ifdef ENABLE_SMB - else if (IS_SRC_OR_DST_PORT(NETBIOS_SSN_PORT)) + } else if (IS_SRC_OR_DST_PORT(TELNET_PORT)) { + telnet_print(ndo, bp, length); + } else if (IS_SRC_OR_DST_PORT(SMTP_PORT)) { +@@ -759,10 +764,12 @@ tcp_print(netdissect_options *ndo, + } else if (IS_SRC_OR_DST_PORT(NETBIOS_SSN_PORT)) { nbt_tcp_print(ndo, bp, length); - else if (IS_SRC_OR_DST_PORT(SMB_PORT)) - smb_tcp_print(ndo, bp, length); #endif +#ifndef TCPDUMP_MINI - else if (IS_SRC_OR_DST_PORT(BEEP_PORT)) - beep_print(ndo, bp, length); - else if (IS_SRC_OR_DST_PORT(OPENFLOW_PORT_OLD) || IS_SRC_OR_DST_PORT(OPENFLOW_PORT_IANA)) - openflow_print(ndo, bp, length); + } else if (IS_SRC_OR_DST_PORT(BGP_PORT)) { +- bgp_print(ndo, bp, length); ++ bgp_print(ndo, bp, length); + } else if (IS_SRC_OR_DST_PORT(RPKI_RTR_PORT)) { + rpki_rtr_print(ndo, bp, length); +#endif - else if (IS_SRC_OR_DST_PORT(FTP_PORT)) { + #ifdef ENABLE_SMB + } else if (IS_SRC_OR_DST_PORT(SMB_PORT)) { + smb_tcp_print(ndo, bp, length); +@@ -770,18 +777,22 @@ tcp_print(netdissect_options *ndo, + } else if (IS_SRC_OR_DST_PORT(RTSP_PORT)) { ND_PRINT(": "); - ftp_print(ndo, bp, length); -@@ -776,12 +786,14 @@ tcp_print(netdissect_options *ndo, - } else if (IS_SRC_OR_DST_PORT(NAMESERVER_PORT)) { - /* over_tcp: TRUE, is_mdns: FALSE */ - domain_print(ndo, bp, length, TRUE, FALSE); + rtsp_print(ndo, bp, length); +#ifndef TCPDUMP_MINI } else if (IS_SRC_OR_DST_PORT(MSDP_PORT)) { msdp_print(ndo, bp, length); - } else if (IS_SRC_OR_DST_PORT(RPKI_RTR_PORT)) { - rpki_rtr_print(ndo, bp, length); } else if (IS_SRC_OR_DST_PORT(LDP_PORT)) { ldp_print(ndo, bp, length); +- } else if (IS_SRC_OR_DST_PORT(PPTP_PORT)) ++#endif ++ } else if (IS_SRC_OR_DST_PORT(PPTP_PORT)) { + pptp_print(ndo, bp); +- else if (IS_SRC_OR_DST_PORT(REDIS_PORT)) ++#ifndef TCPDUMP_MINI ++ } else if (IS_SRC_OR_DST_PORT(REDIS_PORT)) + resp_print(ndo, bp, length); + else if (IS_SRC_OR_DST_PORT(BEEP_PORT)) + beep_print(ndo, bp, length); + else if (IS_SRC_OR_DST_PORT(OPENFLOW_PORT_OLD) || IS_SRC_OR_DST_PORT(OPENFLOW_PORT_IANA)) { + openflow_print(ndo, bp, length); +#endif - } else if ((IS_SRC_OR_DST_PORT(NFS_PORT)) && - length >= 4 && ND_TTEST_4(bp)) { - /* + } else if (IS_SRC_OR_DST_PORT(HTTP_PORT_ALT)) { + ND_PRINT(": "); + http_print(ndo, bp, length); --- a/print-udp.c +++ b/print-udp.c -@@ -435,10 +435,12 @@ udp_print(netdissect_options *ndo, const +@@ -433,10 +433,12 @@ udp_print(netdissect_options *ndo, const vat_print(ndo, cp, length); break; @@ -628,7 +627,7 @@ case PT_RPC: rp = (const struct sunrpc_msg *)cp; -@@ -467,10 +469,12 @@ udp_print(netdissect_options *ndo, const +@@ -465,10 +467,12 @@ udp_print(netdissect_options *ndo, const snmp_print(ndo, cp, length); break; @@ -641,7 +640,7 @@ case PT_TFTP: udpipaddr_print(ndo, ip, sport, dport); -@@ -488,6 +492,7 @@ udp_print(netdissect_options *ndo, const +@@ -485,6 +489,7 @@ udp_print(netdissect_options *ndo, const radius_print(ndo, cp, length); break; @@ -649,7 +648,7 @@ case PT_VXLAN: udpipaddr_print(ndo, ip, sport, dport); vxlan_print(ndo, cp, length); -@@ -510,6 +515,7 @@ udp_print(netdissect_options *ndo, const +@@ -507,6 +512,7 @@ udp_print(netdissect_options *ndo, const udpipaddr_print(ndo, ip, sport, dport); someip_print(ndo, cp, length); break; @@ -657,115 +656,116 @@ case PT_DOMAIN: udpipaddr_print(ndo, ip, sport, dport); /* over_tcp: FALSE, is_mdns: FALSE */ -@@ -596,29 +602,37 @@ udp_print(netdissect_options *ndo, const - else if (IS_SRC_OR_DST_PORT(MULTICASTDNS_PORT)) - /* over_tcp: FALSE, is_mdns: TRUE */ - domain_print(ndo, cp, length, FALSE, TRUE); -+#ifndef TCPDUMP_MINI - else if (IS_SRC_OR_DST_PORT(TIMED_PORT)) - timed_print(ndo, (const u_char *)cp); -+#endif +@@ -594,8 +600,12 @@ udp_print(netdissect_options *ndo, const + bootp_print(ndo, cp, length); else if (IS_SRC_OR_DST_PORT(TFTP_PORT)) tftp_print(ndo, cp, length); - else if (IS_SRC_OR_DST_PORT(BOOTPC_PORT) || IS_SRC_OR_DST_PORT(BOOTPS_PORT)) - bootp_print(ndo, cp, length); ++#ifndef TCPDUMP_MINI ++#ifdef ENABLE_SMB + else if (IS_SRC_OR_DST_PORT(KERBEROS_PORT)) + krb_print(ndo, (const u_char *)cp); ++#endif ++#endif + else if (IS_SRC_OR_DST_PORT(NTP_PORT)) + ntp_print(ndo, cp, length); + #ifdef ENABLE_SMB +@@ -607,6 +617,7 @@ udp_print(netdissect_options *ndo, const + else if (IS_SRC_OR_DST_PORT(SNMP_PORT) || + IS_SRC_OR_DST_PORT(SNMPTRAP_PORT)) + snmp_print(ndo, cp, length); ++#ifndef TCPDUMP_MINI + else if (IS_SRC_OR_DST_PORT(PTP_EVENT_PORT) || + IS_SRC_OR_DST_PORT(PTP_GENERAL_PORT)) + ptp_print(ndo, cp, length); +@@ -614,38 +625,50 @@ udp_print(netdissect_options *ndo, const + cisco_autorp_print(ndo, cp, length); + else if (IS_SRC_OR_DST_PORT(ISAKMP_PORT)) + isakmp_print(ndo, cp, length, bp2); ++#endif + else if (IS_SRC_OR_DST_PORT(SYSLOG_PORT)) + syslog_print(ndo, cp, length); +#ifndef TCPDUMP_MINI else if (IS_SRC_OR_DST_PORT(RIP_PORT)) rip_print(ndo, cp, length); + else if (IS_SRC_OR_DST_PORT(RIPNG_PORT)) + ripng_print(ndo, cp, length); + else if (IS_SRC_OR_DST_PORT(TIMED_PORT)) + timed_print(ndo, (const u_char *)cp); +#endif + else if (IS_SRC_OR_DST_PORT(DHCP6_SERV_PORT) || + IS_SRC_OR_DST_PORT(DHCP6_CLI_PORT)) + dhcp6_print(ndo, cp, length); ++#ifndef TCPDUMP_MINI + else if (IS_SRC_OR_DST_PORT(LDP_PORT)) + ldp_print(ndo, cp, length); else if (IS_SRC_OR_DST_PORT(AODV_PORT)) - aodv_print(ndo, cp, length, - ip6 != NULL); + aodv_print(ndo, cp, length, IP_V(ip) == 6); ++#endif + else if (IS_SRC_OR_DST_PORT(OLSR_PORT)) + olsr_print(ndo, cp, length, IP_V(ip) == 6); +#ifndef TCPDUMP_MINI - else if (IS_SRC_OR_DST_PORT(ISAKMP_PORT)) - isakmp_print(ndo, cp, length, bp2); + else if (IS_SRC_OR_DST_PORT(LMP_PORT)) + lmp_print(ndo, cp, length); ++#ifdef ENABLE_SMB + else if (IS_SRC_OR_DST_PORT(KERBEROS_SEC_PORT)) + krb_print(ndo, (const u_char *)cp); ++#endif + else if (IS_SRC_OR_DST_PORT(LWRES_PORT)) + lwres_print(ndo, cp, length); + else if (IS_SRC_OR_DST_PORT(MULTICASTDNS_PORT)) + /* over_tcp: FALSE, is_mdns: TRUE */ + domain_print(ndo, cp, length, FALSE, TRUE); ++#ifdef ENABLE_SMB else if (IS_SRC_OR_DST_PORT(ISAKMP_PORT_NATT)) isakmp_rfc3948_print(ndo, cp, length, bp2, IP_V(ip), fragmented, ttl_hl); else if (IS_SRC_OR_DST_PORT(ISAKMP_PORT_USER1) || IS_SRC_OR_DST_PORT(ISAKMP_PORT_USER2)) isakmp_print(ndo, cp, length, bp2); +#endif - else if (IS_SRC_OR_DST_PORT(SNMP_PORT) || IS_SRC_OR_DST_PORT(SNMPTRAP_PORT)) - snmp_print(ndo, cp, length); - else if (IS_SRC_OR_DST_PORT(NTP_PORT)) - ntp_print(ndo, cp, length); -+#ifndef TCPDUMP_MINI - else if (IS_SRC_OR_DST_PORT(KERBEROS_PORT) || IS_SRC_OR_DST_PORT(KERBEROS_SEC_PORT)) - krb_print(ndo, (const u_char *)cp); +#endif else if (IS_SRC_OR_DST_PORT(L2TP_PORT)) l2tp_print(ndo, cp, length); - #ifdef ENABLE_SMB -@@ -629,6 +643,7 @@ udp_print(netdissect_options *ndo, const - #endif ++#ifndef TCPDUMP_MINI else if (dport == VAT_PORT) vat_print(ndo, cp, length); -+#ifndef TCPDUMP_MINI else if (IS_SRC_OR_DST_PORT(ZEPHYR_SRV_PORT) || IS_SRC_OR_DST_PORT(ZEPHYR_CLT_PORT)) - zephyr_print(ndo, cp, length); - /* -@@ -641,8 +656,11 @@ udp_print(netdissect_options *ndo, const - (const u_char *) ip); - else if (IS_SRC_OR_DST_PORT(RIPNG_PORT)) - ripng_print(ndo, cp, length); -+#endif -+ - else if (IS_SRC_OR_DST_PORT(DHCP6_SERV_PORT) || IS_SRC_OR_DST_PORT(DHCP6_CLI_PORT)) - dhcp6_print(ndo, cp, length); -+#ifndef TCPDUMP_MINI - else if (IS_SRC_OR_DST_PORT(AHCP_PORT)) - ahcp_print(ndo, cp, length); - else if (IS_SRC_OR_DST_PORT(BABEL_PORT) || IS_SRC_OR_DST_PORT(BABEL_PORT_OLD)) -@@ -656,6 +674,7 @@ udp_print(netdissect_options *ndo, const +@@ -669,6 +692,7 @@ udp_print(netdissect_options *ndo, const + */ + else if (dport == WB_PORT) wb_print(ndo, cp, length); - else if (IS_SRC_OR_DST_PORT(CISCO_AUTORP_PORT)) - cisco_autorp_print(ndo, cp, length); +#endif else if (IS_SRC_OR_DST_PORT(RADIUS_PORT) || IS_SRC_OR_DST_PORT(RADIUS_NEW_PORT) || IS_SRC_OR_DST_PORT(RADIUS_ACCOUNTING_PORT) || -@@ -663,15 +682,18 @@ udp_print(netdissect_options *ndo, const +@@ -676,6 +700,7 @@ udp_print(netdissect_options *ndo, const IS_SRC_OR_DST_PORT(RADIUS_CISCO_COA_PORT) || IS_SRC_OR_DST_PORT(RADIUS_COA_PORT) ) radius_print(ndo, cp, length); +#ifndef TCPDUMP_MINI else if (dport == HSRP_PORT) hsrp_print(ndo, cp, length); - else if (IS_SRC_OR_DST_PORT(LWRES_PORT)) - lwres_print(ndo, cp, length); - else if (IS_SRC_OR_DST_PORT(LDP_PORT)) - ldp_print(ndo, cp, length); -+#endif - else if (IS_SRC_OR_DST_PORT(OLSR_PORT)) - olsr_print(ndo, cp, length, - (IP_V(ip) == 6) ? 1 : 0); -+#ifndef TCPDUMP_MINI else if (IS_SRC_OR_DST_PORT(MPLS_LSP_PING_PORT)) - lspping_print(ndo, cp, length); - else if (sport == BCM_LI_PORT) -@@ -693,10 +715,12 @@ udp_print(netdissect_options *ndo, const +@@ -695,8 +720,10 @@ udp_print(netdissect_options *ndo, const lwapp_control_print(ndo, cp, length, 0); else if (IS_SRC_OR_DST_PORT(LWAPP_DATA_PORT)) lwapp_data_print(ndo, cp, length); +#endif else if (IS_SRC_OR_DST_PORT(SIP_PORT)) sip_print(ndo, cp, length); - else if (IS_SRC_OR_DST_PORT(SYSLOG_PORT)) - syslog_print(ndo, cp, length); +#ifndef TCPDUMP_MINI else if (IS_SRC_OR_DST_PORT(OTV_PORT)) otv_print(ndo, cp, length); else if (IS_SRC_OR_DST_PORT(VXLAN_PORT)) -@@ -722,6 +746,7 @@ udp_print(netdissect_options *ndo, const - ptp_print(ndo, cp, length); - } else if (IS_SRC_OR_DST_PORT(SOMEIP_PORT)) +@@ -721,6 +748,7 @@ udp_print(netdissect_options *ndo, const someip_print(ndo, cp, length); + else if (sport == BCM_LI_PORT) + bcm_li_print(ndo, cp, length); +#endif else { if (ulen > length && !fragmented) ND_PRINT("UDP, bad length %u > %u", --- a/print.c +++ b/print.c -@@ -48,6 +48,7 @@ struct printer { +@@ -46,6 +46,7 @@ struct printer { }; static const struct printer printers[] = { @@ -773,7 +773,7 @@ #ifdef DLT_APPLE_IP_OVER_IEEE1394 { ap1394_if_print, DLT_APPLE_IP_OVER_IEEE1394 }, #endif -@@ -86,7 +87,9 @@ static const struct printer printers[] = +@@ -84,7 +85,9 @@ static const struct printer printers[] = #ifdef DLT_ENC { enc_if_print, DLT_ENC }, #endif @@ -783,7 +783,7 @@ { fddi_if_print, DLT_FDDI }, #ifdef DLT_FR { fr_if_print, DLT_FR }, -@@ -94,6 +97,7 @@ static const struct printer printers[] = +@@ -92,6 +95,7 @@ static const struct printer printers[] = #ifdef DLT_FRELAY { fr_if_print, DLT_FRELAY }, #endif @@ -791,7 +791,7 @@ #ifdef DLT_IEEE802_11 { ieee802_11_if_print, DLT_IEEE802_11}, #endif -@@ -103,6 +107,7 @@ static const struct printer printers[] = +@@ -101,6 +105,7 @@ static const struct printer printers[] = #ifdef DLT_IEEE802_11_RADIO { ieee802_11_radio_if_print, DLT_IEEE802_11_RADIO }, #endif @@ -799,7 +799,7 @@ #ifdef DLT_IEEE802_15_4 { ieee802_15_4_if_print, DLT_IEEE802_15_4 }, #endif -@@ -115,9 +120,11 @@ static const struct printer printers[] = +@@ -113,9 +118,11 @@ static const struct printer printers[] = #ifdef DLT_IP_OVER_FC { ipfc_if_print, DLT_IP_OVER_FC }, #endif @@ -811,7 +811,7 @@ #ifdef DLT_IPOIB { ipoib_if_print, DLT_IPOIB }, #endif -@@ -172,19 +179,23 @@ static const struct printer printers[] = +@@ -170,19 +177,23 @@ static const struct printer printers[] = #ifdef DLT_MFR { mfr_if_print, DLT_MFR }, #endif @@ -835,7 +835,7 @@ #ifdef DLT_PFLOG { pflog_if_print, DLT_PFLOG }, #endif -@@ -200,6 +211,7 @@ static const struct printer printers[] = +@@ -198,6 +209,7 @@ static const struct printer printers[] = #ifdef DLT_PPP_SERIAL { ppp_hdlc_if_print, DLT_PPP_SERIAL }, #endif @@ -843,7 +843,7 @@ { ppp_if_print, DLT_PPP }, #ifdef DLT_PPP_PPPD { ppp_if_print, DLT_PPP_PPPD }, -@@ -211,6 +223,7 @@ static const struct printer printers[] = +@@ -209,6 +221,7 @@ static const struct printer printers[] = { prism_if_print, DLT_PRISM_HEADER }, #endif { raw_if_print, DLT_RAW }, @@ -851,7 +851,7 @@ #ifdef DLT_IPV4 { raw_if_print, DLT_IPV4 }, #endif -@@ -243,6 +256,7 @@ static const struct printer printers[] = +@@ -241,6 +254,7 @@ static const struct printer printers[] = #ifdef DLT_VSOCK { vsock_if_print, DLT_VSOCK }, #endif diff --git a/package/network/utils/umbim/Makefile b/package/network/utils/umbim/Makefile index 5b0a5a8f7d11b9..39c30d71c4f3f8 100644 --- a/package/network/utils/umbim/Makefile +++ b/package/network/utils/umbim/Makefile @@ -1,7 +1,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=umbim -PKG_RELEASE:=24 +PKG_RELEASE:=25 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/umbim.git diff --git a/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh b/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh index f2d4c436e88241..75b914e8aac1ef 100755 --- a/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh +++ b/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh @@ -23,6 +23,7 @@ proto_mbim_init_config() { proto_config_add_string dhcp proto_config_add_string dhcpv6 proto_config_add_boolean sourcefilter + proto_config_add_boolean delegate proto_config_add_string pdptype proto_config_add_int mtu proto_config_add_defaults @@ -48,7 +49,7 @@ _proto_mbim_setup() { local device apn pincode delay auth username password allow_roaming allow_partner local dhcp dhcpv6 pdptype ip4table ip6table mtu $PROTO_DEFAULT_OPTIONS json_get_vars device apn pincode delay auth username password allow_roaming allow_partner - json_get_vars dhcp dhcpv6 sourcefilter pdptype ip4table ip6table mtu $PROTO_DEFAULT_OPTIONS + json_get_vars dhcp dhcpv6 sourcefilter delegate pdptype ip4table ip6table mtu $PROTO_DEFAULT_OPTIONS [ ! -e /proc/sys/net/ipv6 ] && ipv6=0 || json_get_var ipv6 ipv6 @@ -264,6 +265,7 @@ _proto_mbim_setup() { echo "mbim[$$]" "Starting DHCPv6 on $ifname" json_add_string proto "dhcpv6" json_add_string extendprefix 1 + [ "$delegate" = "0" ] && json_add_boolean delegate "0" [ "$sourcefilter" = "0" ] && json_add_boolean sourcefilter "0" fi diff --git a/package/network/utils/uqmi/Makefile b/package/network/utils/uqmi/Makefile index b0433da96a4dc7..54e1b4fc7b16a2 100644 --- a/package/network/utils/uqmi/Makefile +++ b/package/network/utils/uqmi/Makefile @@ -1,7 +1,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=uqmi -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/uqmi.git diff --git a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh index bec46325bcac3e..8ec577a90b7823 100755 --- a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh +++ b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh @@ -24,6 +24,7 @@ proto_qmi_init_config() { proto_config_add_boolean dhcp proto_config_add_boolean dhcpv6 proto_config_add_boolean sourcefilter + proto_config_add_boolean delegate proto_config_add_boolean autoconnect proto_config_add_int plmn proto_config_add_int timeout @@ -42,7 +43,7 @@ proto_qmi_setup() { local profile_pdptype json_get_vars device apn v6apn auth username password pincode delay modes - json_get_vars pdptype profile v6profile dhcp dhcpv6 sourcefilter autoconnect plmn ip4table + json_get_vars pdptype profile v6profile dhcp dhcpv6 sourcefilter delegate autoconnect plmn ip4table json_get_vars ip6table timeout mtu $PROTO_DEFAULT_OPTIONS [ "$timeout" = "" ] && timeout="10" @@ -442,6 +443,7 @@ proto_qmi_setup() { proto_add_dynamic_defaults # RFC 7278: Extend an IPv6 /64 Prefix to LAN json_add_string extendprefix 1 + [ "$delegate" = "0" ] && json_add_boolean delegate "0" [ "$sourcefilter" = "0" ] && json_add_boolean sourcefilter "0" [ -n "$zone" ] && json_add_string zone "$zone" json_close_object diff --git a/target/linux/ath79/config-6.6 b/target/linux/ath79/config-6.6 index f2d06460394f09..92057c343c09d1 100644 --- a/target/linux/ath79/config-6.6 +++ b/target/linux/ath79/config-6.6 @@ -1,6 +1,7 @@ -CONFIG_AG71XX=y -# CONFIG_AG71XX_DEBUG is not set -CONFIG_AG71XX_DEBUG_FS=y +# CONFIG_AG71XX is not set +CONFIG_AG71XX_LEGACY=y +# CONFIG_AG71XX_LEGACY_DEBUG is not set +CONFIG_AG71XX_LEGACY_DEBUG_FS=y CONFIG_AR8216_PHY=y CONFIG_AR8216_PHY_LEDS=y CONFIG_ARCH_32BIT_OFF_T=y @@ -51,6 +52,7 @@ CONFIG_EARLY_PRINTK=y CONFIG_ETHERNET_PACKET_MANGLE=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_FIXED_PHY=y +CONFIG_FORCE_NR_CPUS=y CONFIG_FS_IOMAP=y CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y diff --git a/target/linux/ath79/dts/qca955x.dtsi b/target/linux/ath79/dts/qca955x.dtsi index 9d410ceb461cbf..c6cf83d4dafe94 100644 --- a/target/linux/ath79/dts/qca955x.dtsi +++ b/target/linux/ath79/dts/qca955x.dtsi @@ -362,6 +362,8 @@ resets = <&rst 9>, <&rst 22>; reset-names = "mac", "mdio"; + clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_REF>; + clock-names = "eth", "mdio"; }; &mdio1 { @@ -379,4 +381,6 @@ resets = <&rst 13>, <&rst 23>; reset-names = "mac", "mdio"; + clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_REF>; + clock-names = "eth", "mdio"; }; diff --git a/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c b/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c index c502f4a06497e7..092cd85d82e117 100644 --- a/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c +++ b/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c @@ -284,13 +284,8 @@ static int rb91x_nand_probe(struct platform_device *pdev) platform_set_drvdata(pdev, drvdata); gpios = gpiod_get_array(dev, NULL, GPIOD_OUT_LOW); - if (IS_ERR(gpios)) { - if (PTR_ERR(gpios) != -EPROBE_DEFER) { - dev_err(dev, "failed to get gpios: %ld\n", - PTR_ERR(gpios)); - } - return PTR_ERR(gpios); - } + if (IS_ERR(gpios)) + return dev_err_probe(dev, PTR_ERR(gpios), "failed to get gpios"); if (gpios->ndescs != RB91X_NAND_GPIOS) { dev_err(dev, "expected %d gpios\n", RB91X_NAND_GPIOS); @@ -333,16 +328,11 @@ static int rb91x_nand_probe(struct platform_device *pdev) r = mtd_device_register(mtd, NULL, 0); if (r) { - dev_err(dev, "mtd_device_register() failed: %d\n", - r); - goto err_release_nand; + rb91x_nand_release(drvdata); + return dev_err_probe(dev, r, "mtd_device_register() failed"); } return 0; - -err_release_nand: - rb91x_nand_release(drvdata); - return r; } static int rb91x_nand_remove(struct platform_device *pdev) diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig index dfcedcf70e853c..e1504b92347ff0 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Kconfig @@ -1,4 +1,4 @@ -config AG71XX +config AG71XX_LEGACY tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" depends on ATH79 select PHYLIB @@ -6,14 +6,14 @@ config AG71XX If you wish to compile a kernel for AR7XXX/91XXX and enable ethernet support, then you should always answer Y to this. -if AG71XX +if AG71XX_LEGACY -config AG71XX_DEBUG +config AG71XX_LEGACY_DEBUG bool "Atheros AR71xx built-in ethernet driver debugging" help Atheros AR71xx built-in ethernet driver debugging messages. -config AG71XX_DEBUG_FS +config AG71XX_LEGACY_DEBUG_FS bool "Atheros AR71xx built-in ethernet driver debugfs support" depends on DEBUG_FS help diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile index 87add0d208a6fd..86e47290e65227 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile @@ -2,12 +2,12 @@ # Makefile for the Atheros AR71xx built-in ethernet macs # -ag71xx-y += ag71xx_main.o -ag71xx-y += ag71xx_gmac.o -ag71xx-y += ag71xx_ethtool.o -ag71xx-y += ag71xx_phy.o +ag71xx_legacy-y += ag71xx_main.o +ag71xx_legacy-y += ag71xx_gmac.o +ag71xx_legacy-y += ag71xx_ethtool.o +ag71xx_legacy-y += ag71xx_phy.o -ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o +ag71xx_legacy-$(CONFIG_AG71XX_LEGACY_DEBUG_FS) += ag71xx_legacy_debugfs.o -obj-$(CONFIG_AG71XX) += ag71xx_mdio.o -obj-$(CONFIG_AG71XX) += ag71xx.o +obj-$(CONFIG_AG71XX_LEGACY) += ag71xx_legacy_mdio.o +obj-$(CONFIG_AG71XX_LEGACY) += ag71xx_legacy.o diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index fca072a83a4d3b..da716d94c39eca 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -40,7 +40,7 @@ #include #include -#define AG71XX_DRV_NAME "ag71xx" +#define AG71XX_DRV_NAME "ag71xx-legacy" /* * For our NAPI weight bigger does *NOT* mean better - it means more @@ -68,7 +68,7 @@ #define AG71XX_TX_RING_SIZE_MAX 256 #define AG71XX_RX_RING_SIZE_MAX 256 -#ifdef CONFIG_AG71XX_DEBUG +#ifdef CONFIG_AG71XX_LEGACY_DEBUG #define DBG(fmt, args...) pr_debug(fmt, ## args) #else #define DBG(fmt, args...) do {} while (0) @@ -195,7 +195,7 @@ struct ag71xx { u32 pllreg[3]; struct regmap *pllregmap; -#ifdef CONFIG_AG71XX_DEBUG_FS +#ifdef CONFIG_AG71XX_LEGACY_DEBUG_FS struct ag71xx_debug debug; #endif }; @@ -425,7 +425,7 @@ static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints) ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); } -#ifdef CONFIG_AG71XX_DEBUG_FS +#ifdef CONFIG_AG71XX_LEGACY_DEBUG_FS int ag71xx_debugfs_root_init(void); void ag71xx_debugfs_root_exit(void); int ag71xx_debugfs_init(struct ag71xx *ag); @@ -441,7 +441,7 @@ static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) {} static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) {} -#endif /* CONFIG_AG71XX_DEBUG_FS */ +#endif /* CONFIG_AG71XX_LEGACY_DEBUG_FS */ int ag71xx_ar7240_init(struct ag71xx *ag, struct device_node *np); void ag71xx_ar7240_cleanup(struct ag71xx *ag); diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_debugfs.c similarity index 100% rename from target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c rename to target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_debugfs.c diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_mdio.c similarity index 99% rename from target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c rename to target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_mdio.c index fd05dbd0ca6616..fda561a3743164 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_legacy_mdio.c @@ -241,7 +241,7 @@ static struct platform_driver ag71xx_mdio_driver = { .probe = ag71xx_mdio_probe, .remove = ag71xx_mdio_remove, .driver = { - .name = "ag71xx-mdio", + .name = "ag71xx-legacy-mdio", .of_match_table = ag71xx_mdio_match, } }; diff --git a/target/linux/ath79/generic/config-default b/target/linux/ath79/generic/config-default index a37d341821bf0b..1141d7ae473539 100644 --- a/target/linux/ath79/generic/config-default +++ b/target/linux/ath79/generic/config-default @@ -20,8 +20,6 @@ CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y CONFIG_MTD_SPLIT_EVA_FW=y CONFIG_NVMEM_SYSFS=y CONFIG_NVMEM_U_BOOT_ENV=y -CONFIG_PHY_AR7100_USB=y -CONFIG_PHY_AR7200_USB=y CONFIG_REALTEK_PHY=y CONFIG_REGMAP_I2C=y CONFIG_REGULATOR_FIXED_VOLTAGE=y diff --git a/target/linux/ath79/mikrotik/config-default b/target/linux/ath79/mikrotik/config-default index 71b64b26ad5354..0dd79d9adc0e48 100644 --- a/target/linux/ath79/mikrotik/config-default +++ b/target/linux/ath79/mikrotik/config-default @@ -35,8 +35,6 @@ CONFIG_NET_DSA=y CONFIG_NET_SWITCHDEV=y # CONFIG_NVMEM_LAYOUT_MIKROTIK is not set CONFIG_PHYLINK=y -CONFIG_PHY_AR7100_USB=y -CONFIG_PHY_AR7200_USB=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_SGL_ALLOC=y CONFIG_SPI_RB4XX=y diff --git a/target/linux/ath79/nand/config-default b/target/linux/ath79/nand/config-default index dd47d2a3eab499..71ce1caad7d400 100644 --- a/target/linux/ath79/nand/config-default +++ b/target/linux/ath79/nand/config-default @@ -18,7 +18,6 @@ CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 # CONFIG_PCI_AR71XX is not set -CONFIG_PHY_AR7200_USB=y CONFIG_POWER_RESET=y CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_SGL_ALLOC=y diff --git a/target/linux/ath79/patches-6.6/710-net-use-downstream-ag71xx.patch b/target/linux/ath79/patches-6.6/710-net-use-downstream-ag71xx.patch index 54e64fb11cf8e9..0997aa1ab85271 100644 --- a/target/linux/ath79/patches-6.6/710-net-use-downstream-ag71xx.patch +++ b/target/linux/ath79/patches-6.6/710-net-use-downstream-ag71xx.patch @@ -13,30 +13,22 @@ Submitted-by: John Crispin --- a/drivers/net/ethernet/atheros/Kconfig +++ b/drivers/net/ethernet/atheros/Kconfig -@@ -17,14 +17,7 @@ config NET_VENDOR_ATHEROS +@@ -26,6 +26,8 @@ config AG71XX + If you wish to compile a kernel for AR7XXX/91XXX and enable + ethernet support, then you should always answer Y to this. - if NET_VENDOR_ATHEROS - --config AG71XX -- tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" -- depends on ATH79 -- select PHYLINK -- imply NET_SELFTESTS -- help -- If you wish to compile a kernel for AR7XXX/91XXX and enable -- ethernet support, then you should always answer Y to this. +source "drivers/net/ethernet/atheros/ag71xx/Kconfig" - ++ config ATL2 tristate "Atheros L2 Fast Ethernet support" + depends on PCI --- a/drivers/net/ethernet/atheros/Makefile +++ b/drivers/net/ethernet/atheros/Makefile -@@ -3,7 +3,7 @@ - # Makefile for the Atheros network device drivers. +@@ -4,6 +4,7 @@ # --obj-$(CONFIG_AG71XX) += ag71xx.o -+obj-$(CONFIG_AG71XX) += ag71xx/ + obj-$(CONFIG_AG71XX) += ag71xx.o ++obj-$(CONFIG_AG71XX_LEGACY) += ag71xx/ obj-$(CONFIG_ATL1) += atlx/ obj-$(CONFIG_ATL2) += atlx/ obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ath79/tiny/config-default b/target/linux/ath79/tiny/config-default index c738309ce491c8..e47260df82056f 100644 --- a/target/linux/ath79/tiny/config-default +++ b/target/linux/ath79/tiny/config-default @@ -8,6 +8,4 @@ CONFIG_NET_SWITCHDEV=y CONFIG_NVMEM_SYSFS=y CONFIG_NVMEM_U_BOOT_ENV=y CONFIG_PHYLINK=y -CONFIG_PHY_AR7100_USB=y -CONFIG_PHY_AR7200_USB=y CONFIG_REGULATOR_FIXED_VOLTAGE=y diff --git a/target/linux/generic/backport-6.6/898-v6.7-mtd-spinand-winbond-add-support-for-serial-NAND-flash.patch b/target/linux/generic/backport-6.6/898-v6.7-mtd-spinand-winbond-add-support-for-serial-NAND-flash.patch new file mode 100644 index 00000000000000..b5aeaef83572a8 --- /dev/null +++ b/target/linux/generic/backport-6.6/898-v6.7-mtd-spinand-winbond-add-support-for-serial-NAND-flash.patch @@ -0,0 +1,75 @@ +From 6a804fb72de56d6a99b799f565ae45f2cec7cd55 Mon Sep 17 00:00:00 2001 +From: Sridharan S N +Date: Thu, 12 Oct 2023 12:11:34 +0530 +Subject: mtd: spinand: winbond: add support for serial NAND flash + +Add support for W25N01JW, W25N02JWZEIF, W25N512GW, +W25N02KWZEIR and W25N01GWZEIG. + +W25N02KWZEIR has 8b/512b on-die ECC capability and other +four has 4b/512b on-die ECC capability. + +Signed-off-by: Sridharan S N +Signed-off-by: Md Sadre Alam +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20231012064134.4068621-1-quic_sridsn@quicinc.com +--- + drivers/mtd/nand/spi/winbond.c | 45 ++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 45 insertions(+) + +(limited to 'drivers/mtd/nand/spi/winbond.c') + +--- a/drivers/mtd/nand/spi/winbond.c ++++ b/drivers/mtd/nand/spi/winbond.c +@@ -169,6 +169,51 @@ static const struct spinand_info winbond + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), ++ SPINAND_INFO("W25N01JW", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbc, 0x21), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&w25m02gv_ooblayout, w25n02kv_ecc_get_status)), ++ SPINAND_INFO("W25N02JWZEIF", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbf, 0x22), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 2, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), ++ SPINAND_INFO("W25N512GW", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x20), ++ NAND_MEMORG(1, 2048, 64, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), ++ SPINAND_INFO("W25N02KWZEIR", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x22), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), ++ SPINAND_INFO("W25N01GWZEIG", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x21), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&w25m02gv_ooblayout, w25n02kv_ecc_get_status)), + }; + + static int winbond_spinand_init(struct spinand_device *spinand) diff --git a/target/linux/generic/backport-6.6/899-v6.9-mtd-spinand-winbond-add-W25N04KV.patch b/target/linux/generic/backport-6.6/899-v6.9-mtd-spinand-winbond-add-W25N04KV.patch new file mode 100644 index 00000000000000..3e5d918c61e710 --- /dev/null +++ b/target/linux/generic/backport-6.6/899-v6.9-mtd-spinand-winbond-add-W25N04KV.patch @@ -0,0 +1,53 @@ +From e0ccf861b80698a5cc6f97c89bf8d5761f465fce Mon Sep 17 00:00:00 2001 +From: Zhi-Jun You +Date: Sun, 7 Jan 2024 14:41:20 +0000 +Subject: mtd: spinand: winbond: add support for W25N04KV + +Add support for W25N04KV. + +W25N04KV has 8-bit on-die ECC. + +Signed-off-by: Zhi-Jun You +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20240107144120.532-1-hujy652@gmail.com +--- + drivers/mtd/nand/spi/winbond.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +(limited to 'drivers/mtd/nand/spi/winbond.c') + +--- a/drivers/mtd/nand/spi/winbond.c ++++ b/drivers/mtd/nand/spi/winbond.c +@@ -15,6 +15,8 @@ + + #define WINBOND_CFG_BUF_READ BIT(3) + ++#define W25N04KV_STATUS_ECC_5_8_BITFLIPS (3 << 4) ++ + static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), +@@ -118,6 +120,7 @@ static int w25n02kv_ecc_get_status(struc + return -EBADMSG; + + case STATUS_ECC_HAS_BITFLIPS: ++ case W25N04KV_STATUS_ECC_5_8_BITFLIPS: + /* + * Let's try to retrieve the real maximum number of bitflips + * in order to avoid forcing the wear-leveling layer to move +@@ -214,6 +217,15 @@ static const struct spinand_info winbond + &update_cache_variants), + 0, + SPINAND_ECCINFO(&w25m02gv_ooblayout, w25n02kv_ecc_get_status)), ++ SPINAND_INFO("W25N04KV", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 2, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)), + }; + + static int winbond_spinand_init(struct spinand_device *spinand) diff --git a/target/linux/generic/config-6.6 b/target/linux/generic/config-6.6 index d5c40eae91d119..c8bca0d0ff0b41 100644 --- a/target/linux/generic/config-6.6 +++ b/target/linux/generic/config-6.6 @@ -5146,6 +5146,7 @@ CONFIG_RTC_SYSTOHC_DEVICE="rtc0" # CONFIG_RTL_CARDS is not set # CONFIG_RTS5208 is not set CONFIG_RT_MUTEXES=y +# CONFIG_RUST is not set CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_RV is not set CONFIG_RXKAD=y diff --git a/target/linux/generic/pending-6.6/489-mtd-spinand-winbond-add-support-for-W25N01KV.patch b/target/linux/generic/pending-6.6/489-mtd-spinand-winbond-add-support-for-W25N01KV.patch index 78498af1ce0db0..b72e28a3dd1168 100644 --- a/target/linux/generic/pending-6.6/489-mtd-spinand-winbond-add-support-for-W25N01KV.patch +++ b/target/linux/generic/pending-6.6/489-mtd-spinand-winbond-add-support-for-W25N01KV.patch @@ -14,7 +14,7 @@ Signed-off-by: Robert Marko --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c -@@ -74,6 +74,18 @@ static int w25m02gv_select_target(struct +@@ -76,6 +76,18 @@ static int w25m02gv_select_target(struct return spi_mem_exec_op(spinand->spimem, &op); } @@ -33,7 +33,7 @@ Signed-off-by: Robert Marko static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *region) { -@@ -98,6 +110,11 @@ static int w25n02kv_ooblayout_free(struc +@@ -100,6 +112,11 @@ static int w25n02kv_ooblayout_free(struc return 0; } @@ -45,7 +45,7 @@ Signed-off-by: Robert Marko static const struct mtd_ooblayout_ops w25n02kv_ooblayout = { .ecc = w25n02kv_ooblayout_ecc, .free = w25n02kv_ooblayout_free, -@@ -160,6 +177,15 @@ static const struct spinand_info winbond +@@ -163,6 +180,15 @@ static const struct spinand_info winbond &update_cache_variants), 0, SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)), diff --git a/target/linux/generic/pending-6.6/752-net-phy-aquantia-allow-forcing-order-of-MDI-pairs.patch b/target/linux/generic/pending-6.6/752-net-phy-aquantia-allow-forcing-order-of-MDI-pairs.patch index 97e2953a5073e9..f3ae893b32b99e 100644 --- a/target/linux/generic/pending-6.6/752-net-phy-aquantia-allow-forcing-order-of-MDI-pairs.patch +++ b/target/linux/generic/pending-6.6/752-net-phy-aquantia-allow-forcing-order-of-MDI-pairs.patch @@ -74,7 +74,7 @@ Signed-off-by: Daniel Golle + ret = of_property_read_u32(np, "marvell,mdi-cfg-order", &mdi_conf); + + /* Do nothing in case property "marvell,mdi-cfg-order" is not present */ -+ if (ret == -ENOENT) ++ if (ret == -EINVAL) + return 0; + + if (ret) diff --git a/target/linux/generic/pending-6.6/900-net-ag71xx-fix-qca9530-and-qca9550-mdio-probe.patch b/target/linux/generic/pending-6.6/900-net-ag71xx-fix-qca9530-and-qca9550-mdio-probe.patch new file mode 100644 index 00000000000000..f2c197d4f1e24e --- /dev/null +++ b/target/linux/generic/pending-6.6/900-net-ag71xx-fix-qca9530-and-qca9550-mdio-probe.patch @@ -0,0 +1,25 @@ +From 440415703692af4548e836832ef0434e87fbc357 Mon Sep 17 00:00:00 2001 +From: Oskari Lemmela +Date: Sat, 13 Jul 2024 18:56:59 +0300 +Subject: [PATCH] net: ag71xx: fix qca9530 and qca9550 mdio probe + +Newer QCA9530 and QCA9550 devices should use same div table as AR933X. + +Fixes: d51b6ce441d3 ("net: ethernet: add ag71xx driver") +Signed-off-by: Oskari Lemmela +--- + drivers/net/ethernet/atheros/ag71xx.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/atheros/ag71xx.c ++++ b/drivers/net/ethernet/atheros/ag71xx.c +@@ -638,7 +638,8 @@ static int ag71xx_mdio_get_divider(struc + if (!ref_clock) + return -EINVAL; + +- if (ag71xx_is(ag, AR9330) || ag71xx_is(ag, AR9340)) { ++ if (ag71xx_is(ag, AR9330) || ag71xx_is(ag, AR9340) || ++ ag71xx_is(ag, QCA9530) || ag71xx_is(ag, QCA9550)) { + table = ar933x_mdio_div_table; + ndivs = ARRAY_SIZE(ar933x_mdio_div_table); + } else if (ag71xx_is(ag, AR7240)) { diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 522c7a01802e08..bd8fcb16b644c0 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -692,7 +692,11 @@ define Device/glinet_gl-x3000-xe3000-common DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware mkf2fs \ kmod-fs-f2fs kmod-hwmon-pwmfan kmod-usb3 kmod-usb-serial-option \ kmod-usb-storage kmod-usb-net-qmi-wwan uqmi + IMAGES += factory.bin + IMAGE/factory.bin := append-kernel | pad-to 32M | append-rootfs IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + ARTIFACTS := preloader.bin bl31-uboot.fip + ARTIFACT/preloader.bin := mt7981-bl2 emmc-ddr4 endef define Device/glinet_gl-x3000 @@ -700,6 +704,7 @@ define Device/glinet_gl-x3000 DEVICE_DTS := mt7981a-glinet-gl-x3000 SUPPORTED_DEVICES := glinet,gl-x3000 $(call Device/glinet_gl-x3000-xe3000-common) + ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot glinet_gl-x3000 endef TARGET_DEVICES += glinet_gl-x3000 @@ -708,6 +713,7 @@ define Device/glinet_gl-xe3000 DEVICE_DTS := mt7981a-glinet-gl-xe3000 SUPPORTED_DEVICES := glinet,gl-xe3000 $(call Device/glinet_gl-x3000-xe3000-common) + ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot glinet_gl-xe3000 endef TARGET_DEVICES += glinet_gl-xe3000 diff --git a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/fortinet.sh b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/fortinet.sh index a2742aa3743669..3badb0583abed5 100644 --- a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/fortinet.sh +++ b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/fortinet.sh @@ -1,31 +1,129 @@ . /lib/functions.sh -fortinet_fwinfo_blocks() { +fortinet_bswap32() { + local val="$(printf %08x $(($1)))" + + # swap and print in hex + echo "0x${val:6:2}${val:4:2}${val:2:2}${val:0:2}" +} + +fortinet_by2bl() { + local blks="$(($1 / 0x200))" + [ $(($1 % 0x200)) -gt 0 ] && blks=$((blks + 1)) + + printf "0x%08x" $blks +} + +fortinet_bl2by() { + printf "0x%08x" $(($1 * 0x200)) +} + +fortinet_build_partmap() { + local new="$1" old="$2" + local len="${old%%@*}" ofs="${old##*@}" + + case "$new" in + @*) ofs="$(fortinet_by2bl ${new##@})" ;; # "@" + + *@*) len="$(fortinet_by2bl ${new%%@*})" # "@" + ofs="$(fortinet_by2bl ${new##*@})" ;; + + "") ;; # "" (empty) + + *) len="$(fortinet_by2bl ${new%%@*})" ;; # "" + esac + + # print N blocks of length/offset in dec + echo "${len}@${ofs}" +} + +# Update firmware information in "firmware-info" partition +# +# parameters: +# $1: image index (0/1) +# $2: new image name (up to 32 characters) +# $3: length and/or offset for kernel (bytes) +# $4: length and/or offset for rootfs (bytes) +# +# Note: $3 and $4 support multiple formats: +# +# - @: set and +# - : set and keep the current offset +# - @ : set and keep the current length +# - "" (empty) : keep the current length and offset +fortinet_update_fwinfo() { local fwinfo_mtd="$(find_mtd_part firmware-info)" - local offset="$1" - local len="$2" - local blks + local index="$1" + local name="$2" + local offset + local old_kr + local old new tmp part pos + local output if [ -z "$fwinfo_mtd" ]; then - echo "WARN: MTD device \"firmware-info\" not found" + echo "ERROR: MTD device \"firmware-info\" not found" return 1 fi - blks=$((len / 0x200)) - [ $((len % 0x200)) -gt 0 ] && blks=$((blks + 1)) - blks=$(printf "%04x" $blks) - printf "fwinfo: offset-> 0x%x, blocks-> 0x%s (len: 0x%08x)\n" \ - $offset $blks $len + # Image Name + case "$index" in + 0) offset=0x10 ;; + 1) offset=0x30 ;; + *) echo "ERROR: invalid image index specified!"; return 1 ;; + esac + + printf "Image Index: %d\n" $index + + old="$(dd bs=16 count=2 skip=$((offset / 16)) if=$fwinfo_mtd 2>/dev/null)" + printf "Image Name : \"%s\"\n" "$old" + if [ -n "$name" ]; then + echo -n "$name" | \ + dd bs=32 count=1 oflag=seek_bytes seek=$((offset)) \ + conv=sync,notrunc of=$fwinfo_mtd 2>/dev/null + printf " --> \"%s\"\n\n" "$name" + else + printf "\n" + fi + + # length/offset values of kernel/rootfs + case "$index" in + 0) offset=0x180 ;; + 1) offset=0x190 ;; + esac + + # + old_kr="$(hexdump -n 16 -v -s $((offset)) -e '1/4 "%08x"' $fwinfo_mtd)" + + pos=0 + for part in kernel rootfs; do + old="0x${old_kr:$((8 + pos)):8}@0x${old_kr:$((0 + pos)):8}" + new="$(fortinet_build_partmap "$3" "$old")" + shift + + printf " %s:\n" $part + printf " old: 0x%08x@0x%08x\n" \ + $(fortinet_bl2by ${old%%@*}) $(fortinet_bl2by ${old##*@}) + printf " new: 0x%08x@0x%08x\n\n" \ + $(fortinet_bl2by ${new%%@*}) $(fortinet_bl2by ${new##*@}) - printf "\x${blks:2:2}\x${blks:0:2}" | \ - dd bs=2 count=1 seek=$((offset / 2)) conv=notrunc of=${fwinfo_mtd} + tmp="$(fortinet_bswap32 ${new%%@*})@$(fortinet_bswap32 ${new##*@})" + new="$(echo $tmp | sed 's/0x\([0-9a-f]\{8\}\)@0x\([0-9a-f]\{8\}\)/\2\1/')" + output="${output}${new}" + + pos=$((pos + 16)) + done + + data_2bin "$output" | \ + dd bs=16 count=1 seek=$((offset / 16)) conv=notrunc \ + of=$fwinfo_mtd 2>/dev/null } fortinet_do_upgrade() { local board_dir="$(tar tf "$1" | grep -m 1 '^sysupgrade-.*/$')" local kern_mtd="$(find_mtd_part kernel)" local root_mtd="$(find_mtd_part rootfs)" - local kern_len root_len + local kern_len kern_ofs root_len root_ofs + local imgname board_dir="${board_dir%/}" @@ -34,6 +132,14 @@ fortinet_do_upgrade() { umount -a reboot -f fi + kern_ofs=$(cat /sys/class/mtd/${kern_mtd//\/dev\/mtdblock/mtd}/offset) + root_ofs=$(cat /sys/class/mtd/${root_mtd//\/dev\/mtdblock/mtd}/offset) + + if [ -z "$kern_ofs" ] || [ -z "$root_ofs" ]; then + echo "ERROR: failed to get offset of kernel or rootfs" + umount -a + reboot -f + fi kern_len=$( (tar xOf "$1" "$board_dir/kernel" | wc -c) 2> /dev/null) root_len=$( (tar xOf "$1" "$board_dir/root" | wc -c) 2> /dev/null) @@ -44,8 +150,34 @@ fortinet_do_upgrade() { reboot -f fi - fortinet_fwinfo_blocks "0x184" "$kern_len" - fortinet_fwinfo_blocks "0x18c" "$root_len" + # try to load and parse /tmp/sysupgrade.meta for image name + if [ -r "/tmp/sysupgrade.meta" ]; then + local key value + + sed -e 's/, \{1,2\}\"/\n"/g' \ + -e 's/{ \{1,2\}/\n/g' \ + -e 's/ \{1,2\}}/\n/g' < /tmp/sysupgrade.meta \ + > /tmp/sysupgrade.meta.tmp + while read key value; do + key="${key//\"/}" + value="${value//\"/}" + + [ -z "$value" ] && continue + case "$key" in + dist:|\ + version:|\ + revision:) imgname="${imgname}$value " ;; + esac + done < /tmp/sysupgrade.meta.tmp + else + imgname="OpenWrt" + fi + + fortinet_update_fwinfo 0 "${imgname%% }" \ + "${kern_len}@${kern_ofs}" "${root_len}@${root_ofs}" || { + umount -a + reboot -f + } tar xOf "$1" "$board_dir/kernel" | \ mtd write - "kernel" diff --git a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh index a15823d8c68be7..049f8eeb8c8528 100755 --- a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh +++ b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh @@ -3,7 +3,7 @@ # Copyright (C) 2016 LEDE-Project.org # -RAMFS_COPY_BIN='fw_printenv fw_setenv strings' +RAMFS_COPY_BIN='fw_printenv fw_setenv seq strings' RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock' PART_NAME=firmware diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-3xe.dtsi b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-3xe.dtsi index 44dd42201de88a..6d835332d28742 100644 --- a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-3xe.dtsi +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-3xe.dtsi @@ -14,14 +14,14 @@ gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_SPEED_WAN; - linux,default-trigger = "mv88e6xxx-1:00:100Mbps"; + linux,default-trigger = "mv88e6xxx-0:00:100Mbps"; }; led-15 { gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_SPEED_WAN; - linux,default-trigger = "mv88e6xxx-1:00:1Gbps"; + linux,default-trigger = "mv88e6xxx-0:00:1Gbps"; }; }; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-5xe.dtsi b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-5xe.dtsi index 063632d888ba60..bf1daa3bc6025a 100644 --- a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-5xe.dtsi +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-5xe.dtsi @@ -31,7 +31,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <5>; - linux,default-trigger = "mv88e6xxx-1:00:100Mbps"; + linux,default-trigger = "mv88e6xxx-0:00:100Mbps"; }; led-17 { @@ -39,7 +39,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <5>; - linux,default-trigger = "mv88e6xxx-1:00:1Gbps"; + linux,default-trigger = "mv88e6xxx-0:00:1Gbps"; }; }; diff --git a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-xxe.dtsi b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-xxe.dtsi index ba4460fddd683e..a1adddc4e04ebb 100644 --- a/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-xxe.dtsi +++ b/target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-xxe.dtsi @@ -86,7 +86,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <4>; - linux,default-trigger = "mv88e6xxx-1:01:1Gbps"; + linux,default-trigger = "mv88e6xxx-0:01:1Gbps"; }; led-7 { @@ -94,7 +94,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <4>; - linux,default-trigger = "mv88e6xxx-1:01:100Mbps"; + linux,default-trigger = "mv88e6xxx-0:01:100Mbps"; }; led-8 { @@ -102,7 +102,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <3>; - linux,default-trigger = "mv88e6xxx-1:02:100Mbps"; + linux,default-trigger = "mv88e6xxx-0:02:100Mbps"; }; led-9 { @@ -110,7 +110,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <3>; - linux,default-trigger = "mv88e6xxx-1:02:1Gbps"; + linux,default-trigger = "mv88e6xxx-0:02:1Gbps"; }; led-10 { @@ -118,7 +118,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <1>; - linux,default-trigger = "mv88e6xxx-1:04:1Gbps"; + linux,default-trigger = "mv88e6xxx-0:04:1Gbps"; }; led-11 { @@ -126,7 +126,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <1>; - linux,default-trigger = "mv88e6xxx-1:04:100Mbps"; + linux,default-trigger = "mv88e6xxx-0:04:100Mbps"; }; led-12 { @@ -134,7 +134,7 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <2>; - linux,default-trigger = "mv88e6xxx-1:03:1Gbps"; + linux,default-trigger = "mv88e6xxx-0:03:1Gbps"; }; led-13 { @@ -142,12 +142,12 @@ color = ; function = LED_FUNCTION_SPEED_LAN; function-enumerator = <2>; - linux,default-trigger = "mv88e6xxx-1:03:100Mbps"; + linux,default-trigger = "mv88e6xxx-0:03:100Mbps"; }; }; reg_usb_vbus: regulator-usb-vbus { - compatible = "fixed-regulator"; + compatible = "regulator-fixed"; regulator-name = "usb-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; diff --git a/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts b/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts index a39455cf293f71..f20cbb4c8fc925 100644 --- a/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts +++ b/target/linux/ramips/dts/mt7620a_tplink_ec220-g5-v2.dts @@ -47,14 +47,14 @@ function = LED_FUNCTION_WLAN_2GHZ; color = ; gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy0tpt"; + linux,default-trigger = "phy1tpt"; }; led-5 { function = LED_FUNCTION_WLAN_5GHZ; color = ; gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy1tpt"; + linux,default-trigger = "phy0tpt"; }; led-6 { diff --git a/target/linux/ramips/dts/mt7621_dlink_dir-2150-r1.dts b/target/linux/ramips/dts/mt7621_dlink_dir-2150-r1.dts new file mode 100644 index 00000000000000..8a1bae328f36e9 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_dlink_dir-2150-r1.dts @@ -0,0 +1,199 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include +#include + +/ { + compatible = "dlink,dir-2150-r1", "mediatek,mt7621-soc"; + model = "D-Link DIR-2150 R1"; + + aliases { + label-mac-device = &gmac1; + led-boot = &led_power_orange; + led-failsafe = &led_power_white; + led-running = &led_power_white; + led-upgrade = &led_net_orange; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power_orange: led-0 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + + led_power_white: led-1 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + led_net_orange: led-2 { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + + led-3 { + function = LED_FUNCTION_WAN; + color = ; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Bootloader"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "config"; + reg = <0x80000 0x80000>; + read-only; + }; + + partition@100000 { + label = "factory"; + reg = <0x100000 0x40000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x400>; + }; + + eeprom_factory_8000: eeprom@8000 { + reg = <0x8000 0x4da8>; + }; + + macaddr_factory_e006: macaddr@e006 { + compatible = "mac-base"; + reg = <0xe006 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@140000 { + label = "firmware"; + compatible = "denx,uimage"; + reg = <0x140000 0x7E80000>; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_e006 2>; + nvmem-cell-names = "eeprom", "mac-address"; + ieee80211-freq-limit = <2400000 2500000>; + + led { + led-active-low; + }; + }; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_e006 4>; + nvmem-cell-names = "eeprom", "mac-address"; + ieee80211-freq-limit = <5000000 6000000>; + + led { + led-active-low; + }; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_e006 1>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + status = "okay"; + label = "wan"; + phy-handle = <ðphy4>; + + nvmem-cells = <&macaddr_factory_e006 0>; + nvmem-cell-names = "mac-address"; +}; + +ðphy4 { + /delete-property/ interrupts; +}; + +&switch0 { + ports { + port@0 { + status = "okay"; + label = "lan4"; + }; + + port@1 { + status = "okay"; + label = "lan3"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan1"; + }; + }; +}; + +&state_default { + gpio { + groups = "i2c", "uart3", "jtag", "wdt"; + function = "gpio"; + }; +}; diff --git a/target/linux/ramips/dts/mt7621_elecom_wmc-x1800gst.dts b/target/linux/ramips/dts/mt7621_elecom_wmc-x1800gst.dts new file mode 100644 index 00000000000000..36a7aee1222c08 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_elecom_wmc-x1800gst.dts @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_elecom_wxc-x1800gsx.dtsi" + +/ { + compatible = "elecom,wmc-x1800gst", "mediatek,mt7621-soc"; + model = "ELECOM WMC-X1800GST"; + + aliases { + label-mac-device = &gmac1; + }; +}; + +&keys { + switch-ap { + label = "ap"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + switch-router { + label = "router"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + switch-extender { + label = "extender"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; +}; + +&gmac1 { + status = "okay"; + label = "wan"; + phy-handle = <ðphy0>; + + nvmem-cells = <&macaddr_factory_3fffa>; + nvmem-cell-names = "mac-address"; +}; + +ðphy0 { + /delete-property/ interrupts; +}; + +&state_default { + gpio { + groups = "i2c", "uart3", "uart2", "jtag", "wdt"; + function = "gpio"; + }; +}; + +&wifi { + band@0 { + reg = <0>; + nvmem-cells = <&macaddr_factory_4 0>; + nvmem-cell-names = "mac-address"; + }; + + band@1 { + reg = <1>; + nvmem-cells = <&macaddr_factory_4 1>; + nvmem-cell-names = "mac-address"; + }; +}; diff --git a/target/linux/ramips/dts/mt7621_elecom_wsc-x1800gs.dts b/target/linux/ramips/dts/mt7621_elecom_wsc-x1800gs.dts new file mode 100644 index 00000000000000..a24edb613605e3 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_elecom_wsc-x1800gs.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_elecom_wxc-x1800gsx.dtsi" + +/ { + compatible = "elecom,wsc-x1800gs", "mediatek,mt7621-soc"; + model = "ELECOM WSC-X1800GS"; + + aliases { + label-mac-device = &wifi_band1; + }; +}; + +&state_default { + gpio { + groups = "uart3", "uart2", "jtag", "wdt"; + function = "gpio"; + }; +}; + +&wifi { + band@0 { + reg = <0>; + nvmem-cells = <&macaddr_factory_4 (-1)>; + nvmem-cell-names = "mac-address"; + }; + + wifi_band1: band@1 { + reg = <1>; + nvmem-cells = <&macaddr_factory_4 0>; + nvmem-cell-names = "mac-address"; + }; +}; diff --git a/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi b/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi new file mode 100644 index 00000000000000..2dcd664b9356e3 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_elecom_wxc-x1800gsx.dtsi @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include +#include + +/ { + aliases { + led-boot = &led_power_green; + led-failsafe = &led_power_red; + led-running = &led_power_green; + led-upgrade = &led_power_green; + }; + + chosen { + bootargs-override = "console=ttyS0,115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + }; + + led-1 { + gpios = <&gpio 6 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + linux,default-trigger = "phy1tpt"; + }; + + led_power_green: led-2 { + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led-3 { + gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_POWER; + }; + + led-4 { + gpios = <&gpio 9 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN_5GHZ; + }; + + led-5 { + gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + }; + + led-6 { + gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + }; + + led-7 { + gpios = <&gpio 12 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_WLAN_2GHZ; + linux,default-trigger = "phy0tpt"; + }; + + led_power_red: led-8 { + gpios = <&gpio 16 GPIO_ACTIVE_HIGH>; + color = ; + function = LED_FUNCTION_POWER; + }; + }; + + keys: keys { + compatible = "gpio-keys"; + + button-reset { + label = "reset"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + button-wps { + label = "wps"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_3fff4>; + nvmem-cell-names = "mac-address"; +}; + +&nand { + status = "okay"; + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "u-boot-env"; + reg = <0x80000 0x80000>; + read-only; + }; + + partition@100000 { + label = "factory"; + reg = <0x100000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0xe00>; + }; + + precal_factory_e10: precal@e10 { + reg = <0xe10 0x19c10>; + }; + + macaddr_factory_4: mac-address@4 { + compatible = "mac-base"; + reg = <0x4 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_factory_3fff4: mac-address@3fff4 { + reg = <0x3fff4 0x6>; + }; + + macaddr_factory_3fffa: mac-address@3fffa { + reg = <0x3fffa 0x6>; + }; + }; + }; + + /* stock: "firmware" */ + partition@180000 { + reg = <0x180000 0xf00000>; + label = "kernel"; + }; + + partition@1080000 { + label = "user_data"; + reg = <0x1080000 0x500000>; + read-only; + }; + + partition@1580000 { + label = "tm_pattern"; + reg = <0x1580000 0x500000>; + read-only; + }; + + partition@1a80000 { + label = "tm_key"; + reg = <0x1a80000 0x100000>; + read-only; + }; + + /* stock: (unused) */ + partition@1b80000 { + label = "ubi"; + reg = <0x1b80000 0x6480000>; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie1 { + wifi: wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_0>, <&precal_factory_e10>; + nvmem-cell-names = "eeprom", "precal"; + mediatek,disable-radar-background; + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&switch0 { + ports { + port@1 { + status = "okay"; + label = "lan2"; + }; + + port@2 { + status = "okay"; + label = "lan1"; + }; + }; +}; + +&state_default { + gpio { + groups = "i2c", "uart3", "uart2", "jtag", "wdt"; + function = "gpio"; + }; +}; + +&uartlite { + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; +}; + +&xhci { + status = "disabled"; +}; diff --git a/target/linux/ramips/dts/mt7621_ruijie_rg-ew1200g-pro-v1.1.dts b/target/linux/ramips/dts/mt7621_ruijie_rg-ew1200g-pro-v1.1.dts new file mode 100644 index 00000000000000..0223ece164edad --- /dev/null +++ b/target/linux/ramips/dts/mt7621_ruijie_rg-ew1200g-pro-v1.1.dts @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include +#include + +/ { + compatible = "ruijie,rg-ew1200g-pro-v1.1", "mediatek,mt7621-soc"; + model = "Ruijie RG-EW1200G PRO v.1.1"; + + aliases { + led-boot = &led_power_blue; + led-failsafe = &led_power_blue; + led-running = &led_power_blue; + led-upgrade = &led_power_blue; + }; + + chosen { + bootargs = "console=ttyS0,57600n8"; + }; + + leds { + compatible = "gpio-leds"; + + led_power_blue: power_blue { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x50000>; + read-only; + }; + + partition@50000 { + label = "u-boot-env"; + reg = <0x50000 0x10000>; + read-only; + }; + + partition@60000 { + label = "factory"; + reg = <0x60000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x4da8>; + }; + }; + }; + + partition@70000 { + label = "product_info"; + reg = <0x70000 0x10000>; + read-only; + }; + + partition@80000 { + label = "kdump"; + reg = <0x80000 0x10000>; + read-only; + }; + + partition@90000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x90000 0xf70000>; + }; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + }; +}; + +&switch0 { + ports { + port@0 { + status = "okay"; + label = "wan"; + }; + + port@1 { + status = "okay"; + label = "lan3"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan1"; + }; + }; +}; diff --git a/target/linux/ramips/dts/rt3883.dtsi b/target/linux/ramips/dts/rt3883.dtsi index de8964540602aa..30c09167855f88 100644 --- a/target/linux/ramips/dts/rt3883.dtsi +++ b/target/linux/ramips/dts/rt3883.dtsi @@ -51,7 +51,7 @@ compatible = "ralink,rt2880-timer"; reg = <0x100 0x20>; - clocks = <&sysc 3>; + clocks = <&sysc 4>; interrupt-parent = <&intc>; interrupts = <1>; @@ -61,7 +61,7 @@ compatible = "ralink,rt2880-wdt"; reg = <0x120 0x10>; - clocks = <&sysc 4>; + clocks = <&sysc 5>; resets = <&sysc 8>; reset-names = "wdt"; @@ -93,7 +93,7 @@ compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0x500 0x100>; - clocks = <&sysc 5>; + clocks = <&sysc 6>; resets = <&sysc 12>; @@ -170,7 +170,7 @@ compatible = "ralink,rt2880-i2c"; reg = <0x900 0x100>; - clocks = <&sysc 6>; + clocks = <&sysc 7>; resets = <&sysc 16>; reset-names = "i2c"; @@ -188,7 +188,7 @@ compatible = "ralink,rt3883-i2s"; reg = <0xa00 0x100>; - clocks = <&sysc 7>; + clocks = <&sysc 8>; resets = <&sysc 17>; reset-names = "i2s"; @@ -212,7 +212,7 @@ #address-cells = <1>; #size-cells = <0>; - clocks = <&sysc 8>; + clocks = <&sysc 9>; resets = <&sysc 18>; reset-names = "spi"; @@ -229,7 +229,7 @@ #address-cells = <1>; #size-cells = <0>; - clocks = <&sysc 9>; + clocks = <&sysc 10>; resets = <&sysc 18>; reset-names = "spi"; @@ -244,7 +244,7 @@ compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a"; reg = <0xc00 0x100>; - clocks = <&sysc 10>; + clocks = <&sysc 11>; resets = <&sysc 19>; @@ -326,7 +326,7 @@ #size-cells = <0>; reg = <0x10100000 0x10000>; - clocks = <&sysc 11>; + clocks = <&sysc 12>; resets = <&sysc 21>; reset-names = "fe"; @@ -446,7 +446,7 @@ compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac"; reg = <0x10180000 0x40000>; - clocks = <&sysc 12>; + clocks = <&sysc 13>; interrupt-parent = <&cpuintc>; interrupts = <6>; diff --git a/target/linux/ramips/dts/rt3883_belkin_f9k1109v1.dts b/target/linux/ramips/dts/rt3883_belkin_f9k1109v1.dts index 38667a5fdacba7..5547ec0f483122 100644 --- a/target/linux/ramips/dts/rt3883_belkin_f9k1109v1.dts +++ b/target/linux/ramips/dts/rt3883_belkin_f9k1109v1.dts @@ -1,8 +1,10 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT -#include +#include "rt3883.dtsi" -#include "rt3883_belkin_f9k110x.dtsi" +#include +#include +#include / { compatible = "belkin,f9k1109v1", "ralink,rt3883-soc"; @@ -71,18 +73,125 @@ linux,code = ; }; }; + + rtl8367b { + compatible = "realtek,rtl8367b"; + gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>; + gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>; + realtek,extif = <5 1 0 1 1 1 1 1 1 2>; + }; }; &ehci { + status = "okay"; + ehci_port2: port@2 { reg = <2>; #trigger-source-cells = <0>; }; }; +ðernet { + port@0 { + mediatek,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; +}; + &ohci { + status = "okay"; + ohci_port2: port@2 { reg = <2>; #trigger-source-cells = <0>; }; }; + +&pci { + status = "okay"; +}; + +&pci1 { + status = "okay"; + + wifi@0,0 { + compatible = "pci1814,3091"; + reg = <0x10000 0 0 0 0>; + nvmem-cells = <&eeprom_factory_8000>; + nvmem-cell-names = "eeprom"; + ralink,5ghz = <0>; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "uboot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x200>; + }; + + eeprom_factory_8000: eeprom@8000 { + reg = <0x8000 0x200>; + }; + }; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0x7a0000>; + }; + + partition@7f0000 { + label = "user-cfg"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&state_default { + gpio { + groups = "i2c", "jtag", "uartf"; + function = "gpio"; + }; +}; + +&wmac { + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + ralink,2ghz = <0>; +}; diff --git a/target/linux/ramips/dts/rt3883_belkin_f9k110x.dtsi b/target/linux/ramips/dts/rt3883_belkin_f9k110x.dtsi deleted file mode 100644 index 4d60bb3c05cceb..00000000000000 --- a/target/linux/ramips/dts/rt3883_belkin_f9k110x.dtsi +++ /dev/null @@ -1,120 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include "rt3883.dtsi" - -#include -#include - -/ { - compatible = "ralink,rt3883-soc"; - - rtl8367b { - compatible = "realtek,rtl8367b"; - gpio-sda = <&gpio0 1 GPIO_ACTIVE_HIGH>; - gpio-sck = <&gpio0 2 GPIO_ACTIVE_HIGH>; - realtek,extif = <5 1 0 1 1 1 1 1 1 2>; - }; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <25000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "uboot"; - reg = <0x0 0x30000>; - read-only; - }; - - partition@30000 { - label = "uboot-env"; - reg = <0x30000 0x10000>; - read-only; - }; - - partition@40000 { - label = "factory"; - reg = <0x40000 0x10000>; - read-only; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - eeprom_factory_0: eeprom@0 { - reg = <0x0 0x200>; - }; - - eeprom_factory_8000: eeprom@8000 { - reg = <0x8000 0x200>; - }; - }; - }; - - partition@50000 { - compatible = "denx,uimage"; - label = "firmware"; - reg = <0x50000 0x7a0000>; - }; - - partition@7f0000 { - label = "user-cfg"; - reg = <0x7f0000 0x10000>; - read-only; - }; - }; - }; -}; - -ðernet { - port@0 { - mediatek,fixed-link = <1000 1 1 1>; - phy-mode = "rgmii"; - }; -}; - -&state_default { - gpio { - groups = "i2c", "jtag", "uartf"; - function = "gpio"; - }; -}; - -&wmac { - nvmem-cells = <&eeprom_factory_0>; - nvmem-cell-names = "eeprom"; -}; - -&pci { - status = "okay"; -}; - -&pci1 { - status = "okay"; - - wifi@0,0 { - compatible = "pci1814,3091"; - reg = <0x10000 0 0 0 0>; - ralink,5ghz = <0>; - nvmem-cells = <&eeprom_factory_8000>; - nvmem-cell-names = "eeprom"; - }; -}; - -&ehci { - status = "okay"; -}; - -&ohci { - status = "okay"; -}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index 3f08ad1bb276a5..2932f13e99f79a 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -916,6 +916,20 @@ define Device/dlink_dir-2150-a1 endef TARGET_DEVICES += dlink_dir-2150-a1 +define Device/dlink_dir-2150-r1 + $(Device/nand) + IMAGE_SIZE := 129536k + DEVICE_VENDOR := D-Link + DEVICE_MODEL := DIR-2150 + DEVICE_VARIANT := R1 + DEVICE_PACKAGES := -uboot-envtools kmod-mt7603 kmod-mt7615-firmware kmod-usb3 + KERNEL := $$(KERNEL) + IMAGES += factory.bin + IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | \ + check-size | sign-dlink-ru e6587b35a6b34e07bedeca23e140322f +endef +TARGET_DEVICES += dlink_dir-2150-r1 + define Device/dlink_dir-2640-a1 $(Device/dlink_dir_nand_128m) DEVICE_MODEL := DIR-2640 @@ -1079,11 +1093,11 @@ define Device/dna_valokuitu-plus-ex400 DEVICE_MODEL := Valokuitu Plus EX400 KERNEL := kernel-bin | lzma | uImage lzma KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | uImage lzma - IMAGES := factory.bin sysupgrade.tar + IMAGES := factory.bin sysupgrade.bin IMAGE/factory.bin := kernel-initramfs-bin | lzma | uImage lzma | \ dna-bootfs with-initrd | dna-header | \ append-md5sum-ascii-salted - IMAGE/sysupgrade.tar := dna-bootfs | sysupgrade-tar kernel=$$$$@ | check-size | \ + IMAGE/sysupgrade.bin := dna-bootfs | sysupgrade-tar kernel=$$$$@ | check-size | \ append-metadata DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(2) DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615-firmware kmod-usb3 @@ -1164,6 +1178,24 @@ define Device/elecom_wmc-s1267gs2 endef TARGET_DEVICES += elecom_wmc-s1267gs2 +define Device/elecom_wmc-x1800gst + $(Device/nand) + DEVICE_VENDOR := ELECOM + DEVICE_MODEL := WMC-X1800GST + KERNEL_SIZE := 15360k + KERNEL_LOADADDR := 0x82000000 + KERNEL := kernel-bin | relocate-kernel $(loadaddr-y) | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb +ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),) + ARTIFACTS := initramfs-factory.bin + ARTIFACT/initramfs-factory.bin := append-image-stage initramfs-kernel.bin | \ + check-size $$$$(KERNEL_SIZE) | elecom-wrc-gs-factory WMC-2LX 0.00 -N | \ + append-string MT7621_ELECOM_WMC-2LX +endif + DEVICE_PACKAGES := kmod-mt7915-firmware -uboot-envtools +endef +TARGET_DEVICES += elecom_wmc-x1800gst + define Device/elecom_wrc-1167ghbk2-s $(Device/dsa-migration) IMAGE_SIZE := 15488k @@ -1297,6 +1329,24 @@ endif endef TARGET_DEVICES += elecom_wrc-x1800gs +define Device/elecom_wsc-x1800gs + $(Device/nand) + DEVICE_VENDOR := ELECOM + DEVICE_MODEL := WSC-X1800GS + KERNEL_SIZE := 15360k + KERNEL_LOADADDR := 0x82000000 + KERNEL := kernel-bin | relocate-kernel $(loadaddr-y) | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb +ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),) + ARTIFACTS := initramfs-factory.bin + ARTIFACT/initramfs-factory.bin := append-image-stage initramfs-kernel.bin | \ + check-size $$$$(KERNEL_SIZE) | elecom-wrc-gs-factory WMC-2LX 0.00 -N | \ + append-string MT7621_ELECOM_WMC-2LX +endif + DEVICE_PACKAGES := kmod-mt7915-firmware -uboot-envtools +endef +TARGET_DEVICES += elecom_wsc-x1800gs + define Device/etisalat_s3 $(Device/sercomm_dxx) IMAGE_SIZE := 32768k @@ -2392,6 +2442,17 @@ define Device/rostelecom_rt-sf-1 endef TARGET_DEVICES += rostelecom_rt-sf-1 +define Device/ruijie_rg-ew1200g-pro-v1.1 + $(Device/dsa-migration) + $(Device/uimage-lzma-loader) + IMAGE_SIZE := 15808k + DEVICE_VENDOR := Ruijie + DEVICE_MODEL := RG-EW1200G PRO + DEVICE_VARIANT := v1.1 + DEVICE_PACKAGES := kmod-mt7615-firmware +endef +TARGET_DEVICES += ruijie_rg-ew1200g-pro-v1.1 + define Device/samknows_whitebox-v8 $(Device/dsa-migration) $(Device/uimage-lzma-loader) @@ -2679,7 +2740,6 @@ define Device/tplink_er605-v2 KERNEL_LOADADDR := 0x82000000 KERNEL := kernel-bin | relocate-kernel $(loadaddr-y) | lzma | \ fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb - IMAGES += sysupgrade.tar IMAGE_SIZE := 127744k endef TARGET_DEVICES += tplink_er605-v2 diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds index c18724a2be54a3..9a77b1b1bc4a65 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/01_leds @@ -94,6 +94,7 @@ dlink,dap-x1860-a1) dlink,dir-1960-a1|\ dlink,dir-2055-a1|\ dlink,dir-2150-a1|\ +dlink,dir-2150-r1|\ dlink,dir-2640-a1|\ dlink,dir-2660-a1) ucidef_set_led_netdev "wan" "wan" "white:wan" "wan" diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index f251daddd5efea..f72fd46f821143 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -78,6 +78,7 @@ ramips_setup_interfaces() asiarf,ap7621-nv1|\ beeline,smartbox-flash|\ beeline,smartbox-giga|\ + elecom,wmc-x1800gst|\ elecom,wrc-x1800gs|\ glinet,gl-mt1300|\ iodata,wn-deax1800gr|\ @@ -116,6 +117,9 @@ ramips_setup_interfaces() zyxel,lte3301-plus) ucidef_set_interface_lan "lan1 lan2 lan3 lan4" ;; + elecom,wsc-x1800gs) + ucidef_set_interface_lan "lan1 lan2" + ;; gnubee,gb-pc1) ucidef_set_interface_lan "ethblack ethblue" ;; @@ -169,6 +173,9 @@ ramips_setup_interfaces() ucidef_set_interface_lan "lan1 lan2 lan3 lan4" ucidef_set_interface "qtn" ifname "eth1" protocol "static" ipaddr "1.1.1.1" netmask "255.255.255.0" ;; + ruijie,rg-ew1200g-pro-v1.1) + ucidef_set_interfaces_lan_wan "lan3 lan2 lan1" "wan" + ;; comfast,cf-e390ax|\ comfast,cf-ew72-v2|\ meig,slt866) @@ -315,6 +322,11 @@ ramips_setup_macs() wan_mac=$label_mac lan_mac=$(macaddr_add $label_mac 1) ;; + ruijie,rg-ew1200g-pro-v1.1) + lan_mac=$(mtd_get_mac_ascii product_info ethaddr) + wan_mac=$(macaddr_add "$lan_mac" 8) + label_mac=$lan_mac + ;; mts,wg430223) wan_mac=$(mtd_get_mac_encrypted_arcadyan "board_data") label_mac=$wan_mac diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index 1170790a382087..4a056623abc021 100644 --- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -193,6 +193,11 @@ case "$board" in [ "$PHYNBR" = "0" ] && \ macaddr_setbit_la "$(get_mac_label)" > /sys${DEVPATH}/macaddress ;; + ruijie,rg-ew1200g-pro-v1.1) + hw_mac_addr="$(mtd_get_mac_ascii product_info ethaddr)" + [ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress + ;; snr,snr-cpe-me2-sfp) hw_mac_addr="$(mtd_get_mac_binary factory 0x8004)" [ "$PHYNBR" = "1" ] && echo -n "$hw_mac_addr" > /sys${DEVPATH}/macaddress diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh index eb0d54c6b55f9c..97887ca8c31b80 100755 --- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh @@ -85,11 +85,14 @@ platform_do_upgrade() { dlink,dir-1960-a1|\ dlink,dir-2055-a1|\ dlink,dir-2150-a1|\ + dlink,dir-2150-r1|\ dlink,dir-2640-a1|\ dlink,dir-2660-a1|\ dlink,dir-3040-a1|\ dlink,dir-3060-a1|\ dlink,dir-853-a3|\ + elecom,wmc-x1800gst|\ + elecom,wsc-x1800gs|\ etisalat,s3|\ h3c,tx1800-plus|\ h3c,tx1801-plus|\ diff --git a/target/linux/ramips/patches-6.6/100-clk-ralink-mtmips-fix-clock-plan-for-Ralink-SoC-RT3883.patch b/target/linux/ramips/patches-6.6/100-clk-ralink-mtmips-fix-clock-plan-for-Ralink-SoC-RT3883.patch new file mode 100644 index 00000000000000..a3d58b78f6de73 --- /dev/null +++ b/target/linux/ramips/patches-6.6/100-clk-ralink-mtmips-fix-clock-plan-for-Ralink-SoC-RT3883.patch @@ -0,0 +1,45 @@ +Subject: [PATCH] clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883 +Date: Tue, 6 Aug 2024 16:29:02 +0200 +Message-Id: <20240806142902.224164-1-sergio.paracuellos@gmail.com> + +Clock plan for Ralink SoC RT3883 needs an extra 'periph' clock to properly +set some peripherals that has this clock as their parent. When this driver +was mainlined we could not find any active users of this SoC so we cannot +perform any real tests for it. Now, one user of a Belkin f9k1109 version 1 +device which uses this SoC appear and reported some issues in openWRT: +- https://github.com/openwrt/openwrt/issues/16054 +The peripherals that are wrong are 'uart', 'i2c', 'i2s' and 'uartlite' which +has a not defined 'periph' clock as parent. Hence, introduce it to have a +properly working clock plan for this SoC. + +Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs") +Signed-off-by: Sergio Paracuellos +--- + drivers/clk/ralink/clk-mtmips.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/clk/ralink/clk-mtmips.c ++++ b/drivers/clk/ralink/clk-mtmips.c +@@ -267,6 +267,11 @@ static struct mtmips_clk_fixed rt305x_fi + CLK_FIXED("xtal", NULL, 40000000) + }; + ++static struct mtmips_clk_fixed rt3383_fixed_clocks[] = { ++ CLK_FIXED("xtal", NULL, 40000000), ++ CLK_FIXED("periph", "xtal", 40000000) ++}; ++ + static struct mtmips_clk_fixed rt3352_fixed_clocks[] = { + CLK_FIXED("periph", "xtal", 40000000) + }; +@@ -779,8 +784,8 @@ static const struct mtmips_clk_data rt33 + static const struct mtmips_clk_data rt3883_clk_data = { + .clk_base = rt3883_clks_base, + .num_clk_base = ARRAY_SIZE(rt3883_clks_base), +- .clk_fixed = rt305x_fixed_clocks, +- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks), ++ .clk_fixed = rt3383_fixed_clocks, ++ .num_clk_fixed = ARRAY_SIZE(rt3383_fixed_clocks), + .clk_factor = NULL, + .num_clk_factor = 0, + .clk_periph = rt5350_pherip_clks, diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index 6f6dfbf73ebe3f..e28069cf7bb197 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -13,6 +13,7 @@ friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r4s|\ friendlyarm,nanopi-r4s-enterprise|\ +friendlyarm,nanopi-r6c|\ xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus-lts) ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0" @@ -29,9 +30,9 @@ friendlyarm,nanopi-r5s) ucidef_set_led_netdev "lan2" "LAN2" "green:lan-2" "eth2" ;; friendlyarm,nanopi-r6s) - ucidef_set_led_netdev "wan" "WAN" "wan_led" "eth1" - ucidef_set_led_netdev "lan1" "LAN1" "lan1_led" "eth2" - ucidef_set_led_netdev "lan2" "LAN2" "lan2_led" "eth0" + ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1" + ucidef_set_led_netdev "lan1" "LAN1" "green:lan-1" "eth2" + ucidef_set_led_netdev "lan2" "LAN2" "green:lan-2" "eth0" ;; esac diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index 078ecfaabe2fc2..192b825244da4e 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -7,22 +7,24 @@ rockchip_setup_interfaces() local board="$1" case "$board" in - friendlyarm,nanopc-t6|\ - friendlyarm,nanopi-r5c|\ - radxa,e25|\ - radxa,rock-3b) - ucidef_set_interfaces_lan_wan 'eth0' 'eth1' - ;; + armsom,sige7|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2c-plus|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r4s|\ friendlyarm,nanopi-r4s-enterprise|\ + friendlyarm,nanopi-r6c|\ radxa,rockpi-e|\ xunlong,orangepi-r1-plus|\ xunlong,orangepi-r1-plus-lts) ucidef_set_interfaces_lan_wan 'eth1' 'eth0' ;; + friendlyarm,nanopc-t6|\ + friendlyarm,nanopi-r5c|\ + radxa,e25|\ + radxa,rock-3b) + ucidef_set_interfaces_lan_wan 'eth0' 'eth1' + ;; friendlyarm,nanopi-r5s) ucidef_set_interfaces_lan_wan 'eth1 eth2' 'eth0' ;; @@ -46,6 +48,7 @@ rockchip_setup_macs() local label_mac="" case "$board" in + armsom,sige7|\ friendlyarm,nanopc-t6|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2s) @@ -64,6 +67,7 @@ rockchip_setup_macs() lan_mac=$(macaddr_setbit_la "$wan_mac") ;; friendlyarm,nanopi-r5c|\ + friendlyarm,nanopi-r6c|\ friendlyarm,nanopi-r6s) wan_mac=$(macaddr_generate_from_mmc_cid mmcblk*) lan_mac=$(macaddr_add "$wan_mac" 1) diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index db1bb2ba65c7ef..f65d008ef4127a 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -29,8 +29,10 @@ set_interface_core() { } case "$(board_name)" in +armsom,sige7|\ friendlyarm,nanopc-t6|\ friendlyarm,nanopi-r5c|\ +friendlyarm,nanopi-r6c|\ radxa,e25|\ sinovoip,rk3568-bpi-r2pro) set_interface_core 2 "eth0" diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 8bbdf0b3d747b2..39eb3bb0343d10 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -5,6 +5,17 @@ # FIT will be loaded at 0x02080000. Leave 16M for that, align it to 2M and load the kernel after it. KERNEL_LOADADDR := 0x03200000 +define Device/armsom_sige7 + DEVICE_VENDOR := ArmSoM + DEVICE_MODEL := Sige7 + DEVICE_ALT0_VENDOR := Bananapi + DEVICE_ALT0_MODEL := BPi-M7 + SOC := rk3588 + DEVICE_DTS := rockchip/rk3588-armsom-sige7 + DEVICE_PACKAGES := kmod-r8169 +endef +TARGET_DEVICES += armsom_sige7 + define Device/firefly_roc-rk3328-cc DEVICE_VENDOR := Firefly DEVICE_MODEL := ROC-RK3328-CC @@ -89,6 +100,14 @@ define Device/friendlyarm_nanopi-r5s endef TARGET_DEVICES += friendlyarm_nanopi-r5s +define Device/friendlyarm_nanopi-r6c + DEVICE_VENDOR := FriendlyARM + DEVICE_MODEL := NanoPi R6C + SOC := rk3588s + DEVICE_PACKAGES := kmod-r8169 +endef +TARGET_DEVICES += friendlyarm_nanopi-r6c + define Device/friendlyarm_nanopi-r6s DEVICE_VENDOR := FriendlyARM DEVICE_MODEL := NanoPi R6S diff --git a/target/linux/rockchip/patches-6.6/054-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6C.patch b/target/linux/rockchip/patches-6.6/054-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6C.patch new file mode 100644 index 00000000000000..7e2b083cf8d076 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/054-v6.9-arm64-dts-rockchip-Add-support-for-NanoPi-R6C.patch @@ -0,0 +1,42 @@ +From d5f1d7437451dbd86a91747793ecd7842e0ce88f Mon Sep 17 00:00:00 2001 +From: Muhammed Efe Cetin +Date: Sat, 30 Dec 2023 14:18:01 +0300 +Subject: [PATCH] arm64: dts: rockchip: Add support for NanoPi R6C + +NanoPi R6C is mostly same as R6S variant. It has M2 port instead of a +NIC port and different led labeling. + +Signed-off-by: Muhammed Efe Cetin +Link: https://lore.kernel.org/r/0f9ee0baa6c9de4d54dd6d13957ca15a63ec934f.1703934548.git.efectn@protonmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts | 14 ++++++++++++++ + 2 files changed, 15 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -109,4 +109,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ro + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include "rk3588s-nanopi-r6s.dts" ++ ++/ { ++ model = "FriendlyElec NanoPi R6C"; ++ compatible = "friendlyarm,nanopi-r6c", "rockchip,rk3588s"; ++}; ++ ++&lan2_led { ++ label = "user_led"; ++}; diff --git a/target/linux/rockchip/patches-6.6/055-01-v6.8-arm64-dts-rockchip-Support-poweroff-on-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-01-v6.8-arm64-dts-rockchip-Support-poweroff-on-NanoPC-T6.patch new file mode 100644 index 00000000000000..e8c9924e863a35 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-01-v6.8-arm64-dts-rockchip-Support-poweroff-on-NanoPC-T6.patch @@ -0,0 +1,26 @@ +From c699fbfdfd54630fc51b96da577f02e7b772eb37 Mon Sep 17 00:00:00 2001 +From: Hugh Cole-Baker +Date: Sat, 16 Dec 2023 21:21:34 +0000 +Subject: [PATCH] arm64: dts: rockchip: Support poweroff on NanoPC-T6 + +The RK806 on the NanoPC-T6 can be used to power on/off the whole board. +Mark it as the system power controller. + +Signed-off-by: Hugh Cole-Baker +Link: https://lore.kernel.org/r/20231216212134.23314-1-sigmaris@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -569,6 +569,8 @@ + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + ++ system-power-controller; ++ + vcc1-supply = <&vcc4v0_sys>; + vcc2-supply = <&vcc4v0_sys>; + vcc3-supply = <&vcc4v0_sys>; diff --git a/target/linux/rockchip/patches-6.6/055-02-v6.9-arm64-dts-rockchip-nanopc-t6-sdmmc-beautification.patch b/target/linux/rockchip/patches-6.6/055-02-v6.9-arm64-dts-rockchip-nanopc-t6-sdmmc-beautification.patch new file mode 100644 index 00000000000000..3f5dd481c960fa --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-02-v6.9-arm64-dts-rockchip-nanopc-t6-sdmmc-beautification.patch @@ -0,0 +1,33 @@ +From 9e1faff1cbc877903d019a7943d37ddc5042704d Mon Sep 17 00:00:00 2001 +From: John Clark +Date: Thu, 28 Dec 2023 17:29:35 +0000 +Subject: [PATCH] arm64: dts: rockchip: nanopc-t6 sdmmc beautification + +drop max-frequency = <200000000> as it is already defined in rk3588s.dtsi +order no-sdio & no-mmc properties while we are here + +Signed-off-by: John Clark +Link: https://lore.kernel.org/r/20231228173011.2863-1-inindev@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -536,13 +536,12 @@ + }; + + &sdmmc { +- max-frequency = <200000000>; +- no-sdio; +- no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; ++ no-mmc; ++ no-sdio; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; diff --git a/target/linux/rockchip/patches-6.6/055-03-v6.9-arm64-dts-rockchip-correct-gpio_pwrctrl1-typo-on-nanopc-t.patch b/target/linux/rockchip/patches-6.6/055-03-v6.9-arm64-dts-rockchip-correct-gpio_pwrctrl1-typo-on-nanopc-t.patch new file mode 100644 index 00000000000000..beab9154f8534d --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-03-v6.9-arm64-dts-rockchip-correct-gpio_pwrctrl1-typo-on-nanopc-t.patch @@ -0,0 +1,26 @@ +From 24559788384916041a0bbf54c32e2a16b612d247 Mon Sep 17 00:00:00 2001 +From: John Clark +Date: Mon, 25 Dec 2023 22:32:16 +0000 +Subject: [PATCH] arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6 + +Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and +gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1. + +Signed-off-by: John Clark +Link: https://lore.kernel.org/r/20231225223226.17690-1-inindev@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -590,7 +590,7 @@ + #gpio-cells = <2>; + + rk806_dvs1_null: dvs1-null-pins { +- pins = "gpio_pwrctrl2"; ++ pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + diff --git a/target/linux/rockchip/patches-6.6/055-04-v6.9-arm64-dts-rockchip-enable-NanoPC-T6-MiniPCIe-power.patch b/target/linux/rockchip/patches-6.6/055-04-v6.9-arm64-dts-rockchip-enable-NanoPC-T6-MiniPCIe-power.patch new file mode 100644 index 00000000000000..1126bc3d383941 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-04-v6.9-arm64-dts-rockchip-enable-NanoPC-T6-MiniPCIe-power.patch @@ -0,0 +1,57 @@ +From d235e65adf00f6db09331874c5a987b7fe18023b Mon Sep 17 00:00:00 2001 +From: Hugh Cole-Baker +Date: Tue, 9 Jan 2024 20:27:28 +0000 +Subject: [PATCH] arm64: dts: rockchip: enable NanoPC-T6 MiniPCIe power + +The NanoPC-T6 has a Mini PCIe slot intended to be used for a 4G or LTE +modem. This slot has no PCIe functionality, only USB 2.0 pins are wired +to the SoC, and USIM pins are wired to a SIM card slot on the board. +Define the 3.3v supply for the slot so it can be used. + +Signed-off-by: Hugh Cole-Baker +Link: https://lore.kernel.org/r/20240109202729.54292-1-sigmaris@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -159,6 +159,18 @@ + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; ++ ++ vdd_4g_3v3: vdd-4g-3v3-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pin_4g_lte_pwren>; ++ regulator-name = "vdd_4g_3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; + }; + + &combphy0_ps { +@@ -504,6 +516,10 @@ + }; + + usb { ++ pin_4g_lte_pwren: 4g-lte-pwren { ++ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ + typec5v_pwren: typec5v-pwren { + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; +@@ -884,6 +900,7 @@ + }; + + &u2phy2_host { ++ phy-supply = <&vdd_4g_3v3>; + status = "okay"; + }; + diff --git a/target/linux/rockchip/patches-6.6/055-05-v6.9-arm64-dts-rockchip-add-sdmmc-card-detect-to-the-nanopc-t6.patch b/target/linux/rockchip/patches-6.6/055-05-v6.9-arm64-dts-rockchip-add-sdmmc-card-detect-to-the-nanopc-t6.patch new file mode 100644 index 00000000000000..3709c10528e88d --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-05-v6.9-arm64-dts-rockchip-add-sdmmc-card-detect-to-the-nanopc-t6.patch @@ -0,0 +1,25 @@ +From d8bb6c2311b6b2aad11b937f96db1d6c3393246a Mon Sep 17 00:00:00 2001 +From: John Clark +Date: Sat, 30 Dec 2023 11:50:53 -0500 +Subject: [PATCH] arm64: dts: rockchip: add sdmmc card detect to the nanopc-t6 + +The nanopc-t6 has an sdmmc card detect connected to gpio0_a4 which is +active low. + +Signed-off-by: John Clark +Link: https://lore.kernel.org/r/20231230165053.3781-1-inindev@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -555,6 +555,7 @@ + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; ++ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + no-mmc; + no-sdio; diff --git a/target/linux/rockchip/patches-6.6/055-06-v6.9-arm64-dts-rockchip-fix-nanopc-t6-sdmmc-regulator.patch b/target/linux/rockchip/patches-6.6/055-06-v6.9-arm64-dts-rockchip-fix-nanopc-t6-sdmmc-regulator.patch new file mode 100644 index 00000000000000..1c17bc638fd462 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-06-v6.9-arm64-dts-rockchip-fix-nanopc-t6-sdmmc-regulator.patch @@ -0,0 +1,44 @@ +From 6cb02674a061e4ef4f437ab60c91038d4c0d85ef Mon Sep 17 00:00:00 2001 +From: John Clark +Date: Tue, 2 Jan 2024 02:40:53 +0000 +Subject: [PATCH] arm64: dts: rockchip: fix nanopc-t6 sdmmc regulator + +sdmmc on the nanopc-t6 is powered by vcc3v3_sd_s0, not vcc_3v3_s3 +add the vcc3v3_sd_s0 regulator, and control it with gpio4_a5 + +Signed-off-by: John Clark +Link: https://lore.kernel.org/r/20240102024054.1030313-1-inindev@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -160,6 +160,17 @@ + vin-supply = <&vcc5v0_sys>; + }; + ++ vcc3v3_sd_s0: vcc3v3-sd-s0-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-low; ++ gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; ++ regulator-boot-on; ++ regulator-max-microvolt = <3300000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-name = "vcc3v3_sd_s0"; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ + vdd_4g_3v3: vdd-4g-3v3-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -560,7 +571,7 @@ + no-mmc; + no-sdio; + sd-uhs-sdr104; +- vmmc-supply = <&vcc_3v3_s3>; ++ vmmc-supply = <&vcc3v3_sd_s0>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; + }; diff --git a/target/linux/rockchip/patches-6.6/055-08-v6.12-arm64-dts-rockchip-prepare-NanoPC-T6-for-LTS-board.patch b/target/linux/rockchip/patches-6.6/055-08-v6.12-arm64-dts-rockchip-prepare-NanoPC-T6-for-LTS-board.patch new file mode 100644 index 00000000000000..415c34fff6c39f --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-08-v6.12-arm64-dts-rockchip-prepare-NanoPC-T6-for-LTS-board.patch @@ -0,0 +1,1916 @@ +From d14f3a4f1feabb6bb5935bf3b275a1e6bf2208eb Mon Sep 17 00:00:00 2001 +From: Marcin Juszkiewicz +Date: Thu, 29 Aug 2024 14:26:53 +0200 +Subject: [PATCH] arm64: dts: rockchip: prepare NanoPC-T6 for LTS board + +FriendlyELEC introduced a second version of NanoPC-T6 SBC. + +Create common include file and make NanoPC-T6 use it. Following +patches will add LTS version. + +Signed-off-by: Marcin Juszkiewicz +Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org +Signed-off-by: Heiko Stuebner +--- + .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 932 +---------------- + .../boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 945 ++++++++++++++++++ + 2 files changed, 947 insertions(+), 930 deletions(-) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -2,944 +2,16 @@ + /* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 Thomas McKahan ++ * Copyright (c) 2024 Linaro Ltd. + * + */ + + /dts-v1/; + +-#include +-#include +-#include +-#include "rk3588.dtsi" ++#include "rk3588-nanopc-t6.dtsi" + + / { + model = "FriendlyElec NanoPC-T6"; + compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; + +- aliases { +- mmc0 = &sdhci; +- mmc1 = &sdmmc; +- }; +- +- chosen { +- stdout-path = "serial2:1500000n8"; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- sys_led: led-0 { +- gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; +- label = "system-led"; +- linux,default-trigger = "heartbeat"; +- pinctrl-names = "default"; +- pinctrl-0 = <&sys_led_pin>; +- }; +- +- usr_led: led-1 { +- gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; +- label = "user-led"; +- pinctrl-names = "default"; +- pinctrl-0 = <&usr_led_pin>; +- }; +- }; +- +- sound { +- compatible = "simple-audio-card"; +- pinctrl-names = "default"; +- pinctrl-0 = <&hp_det>; +- +- simple-audio-card,name = "realtek,rt5616-codec"; +- simple-audio-card,format = "i2s"; +- simple-audio-card,mclk-fs = <256>; +- +- simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; +- simple-audio-card,hp-pin-name = "Headphones"; +- +- simple-audio-card,widgets = +- "Headphone", "Headphones", +- "Microphone", "Microphone Jack"; +- simple-audio-card,routing = +- "Headphones", "HPOL", +- "Headphones", "HPOR", +- "MIC1", "Microphone Jack", +- "Microphone Jack", "micbias1"; +- +- simple-audio-card,cpu { +- sound-dai = <&i2s0_8ch>; +- }; +- simple-audio-card,codec { +- sound-dai = <&rt5616>; +- }; +- }; +- +- vcc12v_dcin: vcc12v-dcin-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc12v_dcin"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <12000000>; +- regulator-max-microvolt = <12000000>; +- }; +- +- /* vcc5v0_sys powers peripherals */ +- vcc5v0_sys: vcc5v0-sys-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc5v0_sys"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc12v_dcin>; +- }; +- +- /* vcc4v0_sys powers the RK806, RK860's */ +- vcc4v0_sys: vcc4v0-sys-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc4v0_sys"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <4000000>; +- regulator-max-microvolt = <4000000>; +- vin-supply = <&vcc12v_dcin>; +- }; +- +- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc-1v1-nldo-s3"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1100000>; +- regulator-max-microvolt = <1100000>; +- vin-supply = <&vcc4v0_sys>; +- }; +- +- vcc_3v3_pcie20: vcc3v3-pcie20-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc_3v3_pcie20"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vcc_3v3_s3>; +- }; +- +- vbus5v0_typec: vbus5v0-typec-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&typec5v_pwren>; +- regulator-name = "vbus5v0_typec"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc5v0_sys>; +- }; +- +- vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pcie_m2_1_pwren>; +- regulator-name = "vcc3v3_pcie2x1l0"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vcc5v0_sys>; +- }; +- +- vcc3v3_pcie30: vcc3v3-pcie30-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pcie_m2_0_pwren>; +- regulator-name = "vcc3v3_pcie30"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vcc5v0_sys>; +- }; +- +- vcc3v3_sd_s0: vcc3v3-sd-s0-regulator { +- compatible = "regulator-fixed"; +- enable-active-low; +- gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; +- regulator-boot-on; +- regulator-max-microvolt = <3300000>; +- regulator-min-microvolt = <3300000>; +- regulator-name = "vcc3v3_sd_s0"; +- vin-supply = <&vcc_3v3_s3>; +- }; +- +- vdd_4g_3v3: vdd-4g-3v3-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pin_4g_lte_pwren>; +- regulator-name = "vdd_4g_3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vcc5v0_sys>; +- }; +-}; +- +-&combphy0_ps { +- status = "okay"; +-}; +- +-&combphy1_ps { +- status = "okay"; +-}; +- +-&combphy2_psu { +- status = "okay"; +-}; +- +-&cpu_l0 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&cpu_l1 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&cpu_l2 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&cpu_l3 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&cpu_b0{ +- cpu-supply = <&vdd_cpu_big0_s0>; +-}; +- +-&cpu_b1{ +- cpu-supply = <&vdd_cpu_big0_s0>; +-}; +- +-&cpu_b2{ +- cpu-supply = <&vdd_cpu_big1_s0>; +-}; +- +-&cpu_b3{ +- cpu-supply = <&vdd_cpu_big1_s0>; +-}; +- +-&gpio0 { +- gpio-line-names = /* GPIO0 A0-A7 */ +- "", "", "", "", +- "", "", "", "", +- /* GPIO0 B0-B7 */ +- "", "", "", "", +- "", "", "", "", +- /* GPIO0 C0-C7 */ +- "", "", "", "", +- "HEADER_10", "HEADER_08", "HEADER_32", "", +- /* GPIO0 D0-D7 */ +- "", "", "", "", +- "", "", "", ""; +-}; +- +-&gpio1 { +- gpio-line-names = /* GPIO1 A0-A7 */ +- "HEADER_27", "HEADER_28", "", "", +- "", "", "", "HEADER_15", +- /* GPIO1 B0-B7 */ +- "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", +- "HEADER_24", "HEADER_22", "", "", +- /* GPIO1 C0-C7 */ +- "", "", "", "", +- "", "", "", "", +- /* GPIO1 D0-D7 */ +- "", "", "", "", +- "", "", "HEADER_05", "HEADER_03"; +-}; +- +-&gpio2 { +- gpio-line-names = /* GPIO2 A0-A7 */ +- "", "", "", "", +- "", "", "", "", +- /* GPIO2 B0-B7 */ +- "", "", "", "", +- "", "", "", "", +- /* GPIO2 C0-C7 */ +- "", "CSI1_11", "CSI1_12", "", +- "", "", "", "", +- /* GPIO2 D0-D7 */ +- "", "", "", "", +- "", "", "", ""; +-}; +- +-&gpio3 { +- gpio-line-names = /* GPIO3 A0-A7 */ +- "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", +- "HEADER_37", "", "DSI0_12", "", +- /* GPIO3 B0-B7 */ +- "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", +- "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", +- /* GPIO3 C0-C7 */ +- "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", +- "", "", "", "", +- /* GPIO3 D0-D7 */ +- "", "", "", "", +- "", "DSI1_10", "", ""; +-}; +- +-&gpio4 { +- gpio-line-names = /* GPIO4 A0-A7 */ +- "DSI1_08", "DSI1_14", "", "DSI1_12", +- "", "", "", "", +- /* GPIO4 B0-B7 */ +- "", "", "", "", +- "", "", "", "", +- /* GPIO4 C0-C7 */ +- "", "", "", "", +- "CSI0_11", "CSI0_12", "", "", +- /* GPIO4 D0-D7 */ +- "", "", "", "", +- "", "", "", ""; +-}; +- +-&i2c0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0m2_xfer>; +- status = "okay"; +- +- vdd_cpu_big0_s0: regulator@42 { +- compatible = "rockchip,rk8602"; +- reg = <0x42>; +- fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_cpu_big0_s0"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <1050000>; +- regulator-ramp-delay = <2300>; +- vin-supply = <&vcc4v0_sys>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_cpu_big1_s0: regulator@43 { +- compatible = "rockchip,rk8603", "rockchip,rk8602"; +- reg = <0x43>; +- fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_cpu_big1_s0"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <1050000>; +- regulator-ramp-delay = <2300>; +- vin-supply = <&vcc4v0_sys>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +-}; +- +-&i2c2 { +- status = "okay"; +- +- vdd_npu_s0: regulator@42 { +- compatible = "rockchip,rk8602"; +- reg = <0x42>; +- rockchip,suspend-voltage-selector = <1>; +- regulator-name = "vdd_npu_s0"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-ramp-delay = <2300>; +- vin-supply = <&vcc4v0_sys>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +-}; +- +-&i2c6 { +- clock-frequency = <200000>; +- status = "okay"; +- +- fusb302: typec-portc@22 { +- compatible = "fcs,fusb302"; +- reg = <0x22>; +- interrupt-parent = <&gpio0>; +- interrupts = ; +- pinctrl-0 = <&usbc0_int>; +- pinctrl-names = "default"; +- vbus-supply = <&vbus5v0_typec>; +- +- connector { +- compatible = "usb-c-connector"; +- data-role = "dual"; +- label = "USB-C"; +- power-role = "dual"; +- try-power-role = "sink"; +- source-pdos = ; +- sink-pdos = ; +- op-sink-microwatt = <1000000>; +- }; +- }; +- +- hym8563: rtc@51 { +- compatible = "haoyu,hym8563"; +- reg = <0x51>; +- #clock-cells = <0>; +- clock-output-names = "hym8563"; +- pinctrl-names = "default"; +- pinctrl-0 = <&hym8563_int>; +- interrupt-parent = <&gpio0>; +- interrupts = ; +- wakeup-source; +- }; +-}; +- +-&i2c7 { +- clock-frequency = <200000>; +- status = "okay"; +- +- rt5616: codec@1b { +- compatible = "realtek,rt5616"; +- reg = <0x1b>; +- clocks = <&cru I2S0_8CH_MCLKOUT>; +- clock-names = "mclk"; +- #sound-dai-cells = <0>; +- assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; +- assigned-clock-rates = <12288000>; +- +- port { +- rt5616_p0_0: endpoint { +- remote-endpoint = <&i2s0_8ch_p0_0>; +- }; +- }; +- }; +- +- /* connected with MIPI-CSI1 */ +-}; +- +-&i2c8 { +- pinctrl-0 = <&i2c8m2_xfer>; +-}; +- +-&i2s0_8ch { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2s0_lrck +- &i2s0_mclk +- &i2s0_sclk +- &i2s0_sdi0 +- &i2s0_sdo0>; +- status = "okay"; +- +- i2s0_8ch_p0: port { +- i2s0_8ch_p0_0: endpoint { +- dai-format = "i2s"; +- mclk-fs = <256>; +- remote-endpoint = <&rt5616_p0_0>; +- }; +- }; +-}; +- +-&pcie2x1l0 { +- reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc_3v3_pcie20>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pcie2_0_rst>; +- status = "okay"; +-}; +- +-&pcie2x1l1 { +- reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pcie2_1_rst>; +- status = "okay"; +-}; +- +-&pcie2x1l2 { +- reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc_3v3_pcie20>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pcie2_2_rst>; +- status = "okay"; +-}; +- +-&pcie30phy { +- status = "okay"; +-}; +- +-&pcie3x4 { +- reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc3v3_pcie30>; +- status = "okay"; +-}; +- +-&pinctrl { +- gpio-leds { +- sys_led_pin: sys-led-pin { +- rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- usr_led_pin: usr-led-pin { +- rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- +- headphone { +- hp_det: hp-det { +- rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- +- hym8563 { +- hym8563_int: hym8563-int { +- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- }; +- +- pcie { +- pcie2_0_rst: pcie2-0-rst { +- rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- pcie2_1_rst: pcie2-1-rst { +- rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- pcie2_2_rst: pcie2-2-rst { +- rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- pcie_m2_0_pwren: pcie-m20-pwren { +- rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- pcie_m2_1_pwren: pcie-m21-pwren { +- rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- +- usb { +- pin_4g_lte_pwren: 4g-lte-pwren { +- rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- typec5v_pwren: typec5v-pwren { +- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- usbc0_int: usbc0-int { +- rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- }; +-}; +- +-&pwm1 { +- pinctrl-0 = <&pwm1m1_pins>; +- status = "okay"; +-}; +- +-&saradc { +- vref-supply = <&avcc_1v8_s0>; +- status = "okay"; +-}; +- +-&sdhci { +- bus-width = <8>; +- no-sdio; +- no-sd; +- non-removable; +- max-frequency = <200000000>; +- mmc-hs400-1_8v; +- mmc-hs400-enhanced-strobe; +- status = "okay"; +-}; +- +-&sdmmc { +- bus-width = <4>; +- cap-mmc-highspeed; +- cap-sd-highspeed; +- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; +- disable-wp; +- no-mmc; +- no-sdio; +- sd-uhs-sdr104; +- vmmc-supply = <&vcc3v3_sd_s0>; +- vqmmc-supply = <&vccio_sd_s0>; +- status = "okay"; +-}; +- +-&spi2 { +- status = "okay"; +- assigned-clocks = <&cru CLK_SPI2>; +- assigned-clock-rates = <200000000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; +- num-cs = <1>; +- +- pmic@0 { +- compatible = "rockchip,rk806"; +- spi-max-frequency = <1000000>; +- reg = <0x0>; +- +- interrupt-parent = <&gpio0>; +- interrupts = <7 IRQ_TYPE_LEVEL_LOW>; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, +- <&rk806_dvs2_null>, <&rk806_dvs3_null>; +- +- system-power-controller; +- +- vcc1-supply = <&vcc4v0_sys>; +- vcc2-supply = <&vcc4v0_sys>; +- vcc3-supply = <&vcc4v0_sys>; +- vcc4-supply = <&vcc4v0_sys>; +- vcc5-supply = <&vcc4v0_sys>; +- vcc6-supply = <&vcc4v0_sys>; +- vcc7-supply = <&vcc4v0_sys>; +- vcc8-supply = <&vcc4v0_sys>; +- vcc9-supply = <&vcc4v0_sys>; +- vcc10-supply = <&vcc4v0_sys>; +- vcc11-supply = <&vcc_2v0_pldo_s3>; +- vcc12-supply = <&vcc4v0_sys>; +- vcc13-supply = <&vcc_1v1_nldo_s3>; +- vcc14-supply = <&vcc_1v1_nldo_s3>; +- vcca-supply = <&vcc4v0_sys>; +- +- gpio-controller; +- #gpio-cells = <2>; +- +- rk806_dvs1_null: dvs1-null-pins { +- pins = "gpio_pwrctrl1"; +- function = "pin_fun0"; +- }; +- +- rk806_dvs2_null: dvs2-null-pins { +- pins = "gpio_pwrctrl2"; +- function = "pin_fun0"; +- }; +- +- rk806_dvs3_null: dvs3-null-pins { +- pins = "gpio_pwrctrl3"; +- function = "pin_fun0"; +- }; +- +- regulators { +- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_gpu_s0"; +- regulator-enable-ramp-delay = <400>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_cpu_lit_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_log_s0: dcdc-reg3 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <675000>; +- regulator-max-microvolt = <750000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_log_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <750000>; +- }; +- }; +- +- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-init-microvolt = <750000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_vdenc_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_ddr_s0: dcdc-reg5 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <675000>; +- regulator-max-microvolt = <900000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_ddr_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <850000>; +- }; +- }; +- +- vdd2_ddr_s3: dcdc-reg6 { +- regulator-always-on; +- regulator-boot-on; +- regulator-name = "vdd2_ddr_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- }; +- }; +- +- vcc_2v0_pldo_s3: dcdc-reg7 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <2000000>; +- regulator-max-microvolt = <2000000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_2v0_pldo_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <2000000>; +- }; +- }; +- +- vcc_3v3_s3: dcdc-reg8 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-name = "vcc_3v3_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <3300000>; +- }; +- }; +- +- vddq_ddr_s0: dcdc-reg9 { +- regulator-always-on; +- regulator-boot-on; +- regulator-name = "vddq_ddr_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vcc_1v8_s3: dcdc-reg10 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "vcc_1v8_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- avcc_1v8_s0: pldo-reg1 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "avcc_1v8_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vcc_1v8_s0: pldo-reg2 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "vcc_1v8_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- avdd_1v2_s0: pldo-reg3 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; +- regulator-name = "avdd_1v2_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vcc_3v3_s0: pldo-reg4 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vcc_3v3_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vccio_sd_s0: pldo-reg5 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vccio_sd_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- pldo6_s3: pldo-reg6 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "pldo6_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- vdd_0v75_s3: nldo-reg1 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <750000>; +- regulator-name = "vdd_0v75_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <750000>; +- }; +- }; +- +- vdd_ddr_pll_s0: nldo-reg2 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <850000>; +- regulator-max-microvolt = <850000>; +- regulator-name = "vdd_ddr_pll_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <850000>; +- }; +- }; +- +- avdd_0v75_s0: nldo-reg3 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <750000>; +- regulator-name = "avdd_0v75_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_0v85_s0: nldo-reg4 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <850000>; +- regulator-max-microvolt = <850000>; +- regulator-name = "vdd_0v85_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_0v75_s0: nldo-reg5 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <750000>; +- regulator-name = "vdd_0v75_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- }; +- }; +-}; +- +-&tsadc { +- status = "okay"; +-}; +- +-&uart2 { +- pinctrl-0 = <&uart2m0_xfer>; +- status = "okay"; +-}; +- +-&u2phy2_host { +- phy-supply = <&vdd_4g_3v3>; +- status = "okay"; +-}; +- +-&u2phy3_host { +- status = "okay"; +-}; +- +-&u2phy2 { +- status = "okay"; +-}; +- +-&u2phy3 { +- status = "okay"; +-}; +- +-&usb_host0_ehci { +- status = "okay"; +-}; +- +-&usb_host0_ohci { +- status = "okay"; +-}; +- +-&usb_host1_ehci { +- status = "okay"; +-}; +- +-&usb_host1_ohci { +- status = "okay"; + }; +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -0,0 +1,945 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2023 Thomas McKahan ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include "rk3588.dtsi" ++ ++/ { ++ model = "FriendlyElec NanoPC-T6"; ++ compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; ++ ++ aliases { ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ sys_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "system-led"; ++ linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sys_led_pin>; ++ }; ++ ++ usr_led: led-1 { ++ gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; ++ label = "user-led"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usr_led_pin>; ++ }; ++ }; ++ ++ sound { ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det>; ++ ++ simple-audio-card,name = "realtek,rt5616-codec"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; ++ simple-audio-card,hp-pin-name = "Headphones"; ++ ++ simple-audio-card,widgets = ++ "Headphone", "Headphones", ++ "Microphone", "Microphone Jack"; ++ simple-audio-card,routing = ++ "Headphones", "HPOL", ++ "Headphones", "HPOR", ++ "MIC1", "Microphone Jack", ++ "Microphone Jack", "micbias1"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rt5616>; ++ }; ++ }; ++ ++ vcc12v_dcin: vcc12v-dcin-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ /* vcc5v0_sys powers peripherals */ ++ vcc5v0_sys: vcc5v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ /* vcc4v0_sys powers the RK806, RK860's */ ++ vcc4v0_sys: vcc4v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc4v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <4000000>; ++ regulator-max-microvolt = <4000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-1v1-nldo-s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc4v0_sys>; ++ }; ++ ++ vcc_3v3_pcie20: vcc3v3-pcie20-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3_pcie20"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vbus5v0_typec: vbus5v0-typec-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&typec5v_pwren>; ++ regulator-name = "vbus5v0_typec"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_m2_1_pwren>; ++ regulator-name = "vcc3v3_pcie2x1l0"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_pcie30: vcc3v3-pcie30-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_m2_0_pwren>; ++ regulator-name = "vcc3v3_pcie30"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_sd_s0: vcc3v3-sd-s0-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-low; ++ gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_LOW>; ++ regulator-boot-on; ++ regulator-max-microvolt = <3300000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-name = "vcc3v3_sd_s0"; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vdd_4g_3v3: vdd-4g-3v3-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pin_4g_lte_pwren>; ++ regulator-name = "vdd_4g_3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++}; ++ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy1_ps { ++ status = "okay"; ++}; ++ ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_b3 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&gpio0 { ++ gpio-line-names = /* GPIO0 A0-A7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO0 B0-B7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO0 C0-C7 */ ++ "", "", "", "", ++ "HEADER_10", "HEADER_08", "HEADER_32", "", ++ /* GPIO0 D0-D7 */ ++ "", "", "", "", ++ "", "", "", ""; ++}; ++ ++&gpio1 { ++ gpio-line-names = /* GPIO1 A0-A7 */ ++ "HEADER_27", "HEADER_28", "", "", ++ "", "", "", "HEADER_15", ++ /* GPIO1 B0-B7 */ ++ "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", ++ "HEADER_24", "HEADER_22", "", "", ++ /* GPIO1 C0-C7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO1 D0-D7 */ ++ "", "", "", "", ++ "", "", "HEADER_05", "HEADER_03"; ++}; ++ ++&gpio2 { ++ gpio-line-names = /* GPIO2 A0-A7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO2 B0-B7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO2 C0-C7 */ ++ "", "CSI1_11", "CSI1_12", "", ++ "", "", "", "", ++ /* GPIO2 D0-D7 */ ++ "", "", "", "", ++ "", "", "", ""; ++}; ++ ++&gpio3 { ++ gpio-line-names = /* GPIO3 A0-A7 */ ++ "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", ++ "HEADER_37", "", "DSI0_12", "", ++ /* GPIO3 B0-B7 */ ++ "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", ++ "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", ++ /* GPIO3 C0-C7 */ ++ "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", ++ "", "", "", "", ++ /* GPIO3 D0-D7 */ ++ "", "", "", "", ++ "", "DSI1_10", "", ""; ++}; ++ ++&gpio4 { ++ gpio-line-names = /* GPIO4 A0-A7 */ ++ "DSI1_08", "DSI1_14", "", "DSI1_12", ++ "", "", "", "", ++ /* GPIO4 B0-B7 */ ++ "", "", "", "", ++ "", "", "", "", ++ /* GPIO4 C0-C7 */ ++ "", "", "", "", ++ "CSI0_11", "CSI0_12", "", "", ++ /* GPIO4 D0-D7 */ ++ "", "", "", "", ++ "", "", "", ""; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0m2_xfer>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc4v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: regulator@43 { ++ compatible = "rockchip,rk8603", "rockchip,rk8602"; ++ reg = <0x43>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc4v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ ++ vdd_npu_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_npu_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc4v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c6 { ++ clock-frequency = <200000>; ++ status = "okay"; ++ ++ fusb302: typec-portc@22 { ++ compatible = "fcs,fusb302"; ++ reg = <0x22>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-0 = <&usbc0_int>; ++ pinctrl-names = "default"; ++ vbus-supply = <&vbus5v0_typec>; ++ ++ connector { ++ compatible = "usb-c-connector"; ++ data-role = "dual"; ++ label = "USB-C"; ++ power-role = "dual"; ++ try-power-role = "sink"; ++ source-pdos = ; ++ sink-pdos = ; ++ op-sink-microwatt = <1000000>; ++ }; ++ }; ++ ++ hym8563: rtc@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ wakeup-source; ++ }; ++}; ++ ++&i2c7 { ++ clock-frequency = <200000>; ++ status = "okay"; ++ ++ rt5616: codec@1b { ++ compatible = "realtek,rt5616"; ++ reg = <0x1b>; ++ clocks = <&cru I2S0_8CH_MCLKOUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clock-rates = <12288000>; ++ ++ port { ++ rt5616_p0_0: endpoint { ++ remote-endpoint = <&i2s0_8ch_p0_0>; ++ }; ++ }; ++ }; ++ ++ /* connected with MIPI-CSI1 */ ++}; ++ ++&i2c8 { ++ pinctrl-0 = <&i2c8m2_xfer>; ++}; ++ ++&i2s0_8ch { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_mclk ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++ status = "okay"; ++ ++ i2s0_8ch_p0: port { ++ i2s0_8ch_p0_0: endpoint { ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ remote-endpoint = <&rt5616_p0_0>; ++ }; ++ }; ++}; ++ ++&pcie2x1l0 { ++ reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc_3v3_pcie20>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie2_0_rst>; ++ status = "okay"; ++}; ++ ++&pcie2x1l1 { ++ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie2_1_rst>; ++ status = "okay"; ++}; ++ ++&pcie2x1l2 { ++ reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc_3v3_pcie20>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie2_2_rst>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++}; ++ ++&pcie3x4 { ++ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie30>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gpio-leds { ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ usr_led_pin: usr-led-pin { ++ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pcie { ++ pcie2_0_rst: pcie2-0-rst { ++ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie2_1_rst: pcie2-1-rst { ++ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie2_2_rst: pcie2-2-rst { ++ rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie_m2_0_pwren: pcie-m20-pwren { ++ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie_m2_1_pwren: pcie-m21-pwren { ++ rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ pin_4g_lte_pwren: 4g-lte-pwren { ++ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ typec5v_pwren: typec5v-pwren { ++ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ usbc0_int: usbc0-int { ++ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm1 { ++ pinctrl-0 = <&pwm1m1_pins>; ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&avcc_1v8_s0>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ max-frequency = <200000000>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; ++ disable-wp; ++ no-mmc; ++ no-sdio; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc3v3_sd_s0>; ++ vqmmc-supply = <&vccio_sd_s0>; ++ status = "okay"; ++}; ++ ++&spi2 { ++ status = "okay"; ++ assigned-clocks = <&cru CLK_SPI2>; ++ assigned-clock-rates = <200000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; ++ num-cs = <1>; ++ ++ pmic@0 { ++ compatible = "rockchip,rk806"; ++ spi-max-frequency = <1000000>; ++ reg = <0x0>; ++ ++ interrupt-parent = <&gpio0>; ++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, ++ <&rk806_dvs2_null>, <&rk806_dvs3_null>; ++ ++ system-power-controller; ++ ++ vcc1-supply = <&vcc4v0_sys>; ++ vcc2-supply = <&vcc4v0_sys>; ++ vcc3-supply = <&vcc4v0_sys>; ++ vcc4-supply = <&vcc4v0_sys>; ++ vcc5-supply = <&vcc4v0_sys>; ++ vcc6-supply = <&vcc4v0_sys>; ++ vcc7-supply = <&vcc4v0_sys>; ++ vcc8-supply = <&vcc4v0_sys>; ++ vcc9-supply = <&vcc4v0_sys>; ++ vcc10-supply = <&vcc4v0_sys>; ++ vcc11-supply = <&vcc_2v0_pldo_s3>; ++ vcc12-supply = <&vcc4v0_sys>; ++ vcc13-supply = <&vcc_1v1_nldo_s3>; ++ vcc14-supply = <&vcc_1v1_nldo_s3>; ++ vcca-supply = <&vcc4v0_sys>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk806_dvs1_null: dvs1-null-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs2_null: dvs2-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs3_null: dvs3-null-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun0"; ++ }; ++ ++ regulators { ++ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_gpu_s0"; ++ regulator-enable-ramp-delay = <400>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_cpu_lit_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_log_s0: dcdc-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_log_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-init-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_vdenc_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_ddr_s0: dcdc-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <900000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vdd2_ddr_s3: dcdc-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vdd2_ddr_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_2v0_pldo_s3: dcdc-reg7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2000000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_2v0_pldo_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <2000000>; ++ }; ++ }; ++ ++ vcc_3v3_s3: dcdc-reg8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vddq_ddr_s0: dcdc-reg9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vddq_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s3: dcdc-reg10 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avcc_1v8_s0: pldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "avcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s0: pldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avdd_1v2_s0: pldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "avdd_1v2_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3_s0: pldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vcc_3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd_s0: pldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vccio_sd_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ pldo6_s3: pldo-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "pldo6_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_0v75_s3: nldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_ddr_pll_s0: nldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_ddr_pll_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ avdd_0v75_s0: nldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "avdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v85_s0: nldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_0v85_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v75_s0: nldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-0 = <&uart2m0_xfer>; ++ status = "okay"; ++}; ++ ++&u2phy2_host { ++ phy-supply = <&vdd_4g_3v3>; ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ status = "okay"; ++}; ++ ++&u2phy2 { ++ status = "okay"; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-6.6/055-09-v6.12-arm64-dts-rockchip-move-NanoPC-T6-parts-to-DTS.patch b/target/linux/rockchip/patches-6.6/055-09-v6.12-arm64-dts-rockchip-move-NanoPC-T6-parts-to-DTS.patch new file mode 100644 index 00000000000000..ce78982a589700 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-09-v6.12-arm64-dts-rockchip-move-NanoPC-T6-parts-to-DTS.patch @@ -0,0 +1,85 @@ +From aea8d84070fe0846961deb23228d9dd3f8caefb3 Mon Sep 17 00:00:00 2001 +From: Marcin Juszkiewicz +Date: Thu, 29 Aug 2024 14:26:54 +0200 +Subject: [PATCH] arm64: dts: rockchip: move NanoPC-T6 parts to DTS + +MiniPCIe slot is present only in first version of NanoPC-T6 (2301). + +Signed-off-by: Marcin Juszkiewicz +Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org +Signed-off-by: Heiko Stuebner +--- + .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 23 +++++++++++++++++++ + .../boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 17 -------------- + 2 files changed, 23 insertions(+), 17 deletions(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts +@@ -14,4 +14,27 @@ + model = "FriendlyElec NanoPC-T6"; + compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; + ++ vdd_4g_3v3: vdd-4g-3v3-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pin_4g_lte_pwren>; ++ regulator-name = "vdd_4g_3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++}; ++ ++&pinctrl { ++ usb { ++ pin_4g_lte_pwren: 4g-lte-pwren { ++ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&u2phy2_host { ++ phy-supply = <&vdd_4g_3v3>; + }; +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -170,18 +170,6 @@ + regulator-name = "vcc3v3_sd_s0"; + vin-supply = <&vcc_3v3_s3>; + }; +- +- vdd_4g_3v3: vdd-4g-3v3-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pin_4g_lte_pwren>; +- regulator-name = "vdd_4g_3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vcc5v0_sys>; +- }; + }; + + &combphy0_ps { +@@ -527,10 +515,6 @@ + }; + + usb { +- pin_4g_lte_pwren: 4g-lte-pwren { +- rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- + typec5v_pwren: typec5v-pwren { + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; +@@ -912,7 +896,6 @@ + }; + + &u2phy2_host { +- phy-supply = <&vdd_4g_3v3>; + status = "okay"; + }; + diff --git a/target/linux/rockchip/patches-6.6/055-10-v6.12-arm64-dts-rockchip-add-SPI-flash-on-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-10-v6.12-arm64-dts-rockchip-add-SPI-flash-on-NanoPC-T6.patch new file mode 100644 index 00000000000000..61fa3639a90985 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-10-v6.12-arm64-dts-rockchip-add-SPI-flash-on-NanoPC-T6.patch @@ -0,0 +1,40 @@ +From a22a629c63b1addcf2d81eaf30383c1deca5b7a9 Mon Sep 17 00:00:00 2001 +From: Marcin Juszkiewicz +Date: Thu, 29 Aug 2024 14:26:56 +0200 +Subject: [PATCH] arm64: dts: rockchip: add SPI flash on NanoPC-T6 + +FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board. +It is populated with 32MB one on LTS version. + +Signed-off-by: Marcin Juszkiewicz +Reviewed-by: Jonas Karlman +Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org +Signed-off-by: Heiko Stuebner +--- + .../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -560,6 +560,21 @@ + status = "okay"; + }; + ++/* optional on non-LTS, populated on LTS version */ ++&sfc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&fspim1_pins>; ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <104000000>; ++ spi-rx-bus-width = <4>; ++ spi-tx-bus-width = <1>; ++ }; ++}; ++ + &spi2 { + status = "okay"; + assigned-clocks = <&cru CLK_SPI2>; diff --git a/target/linux/rockchip/patches-6.6/055-11-v6.12-arm64-dts-rockchip-add-IR-receiver-to-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-11-v6.12-arm64-dts-rockchip-add-IR-receiver-to-NanoPC-T6.patch new file mode 100644 index 00000000000000..34b2d182b4a813 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-11-v6.12-arm64-dts-rockchip-add-IR-receiver-to-NanoPC-T6.patch @@ -0,0 +1,53 @@ +From b70caff0f9592719b6c977e291c33192e959c9d4 Mon Sep 17 00:00:00 2001 +From: Marcin Juszkiewicz +Date: Thu, 29 Aug 2024 14:26:57 +0200 +Subject: [PATCH] arm64: dts: rockchip: add IR-receiver to NanoPC-T6 + +FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line +which ends as GPIO0_D4. + +Signed-off-by: Marcin Juszkiewicz +Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org +Signed-off-by: Heiko Stuebner +--- + .../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -25,6 +25,13 @@ + stdout-path = "serial2:1500000n8"; + }; + ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ir_receiver_pin>; ++ }; ++ + leds { + compatible = "gpio-leds"; + +@@ -228,7 +235,7 @@ + "HEADER_10", "HEADER_08", "HEADER_32", "", + /* GPIO0 D0-D7 */ + "", "", "", "", +- "", "", "", ""; ++ "IR receiver [PWM3_IR_M0]", "", "", ""; + }; + + &gpio1 { +@@ -492,6 +499,12 @@ + }; + }; + ++ ir-receiver { ++ ir_receiver_pin: ir-receiver-pin { ++ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + pcie { + pcie2_0_rst: pcie2-0-rst { + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/target/linux/rockchip/patches-6.6/055-12-v6.12-arm64-dts-rockchip-enable-GPU-on-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-12-v6.12-arm64-dts-rockchip-enable-GPU-on-NanoPC-T6.patch new file mode 100644 index 00000000000000..40ebd638c196f8 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-12-v6.12-arm64-dts-rockchip-enable-GPU-on-NanoPC-T6.patch @@ -0,0 +1,28 @@ +From e86cbf999cda2d44f32ec622537024e3b923080d Mon Sep 17 00:00:00 2001 +From: Marcin Juszkiewicz +Date: Thu, 29 Aug 2024 14:26:58 +0200 +Subject: [PATCH] arm64: dts: rockchip: enable GPU on NanoPC-T6 + +Enable the Mali GPU on FriendlyELEC NanoPC-T6 + +Signed-off-by: Marcin Juszkiewicz +Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-7-edff247e8c02@linaro.org +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -298,6 +298,11 @@ + "", "", "", ""; + }; + ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ status = "okay"; ++}; ++ + &i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; diff --git a/target/linux/rockchip/patches-6.6/055-13-v6.12-arm64-dts-rockchip-enable-USB-C-on-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-13-v6.12-arm64-dts-rockchip-enable-USB-C-on-NanoPC-T6.patch new file mode 100644 index 00000000000000..89720c3825d0d8 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-13-v6.12-arm64-dts-rockchip-enable-USB-C-on-NanoPC-T6.patch @@ -0,0 +1,130 @@ +From c9ba75320e5a12dc9d574603acf29b38a920b40c Mon Sep 17 00:00:00 2001 +From: Marcin Juszkiewicz +Date: Thu, 29 Aug 2024 14:26:59 +0200 +Subject: [PATCH] arm64: dts: rockchip: enable USB-C on NanoPC-T6 + +Enable the USB-C port on FriendlyELEC NanoPC-T6. + +Works one way so far but still better than before. + +Signed-off-by: Marcin Juszkiewicz +Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-8-edff247e8c02@linaro.org +Signed-off-by: Heiko Stuebner +--- + .../boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 76 ++++++++++++++++++- + 1 file changed, 72 insertions(+), 4 deletions(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -137,6 +137,8 @@ + gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&typec5v_pwren>; ++ regulator-always-on; ++ regulator-boot-on; + regulator-name = "vbus5v0_typec"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +@@ -381,11 +383,34 @@ + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; +- power-role = "dual"; +- try-power-role = "sink"; ++ power-role = "source"; + source-pdos = ; +- sink-pdos = ; +- op-sink-microwatt = <1000000>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ usbc0_hs: endpoint { ++ remote-endpoint = <&usb_host0_xhci_drd_sw>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ usbc0_ss: endpoint { ++ remote-endpoint = <&usbdp_phy0_typec_ss>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ usbc0_sbu: endpoint { ++ remote-endpoint = <&usbdp_phy0_typec_sbu>; ++ }; ++ }; ++ }; + }; + }; + +@@ -928,6 +953,14 @@ + status = "okay"; + }; + ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ + &u2phy2_host { + status = "okay"; + }; +@@ -944,6 +977,29 @@ + status = "okay"; + }; + ++&usbdp_phy0 { ++ mode-switch; ++ orientation-switch; ++ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ++ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ usbdp_phy0_typec_ss: endpoint@0 { ++ reg = <0>; ++ remote-endpoint = <&usbc0_ss>; ++ }; ++ ++ usbdp_phy0_typec_sbu: endpoint@1 { ++ reg = <1>; ++ remote-endpoint = <&usbc0_sbu>; ++ }; ++ }; ++}; ++ + &usb_host0_ehci { + status = "okay"; + }; +@@ -952,6 +1008,18 @@ + status = "okay"; + }; + ++&usb_host0_xhci { ++ dr_mode = "host"; ++ status = "okay"; ++ usb-role-switch; ++ ++ port { ++ usb_host0_xhci_drd_sw: endpoint { ++ remote-endpoint = <&usbc0_hs>; ++ }; ++ }; ++}; ++ + &usb_host1_ehci { + status = "okay"; + }; diff --git a/target/linux/rockchip/patches-6.6/055-14-v6.12-arm64-dts-rockchip-add-Mask-Rom-key-on-NanoPC-T6.patch b/target/linux/rockchip/patches-6.6/055-14-v6.12-arm64-dts-rockchip-add-Mask-Rom-key-on-NanoPC-T6.patch new file mode 100644 index 00000000000000..cf179d9fa9368a --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-14-v6.12-arm64-dts-rockchip-add-Mask-Rom-key-on-NanoPC-T6.patch @@ -0,0 +1,45 @@ +From da439eed06ff6806f22341ab0468226afc555305 Mon Sep 17 00:00:00 2001 +From: Marcin Juszkiewicz +Date: Thu, 29 Aug 2024 14:27:00 +0200 +Subject: [PATCH] arm64: dts: rockchip: add Mask Rom key on NanoPC-T6 + +Mask Rom key is connected to SARADC and can be read from OS. + +Signed-off-by: Marcin Juszkiewicz +Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-9-edff247e8c02@linaro.org +Signed-off-by: Heiko Stuebner +--- + .../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -8,6 +8,7 @@ + /dts-v1/; + + #include ++#include + #include + #include + #include "rk3588.dtsi" +@@ -21,6 +22,20 @@ + mmc1 = &sdmmc; + }; + ++ adc-keys-0 { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ button-maskrom { ++ label = "Mask Rom"; ++ linux,code = ; ++ press-threshold-microvolt = <2000>; ++ }; ++ }; ++ + chosen { + stdout-path = "serial2:1500000n8"; + }; diff --git a/target/linux/rockchip/patches-6.6/055-15-v6.12-arm64-dts-rockchip-use-correct-fcs-suspend-voltage-selecto.patch b/target/linux/rockchip/patches-6.6/055-15-v6.12-arm64-dts-rockchip-use-correct-fcs-suspend-voltage-selecto.patch new file mode 100644 index 00000000000000..d7d87e22e83bbd --- /dev/null +++ b/target/linux/rockchip/patches-6.6/055-15-v6.12-arm64-dts-rockchip-use-correct-fcs-suspend-voltage-selecto.patch @@ -0,0 +1,28 @@ +From 170c77276d470a63d22a2634a38846dd88538637 Mon Sep 17 00:00:00 2001 +From: Heiko Stuebner +Date: Thu, 29 Aug 2024 15:20:58 +0200 +Subject: [PATCH] arm64: dts: rockchip: use correct + fcs,suspend-voltage-selector on NanoPC-T6 + +A remant from moving from the vendor kernel, the regulator is using +a fairchild fcs prefix instead of rockchip,* in the mainline kernel +according to its binding. + +Signed-off-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20240829132100.1723127-2-heiko@sntech.de +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -366,7 +366,7 @@ + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; +- rockchip,suspend-voltage-selector = <1>; ++ fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_npu_s0"; + regulator-always-on; + regulator-boot-on; diff --git a/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch b/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch new file mode 100644 index 00000000000000..bc1845b0d3c344 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/056-01-v6.10-arm64-dts-rockchip-Add-ArmSom-Sige7-board.patch @@ -0,0 +1,778 @@ +From 81c828a67c78bb03ea75819c417c93c7f3d637b5 Mon Sep 17 00:00:00 2001 +From: Jianfeng Liu +Date: Sat, 20 Apr 2024 11:43:00 +0800 +Subject: [PATCH] arm64: dts: rockchip: Add ArmSom Sige7 board +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Specification: + Rockchip Rk3588 SoC + 4x ARM Cortex-A76, 4x ARM Cortex-A55 + 8/16/32GB Memory LPDDR4/LPDDR4x + Mali G610MP4 GPU + 2× MIPI-CSI Connector + 1× MIPI-DSI Connector + 1x M.2 Key M (PCIe 3.0 4-lanes) + 2x RTL8125 2.5G Ethernet + Onboard AP6275P for WIFI6/BT5 + 32GB/64GB/128GB eMMC + MicroSD card slot + 1x USB2.0, 1x USB3.0 Type-A, 1x US3.0 Type-C + 1x HDMI Output, 1x type-C DP Output + +Functions work normally: + USB2.0 Host + USB3.0 Type-A Host + M.2 Key M (PCIe 3.0 4-lanes) + 2x RTL8125 2.5G Ethernet + eMMC + MicroSD card + +More information can be obtained from the following website + https://docs.armsom.org/armsom-sige7 + +Signed-off-by: Jianfeng Liu +Reviewed-by: Weizhao Ouyang +Link: https://lore.kernel.org/r/20240420034300.176920-4-liujianfeng1994@gmail.com +Signed-off-by: Heiko Stuebner +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + .../boot/dts/rockchip/rk3588-armsom-sige7.dts | 721 ++++++++++++++++++ + 2 files changed, 722 insertions(+) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts + +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -101,6 +101,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ra + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +@@ -0,0 +1,721 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3588.dtsi" ++ ++/ { ++ model = "ArmSoM Sige7"; ++ compatible = "armsom,sige7", "rockchip,rk3588"; ++ ++ aliases { ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ analog-sound { ++ compatible = "audio-graph-card"; ++ dais = <&i2s0_8ch_p0>; ++ label = "rk3588-es8316"; ++ hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_detect>; ++ routing = "MIC2", "Mic Jack", ++ "Headphones", "HPOL", ++ "Headphones", "HPOR"; ++ widgets = "Microphone", "Mic Jack", ++ "Headphone", "Headphones"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_rgb_g>; ++ ++ led_green: led-0 { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led_red: led-1 { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "none"; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ compatible = "pwm-fan"; ++ cooling-levels = <0 95 145 195 255>; ++ fan-supply = <&vcc5v0_sys>; ++ pwms = <&pwm1 0 50000 0>; ++ #cooling-cells = <2>; ++ }; ++ ++ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie2x1l2"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <5000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc3v3_pcie30: vcc3v3-pcie30-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; ++ regulator-name = "vcc3v3_pcie30"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <5000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++}; ++ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy1_ps { ++ status = "okay"; ++}; ++ ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_b3 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0m2_xfer>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: regulator@43 { ++ compatible = "rockchip,rk8603", "rockchip,rk8602"; ++ reg = <0x43>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c6 { ++ status = "okay"; ++ ++ hym8563: rtc@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ #clock-cells = <0>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ wakeup-source; ++ }; ++}; ++ ++&i2c7 { ++ status = "okay"; ++ ++ es8316: audio-codec@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clock-rates = <12288000>; ++ clocks = <&cru I2S0_8CH_MCLKOUT>; ++ clock-names = "mclk"; ++ #sound-dai-cells = <0>; ++ ++ port { ++ es8316_p0_0: endpoint { ++ remote-endpoint = <&i2s0_8ch_p0_0>; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_mclk ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++ status = "okay"; ++ ++ i2s0_8ch_p0: port { ++ i2s0_8ch_p0_0: endpoint { ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ remote-endpoint = <&es8316_p0_0>; ++ }; ++ }; ++}; ++ ++/* phy1 - right ethernet port */ ++&pcie2x1l0 { ++ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++/* phy2 - WiFi */ ++&pcie2x1l1 { ++ reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++/* phy0 - left ethernet port */ ++&pcie2x1l2 { ++ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++}; ++ ++&pcie3x4 { ++ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie30>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ leds { ++ led_rgb_g: led-rgb-g { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ led_rgb_r: led-rgb-r { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ sound { ++ hp_detect: hp-detect { ++ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&saradc { ++ vref-supply = <&avcc_1v8_s0>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ mmc-hs200-1_8v; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <200000000>; ++ no-sdio; ++ no-mmc; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3_s3>; ++ vqmmc-supply = <&vccio_sd_s0>; ++ status = "okay"; ++}; ++ ++&spi2 { ++ assigned-clocks = <&cru CLK_SPI2>; ++ assigned-clock-rates = <200000000>; ++ num-cs = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; ++ status = "okay"; ++ ++ pmic@0 { ++ compatible = "rockchip,rk806"; ++ spi-max-frequency = <1000000>; ++ reg = <0x0>; ++ ++ interrupt-parent = <&gpio0>; ++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, ++ <&rk806_dvs2_null>, <&rk806_dvs3_null>; ++ ++ system-power-controller; ++ ++ vcc1-supply = <&vcc5v0_sys>; ++ vcc2-supply = <&vcc5v0_sys>; ++ vcc3-supply = <&vcc5v0_sys>; ++ vcc4-supply = <&vcc5v0_sys>; ++ vcc5-supply = <&vcc5v0_sys>; ++ vcc6-supply = <&vcc5v0_sys>; ++ vcc7-supply = <&vcc5v0_sys>; ++ vcc8-supply = <&vcc5v0_sys>; ++ vcc9-supply = <&vcc5v0_sys>; ++ vcc10-supply = <&vcc5v0_sys>; ++ vcc11-supply = <&vcc_2v0_pldo_s3>; ++ vcc12-supply = <&vcc5v0_sys>; ++ vcc13-supply = <&vcc_1v1_nldo_s3>; ++ vcc14-supply = <&vcc_1v1_nldo_s3>; ++ vcca-supply = <&vcc5v0_sys>; ++ ++ rk806_dvs1_null: dvs1-null-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs2_null: dvs2-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs3_null: dvs3-null-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun0"; ++ }; ++ ++ regulators { ++ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_gpu_s0"; ++ regulator-enable-ramp-delay = <400>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_cpu_lit_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_log_s0: dcdc-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_log_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_vdenc_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_ddr_s0: dcdc-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <900000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vdd2_ddr_s3: dcdc-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vdd2_ddr_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_2v0_pldo_s3: dcdc-reg7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2000000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_2v0_pldo_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <2000000>; ++ }; ++ }; ++ ++ vcc_3v3_s3: dcdc-reg8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vddq_ddr_s0: dcdc-reg9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vddq_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s3: dcdc-reg10 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avcc_1v8_s0: pldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "avcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s0: pldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avdd_1v2_s0: pldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "avdd_1v2_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3_s0: pldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vcc_3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd_s0: pldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vccio_sd_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ pldo6_s3: pldo-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "pldo6_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_0v75_s3: nldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_ddr_pll_s0: nldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_ddr_pll_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ avdd_0v75_s0: nldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "avdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v85_s0: nldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "vdd_0v85_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v75_s0: nldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ status = "okay"; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-0 = <&uart2m0_xfer>; ++ status = "okay"; ++}; ++ ++&usbdp_phy1 { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_xhci { ++ dr_mode = "host"; ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-6.6/052-16-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch b/target/linux/rockchip/patches-6.6/056-02-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch similarity index 90% rename from target/linux/rockchip/patches-6.6/052-16-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch rename to target/linux/rockchip/patches-6.6/056-02-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch index d59574bc498ccf..d0b8336ef2e5c5 100644 --- a/target/linux/rockchip/patches-6.6/052-16-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch +++ b/target/linux/rockchip/patches-6.6/056-02-v6.11-arm64-dts-rockchip-enable-thermal-management-on-all-RK358.patch @@ -25,6 +25,19 @@ Signed-off-by: Heiko Stuebner arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 4 ++++ 8 files changed, 32 insertions(+) +--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +@@ -673,6 +673,10 @@ + }; + }; + ++&tsadc { ++ status = "okay"; ++}; ++ + &u2phy0 { + status = "okay"; + }; --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -807,6 +807,10 @@ diff --git a/target/linux/rockchip/patches-6.6/120-arm64-dts-rockchip-add-led-aliases-and-stop-heartbeat-for-nanopc-t6.patch b/target/linux/rockchip/patches-6.6/120-arm64-dts-rockchip-add-led-aliases-and-stop-heartbeat-for-nanopc-t6.patch index bef4b0fdbbb528..006c8523c9e219 100644 --- a/target/linux/rockchip/patches-6.6/120-arm64-dts-rockchip-add-led-aliases-and-stop-heartbeat-for-nanopc-t6.patch +++ b/target/linux/rockchip/patches-6.6/120-arm64-dts-rockchip-add-led-aliases-and-stop-heartbeat-for-nanopc-t6.patch @@ -1,6 +1,6 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts -@@ -19,6 +19,10 @@ +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -20,6 +20,10 @@ aliases { mmc0 = &sdhci; mmc1 = &sdmmc; @@ -10,8 +10,8 @@ + led-upgrade = &sys_led; }; - chosen { -@@ -31,7 +35,7 @@ + adc-keys-0 { +@@ -53,7 +57,7 @@ sys_led: led-0 { gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; label = "system-led"; diff --git a/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch b/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch index c73b807f330bea..bbcff0179068bb 100644 --- a/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch +++ b/target/linux/rockchip/patches-6.6/121-arm64-dts-rockchip-lower-mmc-speed-for-nanopc-t6.patch @@ -1,11 +1,11 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts -@@ -547,7 +547,7 @@ - cap-mmc-highspeed; - cap-sd-highspeed; +--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +@@ -616,7 +616,7 @@ disable-wp; + no-mmc; + no-sdio; - sd-uhs-sdr104; + sd-uhs-sdr50; - vmmc-supply = <&vcc_3v3_s3>; + vmmc-supply = <&vcc3v3_sd_s0>; vqmmc-supply = <&vccio_sd_s0>; status = "okay"; diff --git a/target/linux/rockchip/patches-6.6/125-arm64-dts-rockchip-Update-LED-properties-for-ArmSom-Sige7.patch b/target/linux/rockchip/patches-6.6/125-arm64-dts-rockchip-Update-LED-properties-for-ArmSom-Sige7.patch new file mode 100644 index 00000000000000..051efa7dbdfe34 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/125-arm64-dts-rockchip-Update-LED-properties-for-ArmSom-Sige7.patch @@ -0,0 +1,25 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Tianling Shen +Date: Mon Sep 23 13:22:56 2024 +0800 +Subject: [PATCH] arm64: dts: rockchip: Update LED properties for ArmSom + Sige7 + +Add OpenWrt's LED aliases for showing system status. + +Signed-off-by: Tianling Shen +--- + +--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +@@ -13,6 +13,11 @@ + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; ++ ++ led-boot = &led_red; ++ led-failsafe = &led_red; ++ led-running = &led_red; ++ led-upgrade = &led_red; + }; + + chosen { diff --git a/target/linux/rockchip/patches-6.6/126-arm64-dts-rockchip-lower-mmc-speed-for-ArmSom-Sige7.patch b/target/linux/rockchip/patches-6.6/126-arm64-dts-rockchip-lower-mmc-speed-for-ArmSom-Sige7.patch new file mode 100644 index 00000000000000..01f1c74370de5e --- /dev/null +++ b/target/linux/rockchip/patches-6.6/126-arm64-dts-rockchip-lower-mmc-speed-for-ArmSom-Sige7.patch @@ -0,0 +1,26 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Tianling Shen +Date: Mon Sep 23 13:22:56 2024 +0800 +Subject: [PATCH] arm64: dts: rockchip: lower mmc speed for ArmSom Sige7 + +The previously stated speed of sdr-104 in is too high for the hardware +to reliably communicate with some fast SD cards. +Rockchip boards have a common bug when operating uhs speed, which will +hang the system during a soft reboot. + +To be on the safe side, lower the speed to workaround. + +Signed-off-by: Tianling Shen +--- + +--- a/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-armsom-sige7.dts +@@ -346,7 +346,7 @@ + max-frequency = <200000000>; + no-sdio; + no-mmc; +- sd-uhs-sdr104; ++ sd-uhs-sdr50; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; diff --git a/target/linux/rockchip/patches-6.6/400-1-arm64-dts-rockchip-Add-common-definitions-for-NanoPi.patch b/target/linux/rockchip/patches-6.6/400-1-arm64-dts-rockchip-Add-common-definitions-for-NanoPi.patch new file mode 100644 index 00000000000000..37fb6693dc1f06 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/400-1-arm64-dts-rockchip-Add-common-definitions-for-NanoPi.patch @@ -0,0 +1,1573 @@ +From 93be10e4e180eeac9b6a57a4363e08c35bee3af9 Mon Sep 17 00:00:00 2001 +From: Sebastian Kropatsch +Date: Wed, 12 Jun 2024 22:48:10 +0200 +Subject: [PATCH 1/5] arm64: dts: rockchip: Add common definitions for NanoPi + R6C and R6S + +The FriendlyElec NanoPi R6C and R6S are quite similar boards, +although they differ in: +- M.2 M-Key connector vs second RTL8125BG Ethernet port +- One of the LEDs has a different function on each board +- 12-pin GPIO FPC vs 30-pin GPIO header +- R6S has a PWM-based IR receiver while the R6C has not +- R6S has a 5V fan connector while the R6C has not + +Refactor their DT files by adding a common definitions file to +improve differentiation clarity between both boards and to make +hardware-specific DT changes easier in the long run. +Do not introduce any functional changes. + +Signed-off-by: Sebastian Kropatsch +--- + .../boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 763 ++++++++++++++++++ + .../boot/dts/rockchip/rk3588s-nanopi-r6c.dts | 2 +- + .../boot/dts/rockchip/rk3588s-nanopi-r6s.dts | 756 +---------------- + 3 files changed, 767 insertions(+), 754 deletions(-) + create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi + +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +@@ -0,0 +1,763 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Common devicetree definitions for the NanoPi R6C and R6S ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include "rk3588s.dtsi" ++ ++/ { ++ aliases { ++ ethernet0 = &gmac1; ++ mmc0 = &sdmmc; ++ mmc1 = &sdhci; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ button-maskrom { ++ label = "Maskrom"; ++ linux,code = ; ++ press-threshold-microvolt = <1800>; ++ }; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&key1_pin>; ++ ++ button-user { ++ label = "User"; ++ linux,code = ; ++ gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>; ++ debounce-interval = <50>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ sys_led: led-0 { ++ label = "sys_led"; ++ gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sys_led_pin>; ++ }; ++ ++ wan_led: led-1 { ++ label = "wan_led"; ++ gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wan_led_pin>; ++ }; ++ ++ lan1_led: led-2 { ++ label = "lan1_led"; ++ gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lan1_led_pin>; ++ }; ++ ++ lan2_led: led-3 { ++ gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lan2_led_pin>; ++ }; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc_3v3_s0: vcc-3v3-s0-regulator { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s0"; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sd_s0_pwr>; ++ regulator-name = "vcc_3v3_sd_s0"; ++ regulator-boot-on; ++ regulator-max-microvolt = <3000000>; ++ regulator-min-microvolt = <3000000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc_3v3_pcie20: vcc3v3-pcie20-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3_pcie20"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc5v0_usb: vcc5v0-usb-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&typec5v_pwren>; ++ regulator-name = "vcc5v0_usb_otg0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_usb>; ++ }; ++ ++ vcc5v0_host_20: vcc5v0-host-20-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host20_en>; ++ regulator-name = "vcc5v0_host_20"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_usb>; ++ }; ++}; ++ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b1 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_b3 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l1 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l2 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&cpu_l3 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++}; ++ ++&gmac1 { ++ clock_in_out = "output"; ++ phy-handle = <&rgmii_phy1>; ++ phy-mode = "rgmii-rxid"; ++ pinctrl-0 = <&gmac1_miim ++ &gmac1_tx_bus2 ++ &gmac1_rx_bus2 ++ &gmac1_rgmii_clk ++ &gmac1_rgmii_bus>; ++ pinctrl-names = "default"; ++ tx_delay = <0x42>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0m2_xfer>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: regulator@43 { ++ compatible = "rockchip,rk8603", "rockchip,rk8602"; ++ reg = <0x43>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ ++ vdd_npu_s0: regulator@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_npu_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <2300>; ++ regulator-boot-on; ++ regulator-always-on; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c6 { ++ clock-frequency = <200000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c6m0_xfer>; ++ status = "okay"; ++ ++ hym8563: rtc@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtc_int>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ wakeup-source; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-id001c.c916"; ++ reg = <0x1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtl8211f_rst>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <100000>; ++ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&pcie2x1l1 { ++ reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc_3v3_pcie20>; ++ status = "okay"; ++}; ++ ++&pcie2x1l2 { ++ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc_3v3_pcie20>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ gpio-key { ++ key1_pin: key1-pin { ++ rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ gpio-leds { ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = ++ <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = ++ <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lan1_led_pin: lan1-led-pin { ++ rockchip,pins = ++ <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ lan2_led_pin: lan2-led-pin { ++ rockchip,pins = ++ <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ hym8563 { ++ rtc_int: rtc-int { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdmmc { ++ sd_s0_pwr: sd-s0-pwr { ++ rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb { ++ typec5v_pwren: typec5v-pwren { ++ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_host20_en: vcc5v0-host20-en { ++ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ rtl8211f { ++ rtl8211f_rst: rtl8211f-rst { ++ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&saradc { ++ vref-supply = <&avcc_1v8_s0>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ mmc-hs200-1_8v; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ max-frequency = <150000000>; ++ no-mmc; ++ no-sdio; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3_sd_s0>; ++ vqmmc-supply = <&vccio_sd_s0>; ++ status = "okay"; ++}; ++ ++&spi2 { ++ status = "okay"; ++ assigned-clocks = <&cru CLK_SPI2>; ++ assigned-clock-rates = <200000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; ++ num-cs = <1>; ++ ++ pmic@0 { ++ compatible = "rockchip,rk806"; ++ spi-max-frequency = <1000000>; ++ reg = <0x0>; ++ ++ interrupt-parent = <&gpio0>; ++ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, ++ <&rk806_dvs2_null>, <&rk806_dvs3_null>; ++ ++ system-power-controller; ++ ++ vcc1-supply = <&vcc5v0_sys>; ++ vcc2-supply = <&vcc5v0_sys>; ++ vcc3-supply = <&vcc5v0_sys>; ++ vcc4-supply = <&vcc5v0_sys>; ++ vcc5-supply = <&vcc5v0_sys>; ++ vcc6-supply = <&vcc5v0_sys>; ++ vcc7-supply = <&vcc5v0_sys>; ++ vcc8-supply = <&vcc5v0_sys>; ++ vcc9-supply = <&vcc5v0_sys>; ++ vcc10-supply = <&vcc5v0_sys>; ++ vcc11-supply = <&vcc_2v0_pldo_s3>; ++ vcc12-supply = <&vcc5v0_sys>; ++ vcc13-supply = <&vcc_1v1_nldo_s3>; ++ vcc14-supply = <&vcc_1v1_nldo_s3>; ++ vcca-supply = <&vcc5v0_sys>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk806_dvs1_null: dvs1-null-pins { ++ pins = "gpio_pwrctrl1"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs2_null: dvs2-null-pins { ++ pins = "gpio_pwrctrl2"; ++ function = "pin_fun0"; ++ }; ++ ++ rk806_dvs3_null: dvs3-null-pins { ++ pins = "gpio_pwrctrl3"; ++ function = "pin_fun0"; ++ }; ++ ++ regulators { ++ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_gpu_s0"; ++ regulator-enable-ramp-delay = <400>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_cpu_lit_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_log_s0: dcdc-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <750000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_log_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_vdenc_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_ddr_s0: dcdc-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <675000>; ++ regulator-max-microvolt = <900000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ vdd2_ddr_s3: dcdc-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vdd2_ddr_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_2v0_pldo_s3: dcdc-reg7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2000000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vdd_2v0_pldo_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <2000000>; ++ }; ++ }; ++ ++ vcc_3v3_s3: dcdc-reg8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vddq_ddr_s0: dcdc-reg9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vddq_ddr_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8_s3: dcdc-reg10 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avcc_1v8_s0: pldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "avcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc_1v8_s0: pldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ avdd_1v2_s0: pldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "avdd_1v2_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ avcc_3v3_s0: pldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "avcc_3v3_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd_s0: pldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-ramp-delay = <12500>; ++ regulator-name = "vccio_sd_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ pldo6_s3: pldo-reg6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "pldo6_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_0v75_s3: nldo-reg1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s3"; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++ }; ++ ++ avdd_ddr_pll_s0: nldo-reg2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "avdd_ddr_pll_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++ }; ++ ++ avdd_0v75_s0: nldo-reg3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "avdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ avdd_0v85_s0: nldo-reg4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ regulator-name = "avdd_0v85_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_0v75_s0: nldo-reg5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ regulator-name = "vdd_0v75_s0"; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&u2phy2 { ++ status = "okay"; ++}; ++ ++&u2phy2_host { ++ phy-supply = <&vcc5v0_host_20>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-0 = <&uart2m0_xfer>; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts +@@ -2,7 +2,7 @@ + + /dts-v1/; + +-#include "rk3588s-nanopi-r6s.dts" ++#include "rk3588s-nanopi-r6.dtsi" + + / { + model = "FriendlyElec NanoPi R6C"; +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts +@@ -2,763 +2,13 @@ + + /dts-v1/; + +-#include +-#include +-#include +-#include "rk3588s.dtsi" ++#include "rk3588s-nanopi-r6.dtsi" + + / { + model = "FriendlyElec NanoPi R6S"; + compatible = "friendlyarm,nanopi-r6s", "rockchip,rk3588s"; +- +- aliases { +- ethernet0 = &gmac1; +- mmc0 = &sdmmc; +- mmc1 = &sdhci; +- }; +- +- chosen { +- stdout-path = "serial2:1500000n8"; +- }; +- +- adc-keys { +- compatible = "adc-keys"; +- io-channels = <&saradc 0>; +- io-channel-names = "buttons"; +- keyup-threshold-microvolt = <1800000>; +- poll-interval = <100>; +- +- button-maskrom { +- label = "Maskrom"; +- linux,code = ; +- press-threshold-microvolt = <1800>; +- }; +- }; +- +- gpio-keys { +- compatible = "gpio-keys"; +- pinctrl-names = "default"; +- pinctrl-0 = <&key1_pin>; +- +- button-user { +- label = "User"; +- linux,code = ; +- gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>; +- debounce-interval = <50>; +- }; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- sys_led: led-0 { +- label = "sys_led"; +- gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; +- linux,default-trigger = "heartbeat"; +- pinctrl-names = "default"; +- pinctrl-0 = <&sys_led_pin>; +- }; +- +- wan_led: led-1 { +- label = "wan_led"; +- gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&wan_led_pin>; +- }; +- +- lan1_led: led-2 { +- label = "lan1_led"; +- gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&lan1_led_pin>; +- }; +- +- lan2_led: led-3 { +- label = "lan2_led"; +- gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&lan2_led_pin>; +- }; +- }; +- +- vcc5v0_sys: vcc5v0-sys-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc5v0_sys"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- }; +- +- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc_1v1_nldo_s3"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1100000>; +- regulator-max-microvolt = <1100000>; +- vin-supply = <&vcc5v0_sys>; +- }; +- +- vcc_3v3_s0: vcc-3v3-s0-regulator { +- compatible = "regulator-fixed"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-name = "vcc_3v3_s0"; +- vin-supply = <&vcc_3v3_s3>; +- }; +- +- vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&sd_s0_pwr>; +- regulator-name = "vcc_3v3_sd_s0"; +- regulator-boot-on; +- regulator-max-microvolt = <3000000>; +- regulator-min-microvolt = <3000000>; +- vin-supply = <&vcc_3v3_s3>; +- }; +- +- vcc_3v3_pcie20: vcc3v3-pcie20-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc_3v3_pcie20"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vcc_3v3_s3>; +- }; +- +- vcc5v0_usb: vcc5v0-usb-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc5v0_usb"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc5v0_sys>; +- }; +- +- vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&typec5v_pwren>; +- regulator-name = "vcc5v0_usb_otg0"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc5v0_usb>; +- }; +- +- vcc5v0_host_20: vcc5v0-host-20-regulator { +- compatible = "regulator-fixed"; +- enable-active-high; +- gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&vcc5v0_host20_en>; +- regulator-name = "vcc5v0_host_20"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc5v0_usb>; +- }; +-}; +- +-&combphy0_ps { +- status = "okay"; +-}; +- +-&combphy2_psu { +- status = "okay"; +-}; +- +-&cpu_b0 { +- cpu-supply = <&vdd_cpu_big0_s0>; +-}; +- +-&cpu_b1 { +- cpu-supply = <&vdd_cpu_big0_s0>; +-}; +- +-&cpu_b2 { +- cpu-supply = <&vdd_cpu_big1_s0>; +-}; +- +-&cpu_b3 { +- cpu-supply = <&vdd_cpu_big1_s0>; +-}; +- +-&cpu_l0 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&cpu_l1 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&cpu_l2 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&cpu_l3 { +- cpu-supply = <&vdd_cpu_lit_s0>; +-}; +- +-&gmac1 { +- clock_in_out = "output"; +- phy-handle = <&rgmii_phy1>; +- phy-mode = "rgmii-rxid"; +- pinctrl-0 = <&gmac1_miim +- &gmac1_tx_bus2 +- &gmac1_rx_bus2 +- &gmac1_rgmii_clk +- &gmac1_rgmii_bus>; +- pinctrl-names = "default"; +- tx_delay = <0x42>; +- status = "okay"; +-}; +- +-&i2c0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0m2_xfer>; +- status = "okay"; +- +- vdd_cpu_big0_s0: regulator@42 { +- compatible = "rockchip,rk8602"; +- reg = <0x42>; +- fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_cpu_big0_s0"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <1050000>; +- regulator-ramp-delay = <2300>; +- vin-supply = <&vcc5v0_sys>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_cpu_big1_s0: regulator@43 { +- compatible = "rockchip,rk8603", "rockchip,rk8602"; +- reg = <0x43>; +- fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_cpu_big1_s0"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <1050000>; +- regulator-ramp-delay = <2300>; +- vin-supply = <&vcc5v0_sys>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +-}; +- +-&i2c2 { +- status = "okay"; +- +- vdd_npu_s0: regulator@42 { +- compatible = "rockchip,rk8602"; +- reg = <0x42>; +- fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_npu_s0"; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-ramp-delay = <2300>; +- regulator-boot-on; +- regulator-always-on; +- vin-supply = <&vcc5v0_sys>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +-}; +- +-&i2c6 { +- clock-frequency = <200000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c6m0_xfer>; +- status = "okay"; +- +- hym8563: rtc@51 { +- compatible = "haoyu,hym8563"; +- reg = <0x51>; +- #clock-cells = <0>; +- clock-output-names = "hym8563"; +- pinctrl-names = "default"; +- pinctrl-0 = <&rtc_int>; +- interrupt-parent = <&gpio0>; +- interrupts = ; +- wakeup-source; +- }; +-}; +- +-&mdio1 { +- rgmii_phy1: ethernet-phy@1 { +- compatible = "ethernet-phy-id001c.c916"; +- reg = <0x1>; +- pinctrl-names = "default"; +- pinctrl-0 = <&rtl8211f_rst>; +- reset-assert-us = <20000>; +- reset-deassert-us = <100000>; +- reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; +- }; +-}; +- +-&pcie2x1l1 { +- reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc_3v3_pcie20>; +- status = "okay"; +-}; +- +-&pcie2x1l2 { +- reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc_3v3_pcie20>; +- status = "okay"; +-}; +- +-&pinctrl { +- gpio-key { +- key1_pin: key1-pin { +- rockchip,pins = <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- }; +- +- gpio-leds { +- sys_led_pin: sys-led-pin { +- rockchip,pins = +- <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- wan_led_pin: wan-led-pin { +- rockchip,pins = +- <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- lan1_led_pin: lan1-led-pin { +- rockchip,pins = +- <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- lan2_led_pin: lan2-led-pin { +- rockchip,pins = +- <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- +- hym8563 { +- rtc_int: rtc-int { +- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- }; +- +- sdmmc { +- sd_s0_pwr: sd-s0-pwr { +- rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- }; +- +- usb { +- typec5v_pwren: typec5v-pwren { +- rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- vcc5v0_host20_en: vcc5v0-host20-en { +- rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +- +- rtl8211f { +- rtl8211f_rst: rtl8211f-rst { +- rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- }; +-}; +- +-&saradc { +- vref-supply = <&avcc_1v8_s0>; +- status = "okay"; +-}; +- +-&sdhci { +- bus-width = <8>; +- no-sdio; +- no-sd; +- non-removable; +- mmc-hs200-1_8v; +- status = "okay"; +-}; +- +-&sdmmc { +- bus-width = <4>; +- cap-sd-highspeed; +- disable-wp; +- max-frequency = <150000000>; +- no-mmc; +- no-sdio; +- sd-uhs-sdr104; +- vmmc-supply = <&vcc_3v3_sd_s0>; +- vqmmc-supply = <&vccio_sd_s0>; +- status = "okay"; +-}; +- +-&spi2 { +- status = "okay"; +- assigned-clocks = <&cru CLK_SPI2>; +- assigned-clock-rates = <200000000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; +- num-cs = <1>; +- +- pmic@0 { +- compatible = "rockchip,rk806"; +- spi-max-frequency = <1000000>; +- reg = <0x0>; +- +- interrupt-parent = <&gpio0>; +- interrupts = <7 IRQ_TYPE_LEVEL_LOW>; +- +- pinctrl-names = "default"; +- pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, +- <&rk806_dvs2_null>, <&rk806_dvs3_null>; +- +- system-power-controller; +- +- vcc1-supply = <&vcc5v0_sys>; +- vcc2-supply = <&vcc5v0_sys>; +- vcc3-supply = <&vcc5v0_sys>; +- vcc4-supply = <&vcc5v0_sys>; +- vcc5-supply = <&vcc5v0_sys>; +- vcc6-supply = <&vcc5v0_sys>; +- vcc7-supply = <&vcc5v0_sys>; +- vcc8-supply = <&vcc5v0_sys>; +- vcc9-supply = <&vcc5v0_sys>; +- vcc10-supply = <&vcc5v0_sys>; +- vcc11-supply = <&vcc_2v0_pldo_s3>; +- vcc12-supply = <&vcc5v0_sys>; +- vcc13-supply = <&vcc_1v1_nldo_s3>; +- vcc14-supply = <&vcc_1v1_nldo_s3>; +- vcca-supply = <&vcc5v0_sys>; +- +- gpio-controller; +- #gpio-cells = <2>; +- +- rk806_dvs1_null: dvs1-null-pins { +- pins = "gpio_pwrctrl1"; +- function = "pin_fun0"; +- }; +- +- rk806_dvs2_null: dvs2-null-pins { +- pins = "gpio_pwrctrl2"; +- function = "pin_fun0"; +- }; +- +- rk806_dvs3_null: dvs3-null-pins { +- pins = "gpio_pwrctrl3"; +- function = "pin_fun0"; +- }; +- +- regulators { +- vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_gpu_s0"; +- regulator-enable-ramp-delay = <400>; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_cpu_lit_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_log_s0: dcdc-reg3 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <675000>; +- regulator-max-microvolt = <750000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_log_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <750000>; +- }; +- }; +- +- vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <550000>; +- regulator-max-microvolt = <950000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_vdenc_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_ddr_s0: dcdc-reg5 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <675000>; +- regulator-max-microvolt = <900000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_ddr_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <850000>; +- }; +- }; +- +- vdd2_ddr_s3: dcdc-reg6 { +- regulator-always-on; +- regulator-boot-on; +- regulator-name = "vdd2_ddr_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- }; +- }; +- +- vcc_2v0_pldo_s3: dcdc-reg7 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <2000000>; +- regulator-max-microvolt = <2000000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vdd_2v0_pldo_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <2000000>; +- }; +- }; +- +- vcc_3v3_s3: dcdc-reg8 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-name = "vcc_3v3_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <3300000>; +- }; +- }; +- +- vddq_ddr_s0: dcdc-reg9 { +- regulator-always-on; +- regulator-boot-on; +- regulator-name = "vddq_ddr_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vcc_1v8_s3: dcdc-reg10 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "vcc_1v8_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- avcc_1v8_s0: pldo-reg1 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "avcc_1v8_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- vcc_1v8_s0: pldo-reg2 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "vcc_1v8_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- avdd_1v2_s0: pldo-reg3 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; +- regulator-name = "avdd_1v2_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- avcc_3v3_s0: pldo-reg4 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "avcc_3v3_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vccio_sd_s0: pldo-reg5 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-ramp-delay = <12500>; +- regulator-name = "vccio_sd_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- pldo6_s3: pldo-reg6 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- regulator-name = "pldo6_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <1800000>; +- }; +- }; +- +- vdd_0v75_s3: nldo-reg1 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <750000>; +- regulator-name = "vdd_0v75_s3"; +- +- regulator-state-mem { +- regulator-on-in-suspend; +- regulator-suspend-microvolt = <750000>; +- }; +- }; +- +- avdd_ddr_pll_s0: nldo-reg2 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <850000>; +- regulator-max-microvolt = <850000>; +- regulator-name = "avdd_ddr_pll_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- regulator-suspend-microvolt = <850000>; +- }; +- }; +- +- avdd_0v75_s0: nldo-reg3 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <750000>; +- regulator-name = "avdd_0v75_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- avdd_0v85_s0: nldo-reg4 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <850000>; +- regulator-max-microvolt = <850000>; +- regulator-name = "avdd_0v85_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- +- vdd_0v75_s0: nldo-reg5 { +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <750000>; +- regulator-max-microvolt = <750000>; +- regulator-name = "vdd_0v75_s0"; +- +- regulator-state-mem { +- regulator-off-in-suspend; +- }; +- }; +- }; +- }; +-}; +- +-&tsadc { +- status = "okay"; +-}; +- +-&u2phy2 { +- status = "okay"; +-}; +- +-&u2phy2_host { +- phy-supply = <&vcc5v0_host_20>; +- status = "okay"; +-}; +- +-&uart2 { +- pinctrl-0 = <&uart2m0_xfer>; +- status = "okay"; +-}; +- +-&usb_host0_ehci { +- status = "okay"; + }; + +-&usb_host0_ohci { +- status = "okay"; ++&lan2_led { ++ label = "lan2_led"; + }; diff --git a/target/linux/rockchip/patches-6.6/400-2-arm64-dts-rockchip-Fix-regulators-gmac-and-naming-on.patch b/target/linux/rockchip/patches-6.6/400-2-arm64-dts-rockchip-Fix-regulators-gmac-and-naming-on.patch new file mode 100644 index 00000000000000..1ff8220bde2c69 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/400-2-arm64-dts-rockchip-Fix-regulators-gmac-and-naming-on.patch @@ -0,0 +1,470 @@ +From cd909b668132acd6f846336f15abf5185cfc4dbc Mon Sep 17 00:00:00 2001 +From: Sebastian Kropatsch +Date: Wed, 12 Jun 2024 22:48:11 +0200 +Subject: [PATCH 2/5] arm64: dts: rockchip: Fix regulators, gmac and naming on + NanoPi R6C/R6S + +Fix the alphabetical ordering in some nodes and rename some regulators +and pins to match the schematics [1][2] as well as to adhere to +preferred naming schemes. + +In addition to that: +* vcc_3v3_sd_s0: Fix voltage to be 3.3V +* vcc3v3_pcie: + - Move to NanoPi R6C, this power switch is not available on R6S + - Fix vin-supply (is vcc_5v0 per schematics) + - Add gpios/pincrtl to enable power +* vcc5v0_usb: Remove this regulator since according to the schematics, + vcc5v0_host_20 and vcc5v0_usb_otg0 are directly powered by vcc_5v0 +* gmac1: Add rx_delay of 0 (no delay since phy-mode = "rgmii-rxid") +* rgmii_phy1: Add phy-supply as seen in schematics +* pcie2*: + - Add pinctrl reset pins + - Update vpcie3v3-supply to match the schematics +* sdhci: Add vmmc-supply and vqmmc-supply + +Links: +[1] https://wiki.friendlyelec.com/wiki/images/f/f7/NanoPi_R6C_2302_SCH.PDF +[2] https://wiki.friendlyelec.com/wiki/images/2/2f/NanoPi_R6S_2208_SCH.PDF + +Fixes: f1b11f43b3e9 ("arm64: dts: rockchip: Add support for NanoPi R6S") +Signed-off-by: Sebastian Kropatsch +--- + .../boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 169 +++++++++--------- + .../boot/dts/rockchip/rk3588s-nanopi-r6c.dts | 28 +++ + .../boot/dts/rockchip/rk3588s-nanopi-r6s.dts | 5 + + 3 files changed, 122 insertions(+), 80 deletions(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +@@ -21,7 +21,7 @@ + stdout-path = "serial2:1500000n8"; + }; + +- adc-keys { ++ adc-key-maskrom { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; +@@ -41,10 +41,10 @@ + pinctrl-0 = <&key1_pin>; + + button-user { +- label = "User"; +- linux,code = ; +- gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; ++ gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>; ++ label = "User Button"; ++ linux,code = ; + }; + }; + +@@ -80,26 +80,27 @@ + }; + }; + +- vcc5v0_sys: vcc5v0-sys-regulator { ++ vcc_5v0: regulator-vcc-5v0 { + compatible = "regulator-fixed"; +- regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc_5v0"; + }; + +- vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { ++ vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; +- regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; +- vin-supply = <&vcc5v0_sys>; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ vin-supply = <&vcc_5v0>; + }; + +- vcc_3v3_s0: vcc-3v3-s0-regulator { ++ /* SY6280AAC power switch (U3824 in schematics) */ ++ vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; +@@ -109,61 +110,45 @@ + vin-supply = <&vcc_3v3_s3>; + }; + +- vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { ++ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sd_s0_pwr>; +- regulator-name = "vcc_3v3_sd_s0"; +- regulator-boot-on; +- regulator-max-microvolt = <3000000>; +- regulator-min-microvolt = <3000000>; +- vin-supply = <&vcc_3v3_s3>; +- }; +- +- vcc_3v3_pcie20: vcc3v3-pcie20-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc_3v3_pcie20"; +- regulator-always-on; + regulator-boot-on; +- regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-name = "vcc_3v3_sd_s0"; + vin-supply = <&vcc_3v3_s3>; + }; + +- vcc5v0_usb: vcc5v0-usb-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc5v0_usb"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc5v0_sys>; +- }; +- +- vcc5v0_usb_otg0: vcc5v0-usb-otg0-regulator { ++ /* SY6280AAC power switch (U9539 in schematics) */ ++ /* For USB 2.0 Type-A port */ ++ vcc_5v0_host_20: regulator-vcc-5v0-host-20 { + compatible = "regulator-fixed"; + enable-active-high; +- gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&typec5v_pwren>; +- regulator-name = "vcc5v0_usb_otg0"; ++ pinctrl-0 = <&usb_host_pwren_h>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc5v0_usb>; ++ regulator-name = "vcc_5v0_host_20"; ++ vin-supply = <&vcc_5v0>; + }; + +- vcc5v0_host_20: vcc5v0-host-20-regulator { ++ /* SY6280AAC power switch (U9538 in schematics) */ ++ /* For USB 3.0 Type-A port */ ++ vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 { + compatible = "regulator-fixed"; + enable-active-high; +- gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; ++ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; +- pinctrl-0 = <&vcc5v0_host20_en>; +- regulator-name = "vcc5v0_host_20"; ++ pinctrl-0 = <&typec5v_pwren_h>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc5v0_usb>; ++ regulator-name = "vcc5v0_usb_otg0"; ++ vin-supply = <&vcc_5v0>; + }; + }; + +@@ -211,12 +196,13 @@ + clock_in_out = "output"; + phy-handle = <&rgmii_phy1>; + phy-mode = "rgmii-rxid"; ++ pinctrl-names = "default"; + pinctrl-0 = <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus>; +- pinctrl-names = "default"; ++ rx_delay = <0x00>; + tx_delay = <0x42>; + status = "okay"; + }; +@@ -230,13 +216,13 @@ + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; ++ regulator-name = "vdd_cpu_big0_s0"; + regulator-ramp-delay = <2300>; +- vin-supply = <&vcc5v0_sys>; ++ vin-supply = <&vcc_5v0>; + + regulator-state-mem { + regulator-off-in-suspend; +@@ -247,13 +233,13 @@ + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; ++ regulator-name = "vdd_cpu_big1_s0"; + regulator-ramp-delay = <2300>; +- vin-supply = <&vcc5v0_sys>; ++ vin-supply = <&vcc_5v0>; + + regulator-state-mem { + regulator-off-in-suspend; +@@ -268,13 +254,13 @@ + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; +- regulator-name = "vdd_npu_s0"; ++ regulator-always-on; ++ regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; ++ regulator-name = "vdd_npu_s0"; + regulator-ramp-delay = <2300>; +- regulator-boot-on; +- regulator-always-on; +- vin-supply = <&vcc5v0_sys>; ++ vin-supply = <&vcc_5v0>; + + regulator-state-mem { + regulator-off-in-suspend; +@@ -293,35 +279,43 @@ + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; +- pinctrl-names = "default"; +- pinctrl-0 = <&rtc_int>; + interrupt-parent = <&gpio0>; + interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtc_int>; + wakeup-source; + }; + }; + ++/* RTL8211F-CG Ethernet */ + &mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; + reg = <0x1>; ++ phy-supply = <&vcc_3v3_s0>; + pinctrl-names = "default"; +- pinctrl-0 = <&rtl8211f_rst>; ++ pinctrl-0 = <&gmac1_rstn_l>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + }; + }; + ++/* RTL8125BG Ethernet */ + &pcie2x1l1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie20x1_1_perstn_m2>; + reset-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc_3v3_pcie20>; ++ vpcie3v3-supply = <&vcc_3v3_s3>; + status = "okay"; + }; + ++/* R6C: M.2 M-Key socket */ ++/* R6S: RTL8125BG Ethernet */ + &pcie2x1l2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie20x1_2_perstn_m0>; + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; +- vpcie3v3-supply = <&vcc_3v3_pcie20>; + status = "okay"; + }; + +@@ -360,24 +354,34 @@ + }; + }; + ++ pcie { ++ pcie20x1_1_perstn_m2: pcie2x1-1-rst { ++ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie20x1_2_perstn_m0: pcie2x1-2-rst { ++ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + sdmmc { +- sd_s0_pwr: sd-s0-pwr { ++ sd_s0_pwr: sd-pwr { + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { +- typec5v_pwren: typec5v-pwren { ++ typec5v_pwren_h: usb3-pwren { + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + +- vcc5v0_host20_en: vcc5v0-host20-en { ++ usb_host_pwren_h: usb2-pwren { + rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtl8211f { +- rtl8211f_rst: rtl8211f-rst { ++ gmac1_rstn_l: rtl8211f-rst { + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +@@ -388,15 +392,19 @@ + status = "okay"; + }; + ++/* eMMC */ + &sdhci { + bus-width = <8>; +- no-sdio; ++ mmc-hs200-1_8v; + no-sd; ++ no-sdio; + non-removable; +- mmc-hs200-1_8v; ++ vmmc-supply = <&vcc_3v3_s3>; ++ vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; + }; + ++/* microSD card */ + &sdmmc { + bus-width = <4>; + cap-sd-highspeed; +@@ -411,16 +419,15 @@ + }; + + &spi2 { +- status = "okay"; + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; ++ num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; +- num-cs = <1>; ++ status = "okay"; + +- pmic@0 { ++ rk806_single: pmic@0 { + compatible = "rockchip,rk806"; +- spi-max-frequency = <1000000>; + reg = <0x0>; + + interrupt-parent = <&gpio0>; +@@ -430,23 +437,24 @@ + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + ++ spi-max-frequency = <1000000>; + system-power-controller; + +- vcc1-supply = <&vcc5v0_sys>; +- vcc2-supply = <&vcc5v0_sys>; +- vcc3-supply = <&vcc5v0_sys>; +- vcc4-supply = <&vcc5v0_sys>; +- vcc5-supply = <&vcc5v0_sys>; +- vcc6-supply = <&vcc5v0_sys>; +- vcc7-supply = <&vcc5v0_sys>; +- vcc8-supply = <&vcc5v0_sys>; +- vcc9-supply = <&vcc5v0_sys>; +- vcc10-supply = <&vcc5v0_sys>; ++ vcc1-supply = <&vcc_5v0>; ++ vcc2-supply = <&vcc_5v0>; ++ vcc3-supply = <&vcc_5v0>; ++ vcc4-supply = <&vcc_5v0>; ++ vcc5-supply = <&vcc_5v0>; ++ vcc6-supply = <&vcc_5v0>; ++ vcc7-supply = <&vcc_5v0>; ++ vcc8-supply = <&vcc_5v0>; ++ vcc9-supply = <&vcc_5v0>; ++ vcc10-supply = <&vcc_5v0>; + vcc11-supply = <&vcc_2v0_pldo_s3>; +- vcc12-supply = <&vcc5v0_sys>; ++ vcc12-supply = <&vcc_5v0>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; +- vcca-supply = <&vcc5v0_sys>; ++ vcca-supply = <&vcc_5v0>; + + gpio-controller; + #gpio-cells = <2>; +@@ -745,10 +753,11 @@ + }; + + &u2phy2_host { +- phy-supply = <&vcc5v0_host_20>; ++ phy-supply = <&vcc_5v0_host_20>; + status = "okay"; + }; + ++/* Debug UART */ + &uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts +@@ -7,8 +7,36 @@ + / { + model = "FriendlyElec NanoPi R6C"; + compatible = "friendlyarm,nanopi-r6c", "rockchip,rk3588s"; ++ ++ /* MP2143DJ power switch (U9536 in schematics) */ ++ vcc3v3_pcie: regulator-vcc3v3-pcie { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie20x1_2_con_pwren>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pcie"; ++ vin-supply = <&vcc_5v0>; ++ }; + }; + + &lan2_led { + label = "user_led"; + }; ++ ++/* M.2 M-Key socket */ ++&pcie2x1l2 { ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++}; ++ ++&pinctrl { ++ pcie { ++ pcie20x1_2_con_pwren: pcie20x1-2-con-pwren { ++ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts +@@ -12,3 +12,8 @@ + &lan2_led { + label = "lan2_led"; + }; ++ ++/* RTL8125BG Ethernet */ ++&pcie2x1l2 { ++ vpcie3v3-supply = <&vcc_3v3_s3>; ++}; diff --git a/target/linux/rockchip/patches-6.6/400-3-arm64-dts-rockchip-Improve-LEDs-on-NanoPi-R6C-R6S.patch b/target/linux/rockchip/patches-6.6/400-3-arm64-dts-rockchip-Improve-LEDs-on-NanoPi-R6C-R6S.patch new file mode 100644 index 00000000000000..8ca0ed588062d7 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/400-3-arm64-dts-rockchip-Improve-LEDs-on-NanoPi-R6C-R6S.patch @@ -0,0 +1,184 @@ +From dfa0e0a42f3e256189849a45203aac98a0b4d1aa Mon Sep 17 00:00:00 2001 +From: Sebastian Kropatsch +Date: Wed, 12 Jun 2024 22:48:12 +0200 +Subject: [PATCH 3/5] arm64: dts: rockchip: Improve LEDs on NanoPi R6C/R6S + +Move led-3 node into NanoPi R6C/R6S's source files since they have +different functionalities on each board: On the R6S this LED is used +to signal LAN2 link up, while on the R6C this LED does not have a +pre-defined purpose. + +In addition to that: + - Remove deprecated label property + - Add color and function properties + - Add linux,default-trigger to trigger on Ethernet link + +Signed-off-by: Sebastian Kropatsch +--- + .../boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 32 +++++++------------ + .../boot/dts/rockchip/rk3588s-nanopi-r6c.dts | 22 ++++++++++--- + .../boot/dts/rockchip/rk3588s-nanopi-r6s.dts | 26 +++++++++++++-- + 3 files changed, 54 insertions(+), 26 deletions(-) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + #include "rk3588s.dtsi" + + / { +@@ -52,7 +53,8 @@ + compatible = "gpio-leds"; + + sys_led: led-0 { +- label = "sys_led"; ++ color = ; ++ function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; +@@ -60,24 +62,22 @@ + }; + + wan_led: led-1 { +- label = "wan_led"; ++ color = ; ++ function = LED_FUNCTION_WAN; + gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "stmmac-0:01:link"; + pinctrl-names = "default"; + pinctrl-0 = <&wan_led_pin>; + }; + + lan1_led: led-2 { +- label = "lan1_led"; ++ color = ; ++ function = LED_FUNCTION_LAN; + gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "r8169-3-3100:00:link"; + pinctrl-names = "default"; + pinctrl-0 = <&lan1_led_pin>; + }; +- +- lan2_led: led-3 { +- gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; +- pinctrl-names = "default"; +- pinctrl-0 = <&lan2_led_pin>; +- }; + }; + + vcc_5v0: regulator-vcc-5v0 { +@@ -328,23 +328,15 @@ + + gpio-leds { + sys_led_pin: sys-led-pin { +- rockchip,pins = +- <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wan_led_pin: wan-led-pin { +- rockchip,pins = +- <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + lan1_led_pin: lan1-led-pin { +- rockchip,pins = +- <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; +- }; +- +- lan2_led_pin: lan2-led-pin { +- rockchip,pins = +- <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ rockchip,pins = <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6c.dts +@@ -8,6 +8,18 @@ + model = "FriendlyElec NanoPi R6C"; + compatible = "friendlyarm,nanopi-r6c", "rockchip,rk3588s"; + ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1_led: led-3 { ++ color = ; ++ function = "led1"; ++ gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led1_led_pin>; ++ }; ++ }; ++ + /* MP2143DJ power switch (U9536 in schematics) */ + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible = "regulator-fixed"; +@@ -24,16 +36,18 @@ + }; + }; + +-&lan2_led { +- label = "user_led"; +-}; +- + /* M.2 M-Key socket */ + &pcie2x1l2 { + vpcie3v3-supply = <&vcc3v3_pcie>; + }; + + &pinctrl { ++ gpio-leds { ++ led1_led_pin: led1-led-pin { ++ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + pcie { + pcie20x1_2_con_pwren: pcie20x1-2-con-pwren { + rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts +@@ -7,13 +7,35 @@ + / { + model = "FriendlyElec NanoPi R6S"; + compatible = "friendlyarm,nanopi-r6s", "rockchip,rk3588s"; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ lan2_led: led-3 { ++ color = ; ++ function = LED_FUNCTION_LAN; ++ function-enumerator = <2>; ++ gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "r8169-4-4100:00:link"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lan2_led_pin>; ++ }; ++ }; + }; + +-&lan2_led { +- label = "lan2_led"; ++&lan1_led { ++ function-enumerator = <1>; + }; + + /* RTL8125BG Ethernet */ + &pcie2x1l2 { + vpcie3v3-supply = <&vcc_3v3_s3>; + }; ++ ++&pinctrl { ++ gpio-leds { ++ lan2_led_pin: lan2-led-pin { ++ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; diff --git a/target/linux/rockchip/patches-6.6/400-4-arm64-dts-rockchip-Enable-lower-USB3-port-on-NanoPi-.patch b/target/linux/rockchip/patches-6.6/400-4-arm64-dts-rockchip-Enable-lower-USB3-port-on-NanoPi-.patch new file mode 100644 index 00000000000000..c154f97cd7cff0 --- /dev/null +++ b/target/linux/rockchip/patches-6.6/400-4-arm64-dts-rockchip-Enable-lower-USB3-port-on-NanoPi-.patch @@ -0,0 +1,62 @@ +From e067643b4e321db4de3274198b13732cce37f5c1 Mon Sep 17 00:00:00 2001 +From: Sebastian Kropatsch +Date: Wed, 12 Jun 2024 22:48:13 +0200 +Subject: [PATCH 4/5] arm64: dts: rockchip: Enable lower USB3 port on NanoPi + R6C/R6S + +Enable support for the lower USB 3.0 Type-A port on the NanoPi R6C and +NanoPi R6S. The upper USB 2.0 Type-A port is already supported. + +Signed-off-by: Sebastian Kropatsch +--- + .../boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 28 +++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +@@ -740,6 +740,17 @@ + status = "okay"; + }; + ++/* USB2 PHY for USB 3.0 Type-A (lower port)*/ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ phy-supply = <&vcc5v0_usb_otg0>; ++ status = "okay"; ++}; ++ ++/* USB2 PHY for USB 2.0 Type-A (upper port)*/ + &u2phy2 { + status = "okay"; + }; +@@ -755,10 +766,27 @@ + status = "okay"; + }; + ++/* USB 2.0 Type-A (upper port) */ ++/* PHY: <&u2phy2_host> */ + &usb_host0_ehci { + status = "okay"; + }; + ++/* USB 2.0 Type-A (upper port) */ ++/* PHY: <&u2phy2_host> */ + &usb_host0_ohci { + status = "okay"; + }; ++ ++/* USB 3.0 Type-A (lower port) */ ++/* PHYs: <&u2phy0_otg>, <&usbdp_phy0> */ ++&usb_host0_xhci { ++ dr_mode = "host"; ++ extcon = <&u2phy0>; ++ status = "okay"; ++}; ++ ++/* USB3 PHY for USB 3.0 Type-A (lower port)*/ ++&usbdp_phy0 { ++ status = "okay"; ++}; diff --git a/target/linux/rockchip/patches-6.6/400-5-arm64-dts-rockchip-Enable-GPU-on-NanoPi-R6C-R6S.patch b/target/linux/rockchip/patches-6.6/400-5-arm64-dts-rockchip-Enable-GPU-on-NanoPi-R6C-R6S.patch new file mode 100644 index 00000000000000..5e2e70afbca7ee --- /dev/null +++ b/target/linux/rockchip/patches-6.6/400-5-arm64-dts-rockchip-Enable-GPU-on-NanoPi-R6C-R6S.patch @@ -0,0 +1,27 @@ +From 04cd713c3834b87fcd147e4bf7b7066cfe60fffc Mon Sep 17 00:00:00 2001 +From: Sebastian Kropatsch +Date: Wed, 12 Jun 2024 22:48:14 +0200 +Subject: [PATCH 5/5] arm64: dts: rockchip: Enable GPU on NanoPi R6C/R6S + +Enable the Mali GPU on the FriendlyElec NanoPi R6C and R6S. + +Signed-off-by: Sebastian Kropatsch +--- + arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6.dtsi +@@ -207,6 +207,12 @@ + status = "okay"; + }; + ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ sram-supply = <&vdd_gpu_mem_s0>; ++ status = "okay"; ++}; ++ + &i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; diff --git a/toolchain/nasm/Makefile b/toolchain/nasm/Makefile index bdca35b7fc71d5..bcdb293790d89d 100644 --- a/toolchain/nasm/Makefile +++ b/toolchain/nasm/Makefile @@ -5,11 +5,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=nasm -PKG_VERSION:=2.16.01 +PKG_VERSION:=2.16.03 PKG_SOURCE_URL:=https://www.nasm.us/pub/nasm/releasebuilds/$(PKG_VERSION)/ -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=c77745f4802375efeee2ec5c0ad6b7f037ea9c87c92b149a9637ff099f162558 +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz +PKG_HASH:=5bc940dd8a4245686976a8f7e96ba9340a0915f2d5b88356874890e207bdb581 PKG_CPE_ID:=cpe:/a:nasm:netwide_assembler HOST_BUILD_PARALLEL:=1 diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile index 1fedee32a7195b..fc2ff17c73b8a4 100644 --- a/tools/firmware-utils/Makefile +++ b/tools/firmware-utils/Makefile @@ -11,9 +11,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git -PKG_SOURCE_DATE:=2024-08-09 -PKG_SOURCE_VERSION:=26c7f054b5fe8408d64ca7b06372b303cf888245 -PKG_MIRROR_HASH:=7fad7164ae09cc6f250f71f97c5d5f144d0edebe1c46f116ee5cfc7099d3903e +PKG_SOURCE_DATE:=2024-09-22 +PKG_SOURCE_VERSION:=ed9c97fa3305c70cf08f9b11869cafdae5ea5068 +PKG_MIRROR_HASH:=be743cfa5c5de736ed28e1b62f17b5fe2c7f04509432d4b0f951bc5745b6befe include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/cmake.mk diff --git a/tools/meson/Makefile b/tools/meson/Makefile index 96974faafe5f56..f967f33ecd1431 100644 --- a/tools/meson/Makefile +++ b/tools/meson/Makefile @@ -1,11 +1,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=meson -PKG_VERSION:=1.3.2 +PKG_VERSION:=1.5.1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://github.com/mesonbuild/meson/releases/download/$(PKG_VERSION) -PKG_HASH:=492eb450c8b073024276f916f5adbb3c4bb7e90e9e6ec124efda064f3d9b5baa +PKG_HASH:=567e533adf255de73a2de35049b99923caf872a455af9ce03e01077e0d384bed PKG_MAINTAINER:=Andre Heider PKG_LICENSE:=Apache-2.0