Every logic analyzer available today samples asychrnously. On slower systems this is needlessly wasteful.
This logic analyzer works as a state mode capture. A clock on the device-under-test (DUT) drives the capture.
More to come...
Every logic analyzer available today samples asychrnously. On slower systems this is needlessly wasteful.
This logic analyzer works as a state mode capture. A clock on the device-under-test (DUT) drives the capture.
More to come...