diff --git a/kicad_files/Bare ESP8266/.gitignore b/kicad_files/Bare ESP8266/.gitignore new file mode 100644 index 0000000..65a768d --- /dev/null +++ b/kicad_files/Bare ESP8266/.gitignore @@ -0,0 +1,4 @@ +fp-info-cache +*.lck + +/*-backups \ No newline at end of file diff --git a/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Cu.gbl b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Cu.gbl new file mode 100644 index 0000000..a4415c0 --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Cu.gbl @@ -0,0 +1,1988 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:35-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Copper,L2,Bot*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 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diff --git a/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Mask.gbs b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Mask.gbs new file mode 100644 index 0000000..8560200 --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Mask.gbs @@ -0,0 +1,101 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:36-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Soldermask,Bot*% +%TF.FilePolarity,Negative*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 2023-11-07 14:59:36* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 Aperture macros list* +%AMRoundRect* +0 Rectangle with rounded corners* +0 $1 Rounding radius* +0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* +0 Add a 4 corners polygon primitive as box body* +4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* +0 Add four circle primitives for the rounded corners* +1,1,$1+$1,$2,$3* +1,1,$1+$1,$4,$5* +1,1,$1+$1,$6,$7* +1,1,$1+$1,$8,$9* +0 Add four rect primitives between the rounded corners* +20,1,$1+$1,$2,$3,$4,$5,0* +20,1,$1+$1,$4,$5,$6,$7,0* +20,1,$1+$1,$6,$7,$8,$9,0* +20,1,$1+$1,$8,$9,$2,$3,0*% +G04 Aperture macros list end* +%ADD10R,1.700000X1.700000*% +%ADD11O,1.700000X1.700000*% +%ADD12R,4.572000X4.572000*% +%ADD13C,2.600000*% +%ADD14R,2.600000X2.600000*% +%ADD15C,5.000000*% +%ADD16O,1.800000X3.600000*% +%ADD17RoundRect,0.250000X-0.650000X-1.550000X0.650000X-1.550000X0.650000X1.550000X-0.650000X1.550000X0*% +G04 APERTURE END LIST* +D10* +%TO.C,J6*% +X130810000Y-87630000D03* +D11* +X130810000Y-90170000D03* +%TD*% +D12* +%TO.C,U2*% +X159802372Y-117369206D03* +X159802372Y-101531072D03* +X121920000Y-117348000D03* +X121920000Y-101600000D03* +%TD*% +D13* +%TO.C,J5*% +X121615000Y-92670000D03* +D14* +X121615000Y-87670000D03* +%TD*% +D10* +%TO.C,J4*% +X165125000Y-73670000D03* +D11* +X165125000Y-76210000D03* +X165125000Y-78750000D03* +X165125000Y-81290000D03* +%TD*% +%TO.C,J3*% +X152400000Y-124155000D03* +X149860000Y-124155000D03* +D10* +X147320000Y-124155000D03* +%TD*% +D15* +%TO.C,REF\u002A\u002A*% +X162560000Y-63500000D03* +%TD*% +%TO.C,REF\u002A\u002A*% +X162560000Y-130505000D03* +%TD*% +%TO.C,REF\u002A\u002A*% +X120650000Y-130505000D03* +%TD*% +%TO.C,REF\u002A\u002A*% +X120650000Y-63500000D03* +%TD*% +D16* +%TO.C,J2*% +X153670000Y-131775000D03* +X150170000Y-131775000D03* +D17* +X146670000Y-131775000D03* +%TD*% +D13* +%TO.C,J1*% +X139700000Y-130810000D03* +X134700000Y-130810000D03* +D14* +X129700000Y-130810000D03* +%TD*% +M02* diff --git a/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Paste.gbp b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Paste.gbp new file mode 100644 index 0000000..2a1fe50 --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Paste.gbp @@ -0,0 +1,15 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:35-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Paste,Bot*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 2023-11-07 14:59:35* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Silkscreen.gbo b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Silkscreen.gbo new file mode 100644 index 0000000..4665a5a --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-B_Silkscreen.gbo @@ -0,0 +1,15 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:36-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Legend,Bot*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 2023-11-07 14:59:36* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 APERTURE END LIST* +M02* diff --git a/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-Edge_Cuts.gm1 b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-Edge_Cuts.gm1 new file mode 100644 index 0000000..f49ef37 --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-Edge_Cuts.gm1 @@ -0,0 +1,23 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:36-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Profile,NP*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 2023-11-07 14:59:36* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +%TA.AperFunction,Profile*% +%ADD10C,0.100000*% +%TD*% +G04 APERTURE END LIST* +D10* +X113910000Y-57150000D02* +X168910000Y-57150000D01* +X168910000Y-139850000D01* +X113910000Y-139850000D01* +X113910000Y-57150000D01* +M02* diff --git a/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-F_Cu.gtl b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-F_Cu.gtl new file mode 100644 index 0000000..99006df --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-F_Cu.gtl @@ -0,0 +1,630 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:35-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Copper,L1,Top*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 2023-11-07 14:59:35* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 Aperture macros list* +%AMRoundRect* +0 Rectangle with rounded corners* +0 $1 Rounding radius* +0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* +0 Add a 4 corners polygon primitive as box body* +4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* +0 Add four circle primitives for the rounded corners* +1,1,$1+$1,$2,$3* +1,1,$1+$1,$4,$5* +1,1,$1+$1,$6,$7* +1,1,$1+$1,$8,$9* +0 Add four rect primitives between the rounded corners* +20,1,$1+$1,$2,$3,$4,$5,0* +20,1,$1+$1,$4,$5,$6,$7,0* +20,1,$1+$1,$6,$7,$8,$9,0* +20,1,$1+$1,$8,$9,$2,$3,0*% +G04 Aperture macros list end* +%TA.AperFunction,ComponentPad*% +%ADD10R,1.700000X1.700000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD11O,1.700000X1.700000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD12R,4.572000X4.572000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD13C,2.600000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD14R,2.600000X2.600000*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD15RoundRect,0.250000X-0.262500X-0.450000X0.262500X-0.450000X0.262500X0.450000X-0.262500X0.450000X0*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD16R,1.000000X3.200000*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD17RoundRect,0.250000X0.262500X0.450000X-0.262500X0.450000X-0.262500X-0.450000X0.262500X-0.450000X0*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD18RoundRect,0.250000X0.250000X0.475000X-0.250000X0.475000X-0.250000X-0.475000X0.250000X-0.475000X0*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD19R,2.500000X1.000000*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD20R,1.000000X1.800000*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD21RoundRect,0.150000X-0.587500X-0.150000X0.587500X-0.150000X0.587500X0.150000X-0.587500X0.150000X0*% +%TD*% +%TA.AperFunction,SMDPad,CuDef*% +%ADD22RoundRect,0.150000X0.587500X0.150000X-0.587500X0.150000X-0.587500X-0.150000X0.587500X-0.150000X0*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD23O,1.800000X3.600000*% +%TD*% +%TA.AperFunction,ComponentPad*% +%ADD24RoundRect,0.250000X-0.650000X-1.550000X0.650000X-1.550000X0.650000X1.550000X-0.650000X1.550000X0*% +%TD*% +%TA.AperFunction,ViaPad*% +%ADD25C,0.800000*% +%TD*% +%TA.AperFunction,Conductor*% +%ADD26C,0.350000*% +%TD*% +%TA.AperFunction,Conductor*% +%ADD27C,0.500000*% +%TD*% +%TA.AperFunction,Conductor*% +%ADD28C,0.250000*% +%TD*% +G04 APERTURE END LIST* +D10* +%TO.P,J6,1,Pin_1*% +%TO.N,+3.3V*% +X130810000Y-87630000D03* +D11* +%TO.P,J6,2,Pin_2*% +%TO.N,Net-(J5-+3.3V)*% +X130810000Y-90170000D03* +%TD*% +D12* +%TO.P,U2,4,-OUT*% +%TO.N,Net-(J5-+3.3V)*% +X159802372Y-117369206D03* +%TO.P,U2,3,+OUT*% +X159802372Y-101531072D03* +%TO.P,U2,2,-IN*% +%TO.N,+12V*% +X121920000Y-117348000D03* +%TO.P,U2,1,+IN*% +X121920000Y-101600000D03* +%TD*% +D13* +%TO.P,J5,2,+3.3V*% +%TO.N,Net-(J5-+3.3V)*% +X121615000Y-92670000D03* +D14* +%TO.P,J5,1,+12V*% +%TO.N,+12V*% +X121615000Y-87670000D03* +%TD*% +D15* +%TO.P,R8,1*% +%TO.N,Net-(U1-GPIO2)*% +X151684769Y-76173013D03* +%TO.P,R8,2*% +%TO.N,+3.3V*% +X153509769Y-76173013D03* +%TD*% +D10* +%TO.P,J4,1,Pin_1*% +%TO.N,Net-(J4-Pin_1)*% +X165125000Y-73670000D03* +D11* +%TO.P,J4,2,Pin_2*% +%TO.N,Net-(J4-Pin_2)*% +X165125000Y-76210000D03* +%TO.P,J4,3,Pin_3*% +%TO.N,Net-(J4-Pin_3)*% +X165125000Y-78750000D03* +%TO.P,J4,4,Pin_4*% +%TO.N,GND*% +X165125000Y-81290000D03* +%TD*% +D16* +%TO.P,SW1,1,1*% +%TO.N,GND*% +X165290000Y-94430000D03* +X165290000Y-87630000D03* +%TO.P,SW1,2,2*% +%TO.N,Net-(J4-Pin_3)*% +X161290000Y-87630000D03* +X161290000Y-94430000D03* +%TD*% +D17* +%TO.P,R7,1*% +%TO.N,Net-(U1-~{RST})*% +X130906778Y-65980249D03* +%TO.P,R7,2*% +%TO.N,+3.3V*% +X129081778Y-65980249D03* +%TD*% +%TO.P,R6,1*% +%TO.N,Net-(U1-EN)*% +X130740884Y-69930929D03* +%TO.P,R6,2*% +%TO.N,+3.3V*% +X128915884Y-69930929D03* +%TD*% +D15* +%TO.P,R5,2*% +%TO.N,+3.3V*% +X153501992Y-74038197D03* +%TO.P,R5,1*% +%TO.N,Net-(J4-Pin_3)*% +X151676992Y-74038197D03* +%TD*% +D17* +%TO.P,R4,2*% +%TO.N,Net-(U1-GPIO15)*% +X151676331Y-78304980D03* +%TO.P,R4,1*% +%TO.N,GND*% +X153501331Y-78304980D03* +%TD*% +D11* +%TO.P,J3,3,Pin_3*% +%TO.N,GND*% +X152400000Y-124155000D03* +%TO.P,J3,2,Pin_2*% +%TO.N,Net-(J1-RED{slash}CTRL)*% +X149860000Y-124155000D03* +D10* +%TO.P,J3,1,Pin_1*% +%TO.N,Net-(J1-BLK{slash}OBST)*% +X147320000Y-124155000D03* +%TD*% +D18* +%TO.P,C1,1*% +%TO.N,+3.3V*% +X130868589Y-79742136D03* +%TO.P,C1,2*% +%TO.N,GND*% +X128968589Y-79742136D03* +%TD*% +D17* +%TO.P,R3,2*% +%TO.N,Net-(Q2-G)*% +X151528688Y-69867106D03* +%TO.P,R3,1*% +%TO.N,GND*% +X153353688Y-69867106D03* +%TD*% +D19* +%TO.P,U1,1,~{RST}*% +%TO.N,Net-(U1-~{RST})*% +X133577159Y-65888892D03* +%TO.P,U1,2,ADC*% +%TO.N,unconnected-(U1-ADC-Pad2)*% +X133577159Y-67888892D03* +%TO.P,U1,3,EN*% +%TO.N,Net-(U1-EN)*% +X133577159Y-69888892D03* +%TO.P,U1,4,GPIO16*% +%TO.N,unconnected-(U1-GPIO16-Pad4)*% +X133577159Y-71888892D03* +%TO.P,U1,5,GPIO14*% +%TO.N,unconnected-(U1-GPIO14-Pad5)*% +X133577159Y-73888892D03* +%TO.P,U1,6,GPIO12*% +%TO.N,unconnected-(U1-GPIO12-Pad6)*% +X133577159Y-75888892D03* +%TO.P,U1,7,GPIO13*% +%TO.N,Net-(U1-GPIO13)*% +X133577159Y-77888892D03* +%TO.P,U1,8,VCC*% +%TO.N,+3.3V*% +X133577159Y-79888892D03* +D20* +%TO.P,U1,9,CS0*% +%TO.N,unconnected-(U1-CS0-Pad9)*% +X136177159Y-81388892D03* +%TO.P,U1,10,MISO*% +%TO.N,unconnected-(U1-MISO-Pad10)*% +X138177159Y-81388892D03* +%TO.P,U1,11,GPIO9*% +%TO.N,unconnected-(U1-GPIO9-Pad11)*% +X140177159Y-81388892D03* +%TO.P,U1,12,GPIO10*% +%TO.N,unconnected-(U1-GPIO10-Pad12)*% +X142177159Y-81388892D03* +%TO.P,U1,13,MOSI*% +%TO.N,unconnected-(U1-MOSI-Pad13)*% +X144177159Y-81388892D03* +%TO.P,U1,14,SCLK*% +%TO.N,unconnected-(U1-SCLK-Pad14)*% +X146177159Y-81388892D03* +D19* +%TO.P,U1,15,GND*% +%TO.N,GND*% +X148777159Y-79888892D03* +%TO.P,U1,16,GPIO15*% +%TO.N,Net-(U1-GPIO15)*% +X148777159Y-77888892D03* +%TO.P,U1,17,GPIO2*% +%TO.N,Net-(U1-GPIO2)*% +X148777159Y-75888892D03* +%TO.P,U1,18,GPIO0*% +%TO.N,Net-(J4-Pin_3)*% +X148777159Y-73888892D03* +%TO.P,U1,19,GPIO4*% +%TO.N,Net-(Q1-D)*% +X148777159Y-71888892D03* +%TO.P,U1,20,GPIO5*% +%TO.N,Net-(Q2-G)*% +X148777159Y-69888892D03* +%TO.P,U1,21,GPIO3/RXD*% +%TO.N,Net-(J4-Pin_2)*% +X148777159Y-67888892D03* +%TO.P,U1,22,GPIO1/TXD*% +%TO.N,Net-(J4-Pin_1)*% +X148777159Y-65888892D03* +%TD*% +D21* +%TO.P,Q2,1,G*% +%TO.N,Net-(Q2-G)*% +X155900697Y-71506955D03* +%TO.P,Q2,2,S*% +%TO.N,GND*% +X155900697Y-73406955D03* +%TO.P,Q2,3,D*% +%TO.N,Net-(J1-RED{slash}CTRL)*% +X157775697Y-72456955D03* +%TD*% +D22* +%TO.P,Q1,1,G*% +%TO.N,Net-(J1-RED{slash}CTRL)*% +X157853002Y-78420000D03* +%TO.P,Q1,2,S*% +%TO.N,GND*% +X157853002Y-76520000D03* +%TO.P,Q1,3,D*% +%TO.N,Net-(Q1-D)*% +X155978002Y-77470000D03* +%TD*% +D23* +%TO.P,J2,3,Pin_3*% +%TO.N,GND*% +X153670000Y-131775000D03* +%TO.P,J2,2,Pin_2*% +%TO.N,Net-(J1-RED{slash}CTRL)*% +X150170000Y-131775000D03* +D24* +%TO.P,J2,1,Pin_1*% +%TO.N,Net-(J1-BLK{slash}OBST)*% +X146670000Y-131775000D03* +%TD*% +D13* +%TO.P,J1,3,WHT/GND*% +%TO.N,GND*% +X139700000Y-130810000D03* +%TO.P,J1,2,RED/CTRL*% +%TO.N,Net-(J1-RED{slash}CTRL)*% +X134700000Y-130810000D03* +D14* +%TO.P,J1,1,BLK/OBST*% +%TO.N,Net-(J1-BLK{slash}OBST)*% +X129700000Y-130810000D03* +%TD*% +D17* +%TO.P,R2,1*% +%TO.N,Net-(U1-GPIO13)*% +X130783272Y-77596706D03* +%TO.P,R2,2*% +%TO.N,GND*% +X128958272Y-77596706D03* +%TD*% +D15* +%TO.P,R1,1*% +%TO.N,Net-(J1-BLK{slash}OBST)*% +X129042031Y-75251434D03* +%TO.P,R1,2*% +%TO.N,Net-(U1-GPIO13)*% +X130867031Y-75251434D03* +%TD*% +D25* +%TO.N,GND*% +X153641871Y-71148129D03* +X129540000Y-81280000D03* +X151130000Y-80010000D03* +%TO.N,Net-(J4-Pin_3)*% +X152377435Y-72613392D03* +X162560000Y-77470000D03* +%TO.N,GND*% +X165100000Y-97790000D03* +%TD*% +D26* +%TO.N,GND*% +X153353688Y-69867106D02* +X153353688Y-70859946D01* +X153353688Y-70859946D02* +X153641871Y-71148129D01* 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+X134327159Y-79888892D01* +X130778892Y-79816338D02* +X130851446Y-79888892D01* +%TO.N,Net-(U1-GPIO13)*% +X131075458Y-77888892D02* +X133577159Y-77888892D01* +X130783272Y-77596706D02* +X131075458Y-77888892D01* +X130867031Y-75251434D02* +X130867031Y-77512947D01* +X130867031Y-77512947D02* +X130783272Y-77596706D01* +%TO.N,Net-(J1-BLK{slash}OBST)*% +X133205000Y-134315000D02* +X144130000Y-134315000D01* +X129700000Y-130810000D02* +X133205000Y-134315000D01* +X144130000Y-134315000D02* +X146670000Y-131775000D01* +X147320000Y-131125000D02* +X147320000Y-124155000D01* +X146670000Y-131775000D02* +X147320000Y-131125000D01* +%TO.N,Net-(J1-RED{slash}CTRL)*% +X149860000Y-131465000D02* +X150170000Y-131775000D01* +X149860000Y-124155000D02* +X149860000Y-131465000D01* +%TO.N,GND*% +X155956955Y-73406955D02* +X157480000Y-74930000D01* +X155900697Y-73406955D02* +X155956955Y-73406955D01* +X157853002Y-75303002D02* +X157480000Y-74930000D01* +X157853002Y-76520000D02* +X157853002Y-75303002D01* +%TO.N,Net-(J4-Pin_2)*% +X156803892Y-67888892D02* +X148777159Y-67888892D01* +X165125000Y-76210000D02* +X156803892Y-67888892D01* +%TO.N,Net-(J4-Pin_1)*% +X157343892Y-65888892D02* +X148777159Y-65888892D01* +X165125000Y-73670000D02* +X157343892Y-65888892D01* +%TO.N,GND*% +X165290000Y-97600000D02* +X165100000Y-97790000D01* +X165290000Y-94430000D02* +X165290000Y-97600000D01* +X165290000Y-81455000D02* +X165125000Y-81290000D01* +X165290000Y-87630000D02* +X165290000Y-81455000D01* +%TO.N,Net-(J4-Pin_3)*% +X161290000Y-87630000D02* +X161290000Y-82585000D01* +X161290000Y-82585000D02* +X165125000Y-78750000D01* +X161290000Y-87630000D02* +X161290000Y-94430000D01* +%TO.N,GND*% +X165290000Y-94430000D02* +X165290000Y-87630000D01* +%TD*% +M02* diff --git a/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-F_Mask.gts b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-F_Mask.gts new file mode 100644 index 0000000..efa5e43 --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-F_Mask.gts @@ -0,0 +1,201 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:36-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Soldermask,Top*% +%TF.FilePolarity,Negative*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 2023-11-07 14:59:36* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 Aperture macros list* +%AMRoundRect* +0 Rectangle with rounded corners* +0 $1 Rounding radius* +0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* +0 Add a 4 corners polygon primitive as box body* +4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* +0 Add four circle primitives for the rounded corners* +1,1,$1+$1,$2,$3* +1,1,$1+$1,$4,$5* +1,1,$1+$1,$6,$7* +1,1,$1+$1,$8,$9* +0 Add four rect primitives between the rounded corners* +20,1,$1+$1,$2,$3,$4,$5,0* +20,1,$1+$1,$4,$5,$6,$7,0* +20,1,$1+$1,$6,$7,$8,$9,0* +20,1,$1+$1,$8,$9,$2,$3,0*% +G04 Aperture macros list end* +%ADD10R,1.700000X1.700000*% +%ADD11O,1.700000X1.700000*% +%ADD12R,4.572000X4.572000*% +%ADD13C,2.600000*% +%ADD14R,2.600000X2.600000*% +%ADD15RoundRect,0.250000X-0.262500X-0.450000X0.262500X-0.450000X0.262500X0.450000X-0.262500X0.450000X0*% +%ADD16R,1.000000X3.200000*% +%ADD17RoundRect,0.250000X0.262500X0.450000X-0.262500X0.450000X-0.262500X-0.450000X0.262500X-0.450000X0*% +%ADD18RoundRect,0.250000X0.250000X0.475000X-0.250000X0.475000X-0.250000X-0.475000X0.250000X-0.475000X0*% +%ADD19C,5.000000*% +%ADD20R,2.500000X1.000000*% +%ADD21R,1.000000X1.800000*% +%ADD22RoundRect,0.150000X-0.587500X-0.150000X0.587500X-0.150000X0.587500X0.150000X-0.587500X0.150000X0*% +%ADD23RoundRect,0.150000X0.587500X0.150000X-0.587500X0.150000X-0.587500X-0.150000X0.587500X-0.150000X0*% +%ADD24O,1.800000X3.600000*% +%ADD25RoundRect,0.250000X-0.650000X-1.550000X0.650000X-1.550000X0.650000X1.550000X-0.650000X1.550000X0*% +G04 APERTURE END LIST* +D10* +%TO.C,J6*% +X130810000Y-87630000D03* +D11* +X130810000Y-90170000D03* +%TD*% +D12* +%TO.C,U2*% +X159802372Y-117369206D03* +X159802372Y-101531072D03* +X121920000Y-117348000D03* +X121920000Y-101600000D03* +%TD*% +D13* +%TO.C,J5*% +X121615000Y-92670000D03* +D14* +X121615000Y-87670000D03* +%TD*% +D15* +%TO.C,R8*% +X151684769Y-76173013D03* +X153509769Y-76173013D03* +%TD*% +D10* +%TO.C,J4*% +X165125000Y-73670000D03* +D11* +X165125000Y-76210000D03* +X165125000Y-78750000D03* +X165125000Y-81290000D03* +%TD*% +D16* +%TO.C,SW1*% +X165290000Y-94430000D03* +X165290000Y-87630000D03* +X161290000Y-87630000D03* +X161290000Y-94430000D03* +%TD*% +D17* +%TO.C,R7*% +X130906778Y-65980249D03* +X129081778Y-65980249D03* +%TD*% +%TO.C,R6*% +X130740884Y-69930929D03* +X128915884Y-69930929D03* +%TD*% +D15* +%TO.C,R5*% +X153501992Y-74038197D03* +X151676992Y-74038197D03* +%TD*% +D17* +%TO.C,R4*% +X151676331Y-78304980D03* +X153501331Y-78304980D03* +%TD*% +D11* +%TO.C,J3*% +X152400000Y-124155000D03* +X149860000Y-124155000D03* +D10* +X147320000Y-124155000D03* +%TD*% +D18* +%TO.C,C1*% +X130868589Y-79742136D03* +X128968589Y-79742136D03* +%TD*% +D17* +%TO.C,R3*% +X151528688Y-69867106D03* +X153353688Y-69867106D03* +%TD*% +D19* +%TO.C,REF\u002A\u002A*% +X162560000Y-63500000D03* +%TD*% +%TO.C,REF\u002A\u002A*% +X162560000Y-130505000D03* +%TD*% +D20* +%TO.C,U1*% +X133577159Y-65888892D03* +X133577159Y-67888892D03* +X133577159Y-69888892D03* +X133577159Y-71888892D03* +X133577159Y-73888892D03* +X133577159Y-75888892D03* +X133577159Y-77888892D03* +X133577159Y-79888892D03* +D21* +X136177159Y-81388892D03* +X138177159Y-81388892D03* +X140177159Y-81388892D03* +X142177159Y-81388892D03* +X144177159Y-81388892D03* +X146177159Y-81388892D03* +D20* +X148777159Y-79888892D03* +X148777159Y-77888892D03* +X148777159Y-75888892D03* +X148777159Y-73888892D03* +X148777159Y-71888892D03* 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index 0000000..cb88d0e --- /dev/null +++ b/kicad_files/Bare ESP8266/Gerber Files/RatGDO-OpenSource-Bare-ESP8266-F_Paste.gtp @@ -0,0 +1,131 @@ +%TF.GenerationSoftware,KiCad,Pcbnew,7.0.7*% +%TF.CreationDate,2023-11-07T14:59:35-07:00*% +%TF.ProjectId,RatGDO-OpenSource-Bare-ESP8266,52617447-444f-42d4-9f70-656e536f7572,rev?*% +%TF.SameCoordinates,Original*% +%TF.FileFunction,Paste,Top*% +%TF.FilePolarity,Positive*% +%FSLAX46Y46*% +G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)* +G04 Created by KiCad (PCBNEW 7.0.7) date 2023-11-07 14:59:35* +%MOMM*% +%LPD*% +G01* +G04 APERTURE LIST* +G04 Aperture macros list* +%AMRoundRect* +0 Rectangle with rounded corners* +0 $1 Rounding radius* +0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners* +0 Add a 4 corners polygon primitive as box body* +4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0* +0 Add four circle primitives for the rounded corners* +1,1,$1+$1,$2,$3* +1,1,$1+$1,$4,$5* +1,1,$1+$1,$6,$7* +1,1,$1+$1,$8,$9* +0 Add four rect primitives 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1 (from F.Cu to B.Cu)" + }, + { + "Type": "Copper", + "Name": "B.Cu" + }, + { + "Type": "SolderMask", + "Name": "Bottom Solder Mask" + }, + { + "Type": "SolderPaste", + "Name": "Bottom Solder Paste" + }, + { + "Type": "Legend", + "Name": "Bottom Silk Screen" + } + ] +} diff --git a/kicad_files/Bare ESP8266/LM2596_Buck_Converter_Library/Custom_dc_dc_small.kicad_sym b/kicad_files/Bare ESP8266/LM2596_Buck_Converter_Library/Custom_dc_dc_small.kicad_sym new file mode 100644 index 0000000..fc7ae0e --- /dev/null +++ b/kicad_files/Bare ESP8266/LM2596_Buck_Converter_Library/Custom_dc_dc_small.kicad_sym @@ -0,0 +1,106 @@ +(kicad_symbol_lib (version 20220914) (generator kicad_symbol_editor) + (symbol "DC/DC_LM2596_E" (pin_names (offset 0.0254)) (in_bom yes) (on_board yes) + (property "Reference" "U" (at 0.254 5.588 0) + (effects (font (size 1.524 1.524))) + ) + (property "Value" "DC/DC_LM2596_E" (at 0 0.508 0) + (effects (font (size 0.762 0.762))) + ) + (property "Footprint" "DC/DC_LM2596" (at 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(effects (font (size 1.016 1.016)))) + ) + ) + ) +) diff --git a/kicad_files/Bare ESP8266/LM2596_Buck_Converter_Library/DC_DC_LM2596_small.pretty/DC_DC_LM2596_Enable.kicad_mod b/kicad_files/Bare ESP8266/LM2596_Buck_Converter_Library/DC_DC_LM2596_small.pretty/DC_DC_LM2596_Enable.kicad_mod new file mode 100644 index 0000000..e23e36d --- /dev/null +++ b/kicad_files/Bare ESP8266/LM2596_Buck_Converter_Library/DC_DC_LM2596_small.pretty/DC_DC_LM2596_Enable.kicad_mod @@ -0,0 +1,34 @@ +(module DC_DC_LM2596_Enable placed (layer F.Cu) (tedit 59C7D635) + (fp_text reference U3 (at 0.1016 -2.3368) (layer F.SilkS) + (effects (font (size 1.5 1.5) (thickness 0.15))) + ) + (fp_text value DC/DC_E (at 0.0508 -5.588) (layer F.SilkS) + (effects (font (size 1.5 1.5) (thickness 0.15))) + ) + (fp_line (start -5.1308 12.7) (end -30.48 12.7254) (layer F.SilkS) (width 0.15)) + (fp_line (start -5.1308 16.7894) (end -5.1308 12.7) (layer F.SilkS) (width 0.15)) + (fp_line (start 5.0546 12.7) (end 5.0546 16.7894) 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+
+
+ + + + diff --git a/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_pcb b/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_pcb index 462847d..918509f 100644 --- a/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_pcb +++ b/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_pcb @@ -118,6 +118,7 @@ (net 40 "unconnected-(U2-NC-Pad3)") (net 41 "unconnected-(U2-GND-Pad1)") (net 42 "unconnected-(U2-RST-Pad2)") + (net 43 "Net-(U1-IO_23{slash}D7)") (footprint "Resistor_SMD:R_0805_2012Metric" (layer "F.Cu") (tstamp 1d510a84-4f2c-46f3-9090-2dca07a95c59) @@ -406,9 +407,8 @@ (at 140.97 77.47) (property "Sheetfile" "RatGDO-OpenSource-D1Mini-ESP32.kicad_sch") (property "Sheetname" "") - (path "/33d2b6be-18d2-4d4e-a22d-b72f0d92db23") (attr through_hole) - (fp_text reference "U2" (at 7.62 19.05) (layer "F.SilkS") + (fp_text reference "U1" (at 7.62 19.05) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) (tstamp 821d0374-330c-4751-8d78-1ae603cf1e1f) ) @@ -981,7 +981,7 @@ (fp_line (start 1 0.625) (end -1 0.625) (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp fb2a485d-29fa-4a66-b197-4d086052b933)) (pad "1" smd roundrect (at -0.9125 0 180) (size 1.025 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.243902439) - (net 8 "Net-(U2-IO_23{slash}D7)") (pintype "passive") (tstamp db8613f2-ccbe-468d-9cf4-d2904c1a1ced)) + (net 43 "Net-(U1-IO_23{slash}D7)") (pintype "passive") (tstamp db8613f2-ccbe-468d-9cf4-d2904c1a1ced)) (pad "2" smd roundrect (at 0.9125 0 180) (size 1.025 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.243902439) (net 6 "GND") (pintype "passive") (tstamp 55279782-cfec-47bb-bbc6-9382d2379aed)) (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl" @@ -1037,7 +1037,7 @@ (pad "1" smd roundrect (at -0.9125 0) (size 1.025 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.243902439) (net 1 "Net-(J1-BLK{slash}OBST)") (pintype "passive") (tstamp 08132efd-dc81-4eb6-9868-77534d4c86dd)) (pad "2" smd roundrect (at 0.9125 0) (size 1.025 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.243902439) - (net 8 "Net-(U2-IO_23{slash}D7)") (pintype "passive") (tstamp d2dd82b0-8b3f-4e96-8b9f-2ed218a016c6)) + (net 43 "Net-(U1-IO_23{slash}D7)") (pintype "passive") (tstamp d2dd82b0-8b3f-4e96-8b9f-2ed218a016c6)) (model "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl" (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) diff --git a/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_sch b/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_sch index 82a7972..16e39f9 100644 --- a/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_sch +++ b/kicad_files/D1 Mini - ESP32/RatGDO-OpenSource-D1Mini-ESP32.kicad_sch @@ -1172,7 +1172,7 @@ (symbol (lib_id "ESP32_mini:mini_esp32") (at 72.39 52.07 0) (unit 1) (in_bom yes) (on_board yes) (dnp no) (fields_autoplaced) (uuid 33d2b6be-18d2-4d4e-a22d-b72f0d92db23) - (property "Reference" "U2" (at 73.025 48.26 0) + (property "Reference" "U1" (at 73.025 48.26 0) (effects (font (size 1.27 1.27))) ) (property "Value" "mini_esp32" (at 73.025 50.8 0) @@ -1227,7 +1227,7 @@ (instances (project "RatGDO-OpenSource-D1Mini-ESP32" (path "/d526daf5-1a87-4c4a-b8db-6120ccadc008" - (reference "U2") (unit 1) + (reference "U1") (unit 1) ) ) ) diff --git a/kicad_files/D1 Mini - ESP8266/RatGDO-OpenSource-D1Mini-ESP8266.kicad_sch b/kicad_files/D1 Mini - ESP8266/RatGDO-OpenSource-D1Mini-ESP8266.kicad_sch index 2658a88..76ca388 100644 --- a/kicad_files/D1 Mini - ESP8266/RatGDO-OpenSource-D1Mini-ESP8266.kicad_sch +++ b/kicad_files/D1 Mini - ESP8266/RatGDO-OpenSource-D1Mini-ESP8266.kicad_sch @@ -744,7 +744,7 @@ (stroke (width 0) (type default)) (uuid 1783b3b7-9804-4350-9e6a-f6c814e4c687) ) - (polyline (pts (xy 182.88 76.2) (xy 222.25 76.2)) + (polyline (pts (xy 181.61 76.2) (xy 222.25 76.2)) (stroke (width 0) (type default)) (uuid 19e99740-a6e3-4c80-8d14-43c00e616879) ) @@ -769,7 +769,7 @@ (stroke (width 0) (type default)) (uuid 35d5ea3b-3ea4-4f01-a8c5-39d309cb0bcd) ) - (polyline (pts (xy 182.88 97.79) (xy 222.25 97.79)) + (polyline (pts (xy 181.61 97.79) (xy 222.25 97.79)) (stroke (width 0) (type default)) (uuid 3a2e896e-d12a-4250-bc13-96497830bce4) ) @@ -839,7 +839,7 @@ (stroke (width 0) (type default)) (uuid ba267bfe-57ea-4165-b62c-00359be197ed) ) - (polyline (pts (xy 182.88 76.2) (xy 182.88 97.79)) + (polyline (pts (xy 181.61 76.2) (xy 181.61 97.79)) (stroke (width 0) (type default)) (uuid ba3cd3fe-e030-47e9-a751-224d4a46d44c) )