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ACA-HLS

Advanced Computer Architecture with High-Level-Synthesis [2021 Spring]

Table of Contents
  1. About This Project
  2. Lab A
  3. Lab B
  4. Final Projects

About This Project

The project is a collection of projects of the course "Advanced Computer Architecture with High-Level-Synthesis" taught in the National Taiwan University CSIE Department.

Note: The platform used by the projects, include PYNQ-Z2, and Xilinx U50.

Lab A

Lab A is about HLS Blue Book. This part provides implementation for High-Level Synthesis Blue Book's Examples using Xilinx HLS. This is one lab from NTU CSIE's Advanced Computer Architecture Course(CSIE5059 2021 Spring).

Chapters Backup
Chapter3 - Bit Accurate Data Types link
Chapter4 - Fundamental of High Level Synthesis link
Chapter5 - Scheduling of IO and Memories link
Chapter6.1 - 6.4 - Sequential and Combinational Hardware link
Chapter6.5 - 6.8 - Sequential and Combinational Hardware link
Chapter7 - Memory Architecture link
Chapter8 - Hierarchical Design link
Chapter9 - Advanced Hierarchical Design link
Chapter10.1 - 10.3 - Digital Filter link
Chapter10.4 - 10.6 - Digital Filter link
Chapter11 - FFT Transformation link

Lab B

Lab B is about Improved Existing Projects.

Topics Slides Backup
swater link link
sha256 link link
BNN link link
K-NN link link
beamf link link
Spare Matrix Vector link link
ethash link link
CORDIC link link
XAPP890 - Sobel Filter link link
point5 link link

Final Projects

Topics Slides Backup
Encrypted Computing link link
RISC-V CPU with Tomasulo Algorithm link link
Hardware Design of Ciphers via HLS : the case of PRESENT link link
SBM for HFT link link
Efficient deconvolution with HLS link link
Optical flow link link
Harris Corner Detector link link
Implementation of Simulated Quantum Annealing using HLS link link
System Design on Xilinx Algorithmic Trading Platform(non-public) link (non-public)
COMET with branch predictor link link
DNA Sequence Analysis Acceleration link link

Releases

No releases published

Packages

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