- About This Repository
- Lab A - UG871
- Lab B - Vitis Tutorials
- Lab C - Vitis Libraries
- Final Projects
- References
This repository is a collection of students' labs and final projects from the course "Application Acceleration with High-Level-Synthesis" taught in the Institute of Electronics, National Yang Ming Chiao Tung University.
Files in this repository are snapshots of their original repositories at the end of the semester, in case the original links are failed.
See the tables below for the links to their original repositories.
Note: Platforms used by these projects include TUL PYNQ-Z2 and Xilinx Alveo U50.
For Lab A, students practiced the labs in UG871 [1] and tried to analyze the designs or improve them.
Topics | Students (Links) |
---|---|
Design Optimization | Chih-Chia Hsu |
streaming_free_running_k2k | Chen-Feng Wang |
Using HLS IP in IP Integrator | Jia-Yuan Chang |
Using HLS IP in a Zynq SoC Design | Sheng-Wen Chen |
For Lab B, students practiced the labs in Vitis-Tutorials [2] or pp4fpga and tried to analyze the designs or improve them.
Topics (Links to folders in Xilinx official repository) | Students (Links) |
---|---|
Traveling Salesperson Problem | Siou-Sian Lin |
Matrix Multiplication | Chih-Chieh Lai |
Prefix Sum and Histogram | Jhih-Yong Mai |
Sorting Algorithm | Chi-Han Chen |
Spare Matrix Vector | Jin-Xuan Hu |
For Lab C, students tried out the Vitis Libraries [3] and used them to build an end-to-end application acceleration.
Topics (Links) | Students |
---|---|
HDR | Jia-Yuan Chang, Chi-Han Chen |
Security | Chen-Feng Wang |
Vitis Solver Library: LU Decomposition | Jhih-Yong Mai, Chih-Chieh Lai |
Color Detection | Jin-Xuan Hu, Siou-Sian Lin |
Blob From Image | Sheng-Wen Chen, Chih-Chia Hsu |
Topics (Links) | Students |
---|---|
Defeat Detection with FINN | Jia-Yuan Chang, Chi-Han Chen |
Smith-Waterman Algorithm | Chen-Feng Wang, Jhih-Yong Mai, Chih-Chieh Lai |
Scalable Streaming Accelerator of GCN | Jin-Xuan Hu, Siou-Sian Lin |
Obstacle avoidance by SGBM | Sheng-Wen Chen, Chih-Chia Hsu |
[1] Xilinx UG871 - Vivado Design Suite Tutorial: High-Level Synthesis
[2] Xilinx Vitis-Tutorials (https://github.com/Xilinx/Vitis-Tutorials)
[3] Xilinx Vitis Libraries (https://github.com/Xilinx/Vitis_Libraries)