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老師上課說 :可以擇一,但要自己權衡優化的效率。例如:做UART和QS優化,卻沒做SDRAM優化可能效果沒那麼明顯。 |
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可以擇一優化,主要以能實作出來為主 |
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Final Project is very open, the only requirement is to complete the 4 workload (fir, matmul, qs, and uart )。Don't limit yourself. |
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想請問一下Final Project是從lab 4-2,UART,SDRAM或其他Accelerators中,至少擇一做優化嗎,還是說是全部都要做優化,並且想請問優化的方式需照講義或者是自行改變架構也可以?
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