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Restructure handling of CA1, CA2, CB1, CB2 lines on MOS 652x chips #42
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Codecov ReportAttention: Patch coverage is
Additional details and impacted files@@ Coverage Diff @@
## main #42 +/- ##
==========================================
- Coverage 27.31% 27.27% -0.04%
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Files 44 42 -2
Lines 9055 9112 +57
==========================================
+ Hits 2473 2485 +12
- Misses 6582 6627 +45 ☔ View full report in Codecov by Sentry. |
This looks good to me, my only question I have is to double check if the CA/CB lines can change state without triggering the IRQ line as the Apple I straight up doesn't have that connected |
Should be supported in ce03a82! Appreciate you pointing this out |
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lgtm
Previously, the
Port
interface only provided apoll
method to get whether theIRQ
line should be set high. Ultimately, this glosses over a lot of complexity in how the control lines are handled in the PIA, VIA, and CIA. For instance, CX2 can be used as an output, and there are details regarding rising/falling edge directions and which flags should be set in the VIA and CIA.The existing Commodore machines worked fine with the simplified model, but @nkizz's work with the Apple I ran across some limitations of this representation. Additionally, existing emulators can now be enhanced with more features (e.g. this allows the PET emulator to blank the screen when CA2 is written to).
Most importantly, this migrates the
Port
interface into themos652x
module and modifies it as follows:read()
andwrite()
are nowread_data()
andwrite_data()
poll()
now returns a 2-tuple with the value of CX1 and CX2 (high or low)write_cx2()
writes a value to CX2 (currently blanks the screen in the PET emulator)Test with the following BASIC in the PET emulator: (should blank the screen)
Detection of rising and falling edges is handled higher in the abstraction (within the
mos652x
module).