From e2846f7e53f591ac1627685dd35e4a8e3668656c Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 28 Oct 2024 18:58:59 +0100 Subject: [PATCH 001/138] :bug: the `AFTER_FIRST_SOLUTION` mode now actually terminates after the first operational gate is designed --- .../physical_design/design_sidb_gates.hpp | 25 +++++++++++++------ .../physical_design/design_sidb_gates.cpp | 21 +++++++++++++--- 2 files changed, 36 insertions(+), 10 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index ccaa20785..a9d85a7ff 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -225,17 +225,20 @@ class design_sidb_gates_impl { { const std::lock_guard lock_vector{mutex_to_protect_designed_gate_layouts}; + + // ensure only one designed gate is returned when AFTER_FIRST_SOLUTION is the termination condition + if (params.termination_cond == + design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION && + solution_found) + { + return; + } + designed_gate_layouts.push_back(layout_with_added_cells); } solution_found = true; } - - if (solution_found && (params.termination_cond == - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION)) - { - return; - } }; const std::size_t number_of_used_threads = @@ -250,13 +253,21 @@ class design_sidb_gates_impl for (std::size_t i = 0; i < number_of_used_threads; ++i) { threads.emplace_back( - [i, chunk_size, &all_combinations, &add_combination_to_layout_and_check_operation]() + [this, i, chunk_size, &all_combinations, &add_combination_to_layout_and_check_operation, + &solution_found]() { const std::size_t start_index = i * chunk_size; const std::size_t end_index = std::min(start_index + chunk_size, all_combinations.size()); for (std::size_t j = start_index; j < end_index; ++j) { + if (params.termination_cond == + design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION && + solution_found) + { + return; + } + add_combination_to_layout_and_check_operation(all_combinations[j]); } }); diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 648cf08f1..519f3d653 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -116,7 +116,20 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); - REQUIRE(found_gate_layouts.size() == 4); + CHECK(found_gate_layouts.size() == 4); + } + SECTION("Four cells in canvas, design one gate with one SiDB in the canvas (terminate on first found)") + { + const auto params = design_sidb_gates_params>{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, + design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + {{10, 4, 0}, {13, 4, 0}}, + 1, + design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION}; + + const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); + + CHECK(found_gate_layouts.size() == 1); } SECTION("Four cells in canvas, design process is terminated after first solution is found (one SiDB in the " "canvas), QuickExact") @@ -366,8 +379,10 @@ TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") CHECK(found_gate_layouts_quickcell.front().num_defects() == 1); CHECK(found_gate_layouts_quickcell.front().num_cells() == lyt.num_cells() + 2); - found_gate_layouts_quickcell.front().foreach_cell([](const auto& cell) - { CHECK(cell != siqad::coord_t{16, 10, 0}); }); + found_gate_layouts_quickcell.front().foreach_cell( + [](const auto& cell) { + CHECK(cell != siqad::coord_t{16, 10, 0}); + }); } } From 108bb4072034b937156edb615e37851d1c019b1c Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 28 Oct 2024 21:44:32 +0100 Subject: [PATCH 002/138] :zap: operational status assessment can now return the simulation results that certified the status `OPERATIONAL` --- .../simulation/sidb/is_operational.hpp | 24 ++++- .../physical_design/design_sidb_gates.hpp | 2 +- .../simulation/sidb/is_operational.hpp | 98 +++++++++++++++---- .../simulation/sidb/operational_domain.hpp | 4 +- .../simulation/sidb/is_operational.cpp | 58 ++++++++--- 5 files changed, 147 insertions(+), 39 deletions(-) diff --git a/bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index b9ceff4bf..dd601491d 100644 --- a/bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -22,7 +22,7 @@ namespace detail { template -void is_operational(pybind11::module& m) +void is_operational(pybind11::module& m, const std::string& lattice = "") { using namespace pybind11::literals; @@ -32,6 +32,15 @@ void is_operational(pybind11::module& m) m.def("operational_input_patterns", &fiction::operational_input_patterns, "lyt"_a, "spec"_a, "params"_a = fiction::is_operational_params{}, DOC(fiction_operational_input_patterns)); + + pybind11::class_>( + m, fmt::format("sidb_simulation_result{}", lattice).c_str(), DOC(fiction_operational_status_assessment_stats)) + .def(pybind11::init<>()) + .def_readwrite("simulation_results", &fiction::operational_status_assessment_stats::simulation_results, + DOC(fiction_operational_status_assessment_stats_simulation_results)) + .def_readwrite("number_of_simulator_invocations", + &fiction::operational_status_assessment_stats::number_of_simulator_invocations, + DOC(fiction_operational_status_assessment_stats_number_of_simulator_invocations)); } } // namespace detail @@ -51,6 +60,15 @@ inline void is_operational(pybind11::module& m) .value("REJECT_KINKS", fiction::operational_condition::REJECT_KINKS, DOC(fiction_operational_condition_REJECT_KINKS)); + py::enum_( + m, "simulation_results_mode", DOC(fiction_is_operational_params_simulation_results_mode)) + .value("KEEP_SIMULATION_RESULTS", + fiction::is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS, + DOC(fiction_is_operational_params_simulation_results_mode_KEEP_SIMULATION_RESULTS)) + .value("DISCARD_SIMULATION_RESULTS", + fiction::is_operational_params::simulation_results_mode::DISCARD_SIMULATION_RESULTS, + DOC(fiction_is_operational_params_simulation_results_mode_DISCARD_SIMULATION_RESULTS)); + py::class_(m, "is_operational_params", DOC(fiction_is_operational_params)) .def(py::init<>()) .def_readwrite("simulation_parameters", &fiction::is_operational_params::simulation_parameters, @@ -63,8 +81,8 @@ inline void is_operational(pybind11::module& m) DOC(fiction_is_operational_params_op_condition)); // NOTE be careful with the order of the following calls! Python will resolve the first matching overload! - detail::is_operational(m); - detail::is_operational(m); + detail::is_operational(m, "_100"); + detail::is_operational(m, "_111"); } } // namespace pyfiction diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index a9d85a7ff..9eb03e1d3 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -218,7 +218,7 @@ class design_sidb_gates_impl // canvas SiDBs are added to the skeleton const auto layout_with_added_cells = skeleton_layout_with_canvas_sidbs(combination); - if (const auto [status, sim_calls] = + if (const auto [status, aux_stats] = is_operational(layout_with_added_cells, truth_table, params.operational_params, std::optional{input_bdl_wires}, std::optional{output_bdl_wires}); status == operational_status::OPERATIONAL) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 41fcdecd3..abb465e35 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -73,6 +73,20 @@ enum class operational_condition : uint8_t */ struct is_operational_params { + /** + * Selector for the different ways to handle obtained simulation results. + */ + enum class simulation_results_mode : uint8_t + { + /** + * The simulation results for each input pattern are returned for operational gates. + */ + KEEP_SIMULATION_RESULTS, + /** + * The simulation results are discarded after the operational status was assessed. + */ + DISCARD_SIMULATION_RESULTS + }; /** * The simulation parameters for the physical simulation of the ground state. */ @@ -86,9 +100,37 @@ struct is_operational_params */ bdl_input_iterator_params input_bdl_iterator_params{}; /** - * Condition which is used to decide if a layout is `operational` or `non-operational`. + * Condition that is used to decide if a layout is `operational` or `non-operational`. */ operational_condition op_condition = operational_condition::TOLERATE_KINKS; + /** + * Simulation results that are used to certify the status `OPERATIONAL` are not kept by default. + */ + simulation_results_mode simulation_results_retention = simulation_results_mode::DISCARD_SIMULATION_RESULTS; +}; + +/** + * This struct is used to collect auxiliary results from the operational status assessment. + * + * @tparam SiDB cell-level layout type. + */ +template +struct operational_status_assessment_stats +{ + /** + * Simulation results for each input are only kept when the simulation results retention is set to + * `simulation_results_mode::KEEP_SIMULATION_RESULTS`. + */ + using simulation_results_per_input = std::optional>>>; + /** + * The charge distributions obtained for each input combination tested, sorted by the binary representation of the + * respectively associated input combinations. + */ + simulation_results_per_input simulation_results; + /** + * The number of input combinations tested. + */ + std::size_t number_of_simulator_invocations{0}; }; namespace detail @@ -163,10 +205,19 @@ class is_operational_impl assert((truth_table.size() == output_bdl_pairs.size()) && "Number of truth tables and output BDL pairs does not match"); + // when `simulation_results_mode::KEEP_SIMULATION_RESULTS` is set, the simulation results must be collected for + // each input combination + std::vector>> sim_res_per_input{}; + if (parameters.simulation_results_retention == + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) + { + sim_res_per_input.reserve(truth_table.front().num_bits()); + } + // number of different input combinations for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { - ++simulator_invocations; + ++stats.number_of_simulator_invocations; // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) @@ -226,6 +277,21 @@ class is_operational_impl } } } + + // save simulation results when the simulation result retention is set to + // `simulation_results_mode::KEEP_SIMULATION_RESULTS` + if (parameters.simulation_results_retention == + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) + { + sim_res_per_input.emplace_back(std::move(simulation_results.charge_distributions)); + } + } + + // only when the layout is operational, the simulation results may be kept + if (parameters.simulation_results_retention == + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) + { + stats.simulation_results.emplace(std::move(sim_res_per_input)); } // if we made it here, the layout is operational @@ -247,8 +313,6 @@ class is_operational_impl // number of different input combinations for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { - ++simulator_invocations; - // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) { @@ -269,8 +333,8 @@ class is_operational_impl simulation_results.charge_distributions.cbegin(), simulation_results.charge_distributions.cend(), [](const auto& lhs, const auto& rhs) { return lhs.get_system_energy() < rhs.get_system_energy(); }); - // ground state is degenerate - if ((energy_distribution(simulation_results.charge_distributions).cbegin()->second) > 1) + // if the ground state is degenerate, the layout is considered non-operational + if (energy_distribution(simulation_results.charge_distributions).cbegin()->second > 1) { continue; } @@ -317,13 +381,13 @@ class is_operational_impl return operational_inputs; } /** - * Returns the total number of simulator invocations. + * Returns auxiliary results from the operational status assessment, including the number of simulator invocations. * - * @return The number of simulator invocations. + * @return Auxiliary results from the operational status assessment. */ - [[nodiscard]] std::size_t get_number_of_simulator_invocations() const noexcept + [[nodiscard]] operational_status_assessment_stats get_operational_status_assessment_stats() const noexcept { - return simulator_invocations; + return stats; } private: @@ -356,9 +420,9 @@ class is_operational_impl */ std::vector> output_bdl_wires; /** - * Number of simulator invocations. + * Auxiliary results from the operational status assessment, including the number of simulator invocations. */ - std::size_t simulator_invocations{0}; + operational_status_assessment_stats stats; /** * This function conducts physical simulation of the given layout (gate layout with certain input combination). The * simulation results are stored in the `sim_result` variable. @@ -576,11 +640,11 @@ class is_operational_impl * @param input_bdl_wire Optional BDL input wires of lyt. * @param output_bdl_wire Optional BDL output wires of lyt. * @param input_bdl_wire_direction Optional BDL input wire directions of lyt. - * @return A pair containing the operational status of the gate layout (either `OPERATIONAL` or `NON_OPERATIONAL`) and - * the number of input combinations tested. + * @return A pair containing the operational status of the gate layout (either `OPERATIONAL` or `NON_OPERATIONAL`) along + * with auxiliary statistics. */ template -[[nodiscard]] std::pair +[[nodiscard]] std::pair> is_operational(const Lyt& lyt, const std::vector& spec, const is_operational_params& params = {}, const std::optional>>& input_bdl_wire = std::nullopt, const std::optional>>& output_bdl_wire = std::nullopt) @@ -601,12 +665,12 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational { detail::is_operational_impl p{lyt, spec, params, input_bdl_wire.value(), output_bdl_wire.value()}; - return {p.run(), p.get_number_of_simulator_invocations()}; + return {p.run(), p.get_operational_status_assessment_stats()}; } detail::is_operational_impl p{lyt, spec, params}; - return {p.run(), p.get_number_of_simulator_invocations()}; + return {p.run(), p.get_operational_status_assessment_stats()}; } /** * This function determines the input combinations for which the SiDB-based logic, represented by the diff --git a/include/fiction/algorithms/simulation/sidb/operational_domain.hpp b/include/fiction/algorithms/simulation/sidb/operational_domain.hpp index 8f502dc33..5fd79c035 100644 --- a/include/fiction/algorithms/simulation/sidb/operational_domain.hpp +++ b/include/fiction/algorithms/simulation/sidb/operational_domain.hpp @@ -1085,9 +1085,9 @@ class operational_domain_impl auto op_params_set_dimension_values = params.operational_params; op_params_set_dimension_values.simulation_parameters = sim_params; - const auto& [status, sim_calls] = is_operational(layout, truth_table, op_params_set_dimension_values); + const auto& [status, aux_stats] = is_operational(layout, truth_table, op_params_set_dimension_values); - num_simulator_invocations += sim_calls; + num_simulator_invocations += aux_stats.number_of_simulator_invocations; if (status == operational_status::NON_OPERATIONAL) { diff --git a/test/algorithms/simulation/sidb/is_operational.cpp b/test/algorithms/simulation/sidb/is_operational.cpp index e1db240e5..ec4c92435 100644 --- a/test/algorithms/simulation/sidb/is_operational.cpp +++ b/test/algorithms/simulation/sidb/is_operational.cpp @@ -27,23 +27,49 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") const sidb_100_cell_clk_lyt_siqad lat{layout_or_gate}; - CHECK(is_operational( - lat, std::vector{create_or_tt()}, - is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{ - detect_bdl_wires_params{1.5}, - bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, - operational_condition::REJECT_KINKS}) - .first == operational_status::NON_OPERATIONAL); + SECTION("Reject kinks and keep simulation results") + { - CHECK(is_operational( - lat, std::vector{create_or_tt()}, - is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{ - detect_bdl_wires_params{1.5}, - bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, - operational_condition::TOLERATE_KINKS}) - .first == operational_status::OPERATIONAL); + const auto p_no = is_operational( + lat, std::vector{create_or_tt()}, + is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT, + bdl_input_iterator_params{ + detect_bdl_wires_params{1.5}, + bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, + operational_condition::REJECT_KINKS, + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS}); + CHECK(p_no.first == operational_status::NON_OPERATIONAL); + CHECK(!p_no.second.simulation_results.has_value()); + } + + SECTION("Tolerate kinks and keep simulation results") + { + const auto p_o = is_operational( + lat, std::vector{create_or_tt()}, + is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT, + bdl_input_iterator_params{ + detect_bdl_wires_params{1.5}, + bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, + operational_condition::TOLERATE_KINKS, + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS}); + CHECK(p_o.first == operational_status::OPERATIONAL); + REQUIRE(p_o.second.simulation_results.has_value()); + CHECK(p_o.second.simulation_results.value().size() == 4); + } + + SECTION("Tolerate kinks and discard simulation results") + { + const auto p_o2 = is_operational( + lat, std::vector{create_or_tt()}, + is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT, + bdl_input_iterator_params{ + detect_bdl_wires_params{1.5}, + bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, + operational_condition::TOLERATE_KINKS, + is_operational_params::simulation_results_mode::DISCARD_SIMULATION_RESULTS}); + CHECK(p_o2.first == operational_status::OPERATIONAL); + CHECK(!p_o2.second.simulation_results.has_value()); + } } TEST_CASE("SiQAD's AND gate with input BDL pairs of different size", "[is-operational]") From 3424cecac4af4509485a8984ebe96bf8057066dd Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 28 Oct 2024 22:22:42 +0100 Subject: [PATCH 003/138] :pencil2: typo --- include/fiction/algorithms/simulation/sidb/minimum_energy.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/minimum_energy.hpp b/include/fiction/algorithms/simulation/sidb/minimum_energy.hpp index 03fffee45..74c6cdfb7 100644 --- a/include/fiction/algorithms/simulation/sidb/minimum_energy.hpp +++ b/include/fiction/algorithms/simulation/sidb/minimum_energy.hpp @@ -19,7 +19,7 @@ namespace fiction * returned. * * @tparam InputIt Must meet the requirements of `LegacyInputIterator`. - * @param first Begin of the range to examime. + * @param first Begin of the range to examine. * @param last End of the range to examine. * @return Value of the minimum energy found in the input range (unit: eV), or infinity if the range is empty. */ @@ -43,7 +43,7 @@ template * `charge_distribution_surface` objects. If the range is empty, `last` is returned. * * @tparam InputIt Must meet the requirements of `LegacyInputIterator`. - * @param first Begin of the range to examime. + * @param first Begin of the range to examine. * @param last End of the range to examine. * @return Iterator to the minimum energy charge distribution found in the input range, or `last` if the range is empty. */ From 8ec3abdc635443b0beb9425261b4871468e624bd Mon Sep 17 00:00:00 2001 From: wlambooy Date: Tue, 29 Oct 2024 01:00:06 +0100 Subject: [PATCH 004/138] :sparkles: Exhaustive SiDB design can now sort on ground state isolation --- .../physical_design/design_sidb_gates.hpp | 36 +++- .../physical_design/design_sidb_gates.hpp | 187 +++++++++++++++--- 2 files changed, 195 insertions(+), 28 deletions(-) diff --git a/bindings/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 195a73cf7..d48de5502 100644 --- a/bindings/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -48,7 +48,7 @@ inline void design_sidb_gates(pybind11::module& m) /** * Design approach selector type. */ - pybind11::enum_::design_sidb_gates_mode>( + py::enum_::design_sidb_gates_mode>( m, "design_sidb_gates_mode", DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, @@ -60,6 +60,32 @@ inline void design_sidb_gates(pybind11::module& m) .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_RANDOM)); + /** + * Termination condition selector type. + */ + py::enum_::termination_condition>( + m, "termination_condition", DOC(fiction_design_sidb_gates_params_termination_condition)) + .value( + "AFTER_FIRST_SOLUTION", + fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, + DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) + .value("ALL_COMBINATIONS_ENUMERATED", + fiction::design_sidb_gates_params< + fiction::offset::ucoord_t>::termination_condition::ALL_COMBINATIONS_ENUMERATED, + DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); + + /** + * Post-design processes selector type. + */ + py::enum_::post_design_mode>( + m, "post_design_mode", DOC(fiction_design_sidb_gates_params_post_design_mode)) + .value("DO_NOTHING", fiction::design_sidb_gates_params::post_design_mode::DO_NOTHING, + DOC(fiction_design_sidb_gates_params_post_design_mode_DO_NOTHING)) + .value("PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES", + fiction::design_sidb_gates_params< + fiction::offset::ucoord_t>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES, + DOC(fiction_design_sidb_gates_params_post_design_mode_PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES)); + /** * Parameters. */ @@ -75,7 +101,13 @@ inline void design_sidb_gates(pybind11::module& m) DOC(fiction_design_sidb_gates_params_canvas)) .def_readwrite("number_of_sidbs", &fiction::design_sidb_gates_params::number_of_sidbs, - DOC(fiction_design_sidb_gates_params_number_of_sidbs)); + DOC(fiction_design_sidb_gates_params_number_of_sidbs)) + .def_readwrite("termination_cond", + &fiction::design_sidb_gates_params::termination_cond, + DOC(fiction_design_sidb_gates_params_termination_cond)) + .def_readwrite("post_design_process", + &fiction::design_sidb_gates_params::post_design_process, + DOC(fiction_design_sidb_gates_params_post_design_process)); detail::design_sidb_gates(m); detail::design_sidb_gates(m); diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 9eb03e1d3..ee3a25168 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -54,6 +54,24 @@ namespace fiction template struct design_sidb_gates_params { + /** + * Selector for the available design approaches. + */ + enum class design_sidb_gates_mode : uint8_t + { + /** + * Gates are designed by using *QuickCell*. + */ + QUICKCELL, + /** + * Gates are designed by using the *Automatic Exhaustive Gate Designer*. + */ + AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + /** + * Gate layouts are designed randomly. + */ + RANDOM + }; /** * Selector for the different termination conditions for the SiDB gate design process. */ @@ -69,22 +87,18 @@ struct design_sidb_gates_params ALL_COMBINATIONS_ENUMERATED }; /** - * Selector for the available design approaches. + * Selector for the available post-design processes. */ - enum class design_sidb_gates_mode : uint8_t + enum class post_design_mode : uint8_t { /** - * Gates are designed by using *QuickCell*. - */ - QUICKCELL, - /** - * Gates are designed by using the *Automatic Exhaustive Gate Designer*. + * No post-design operation is performed. */ - AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + DO_NOTHING, /** - * Gate layouts are designed randomly. + * The designed gates are sorted by how energetically isolated the ground state is from the first excited state. */ - RANDOM + PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES }; /** * Parameters for the `is_operational` function. @@ -108,6 +122,12 @@ struct design_sidb_gates_params * @note This parameter has no effect unless the gate design is exhaustive. */ termination_condition termination_cond = termination_condition::ALL_COMBINATIONS_ENUMERATED; + /** + * After the design process, the returned gates are not sorted. + * + * @note This parameter has no effect unless the gate design is exhaustive and all combinations are enumerated. + */ + post_design_mode post_design_process = post_design_mode::DO_NOTHING; }; /** @@ -151,11 +171,11 @@ class design_sidb_gates_impl * @param ps Parameters and settings for the gate designer. * @param st Statistics for the gate design process. */ - design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, - const design_sidb_gates_params>& ps, design_sidb_gates_stats& st) : + design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params> ps, + design_sidb_gates_stats& st) : skeleton_layout{skeleton}, truth_table{spec}, - params{ps}, + params{set_simulation_results_retention_accordingly(std::move(ps))}, all_sidbs_in_canvas{all_coordinates_in_spanned_area(params.canvas.first, params.canvas.second)}, stats{st}, input_bdl_wires{detect_bdl_wires(skeleton_layout, @@ -179,7 +199,8 @@ class design_sidb_gates_impl * This function adds each cell combination to the given skeleton, and determines whether the layout is operational * based on the specified parameters. The design process is parallelized to improve performance. * - * @return A vector of designed SiDB gate layouts. + * @return A vector of designed SiDB gate layouts, along with simulation results when the post-design process is set + * to `post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES`. */ [[nodiscard]] std::vector run_automatic_exhaustive_gate_designer() const noexcept { @@ -188,13 +209,23 @@ class design_sidb_gates_impl auto all_combinations = determine_all_combinations_of_distributing_k_entities_on_n_positions( params.number_of_sidbs, static_cast(all_sidbs_in_canvas.size())); - std::vector designed_gate_layouts = {}; + std::vector designed_gate_layouts{}; if (all_combinations.empty()) { return designed_gate_layouts; } + std::optional>>>> + sim_results_per_input_for_each_gate_design{}; + + if (params.post_design_process == + design_sidb_gates_params>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES) + { + sim_results_per_input_for_each_gate_design = + std::make_optional>>>>(); + } + std::unordered_set> sidbs_affected_by_defects = {}; // used to collect all SiDBs that are affected due to neutrally charged defects. @@ -211,9 +242,9 @@ class design_sidb_gates_impl std::shuffle(all_combinations.begin(), all_combinations.end(), std::default_random_engine(std::random_device{}())); - const auto add_combination_to_layout_and_check_operation = [this, &mutex_to_protect_designed_gate_layouts, - &designed_gate_layouts, - &solution_found](const auto& combination) noexcept + const auto add_combination_to_layout_and_check_operation = + [this, &mutex_to_protect_designed_gate_layouts, &designed_gate_layouts, + &sim_results_per_input_for_each_gate_design, &solution_found](const auto& combination) noexcept { // canvas SiDBs are added to the skeleton const auto layout_with_added_cells = skeleton_layout_with_canvas_sidbs(combination); @@ -228,13 +259,19 @@ class design_sidb_gates_impl // ensure only one designed gate is returned when AFTER_FIRST_SOLUTION is the termination condition if (params.termination_cond == - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION && - solution_found) + design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION && + solution_found) { return; } - designed_gate_layouts.push_back(layout_with_added_cells); + designed_gate_layouts.emplace_back(layout_with_added_cells); + + if (sim_results_per_input_for_each_gate_design.has_value()) + { + sim_results_per_input_for_each_gate_design.value().emplace_back( + std::move(aux_stats.simulation_results.value())); + } } solution_found = true; @@ -281,6 +318,14 @@ class design_sidb_gates_impl } } + if (params.post_design_process == + design_sidb_gates_params>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES && + designed_gate_layouts.size() > 1) + { + sort_designed_gate_layouts_by_ground_state_isolation( + designed_gate_layouts, std::move(sim_results_per_input_for_each_gate_design.value())); + } + return designed_gate_layouts; } /** @@ -328,7 +373,7 @@ class design_sidb_gates_impl } }); } - if (const auto [status, sim_calls] = + if (const auto [status, aux_stats] = is_operational(result_lyt, truth_table, params.operational_params, std::optional{input_bdl_wires}, std::optional{output_bdl_wires}); status == operational_status::OPERATIONAL) @@ -405,7 +450,7 @@ class design_sidb_gates_impl { return; } - if (const auto [status, sim_calls] = + if (const auto [status, aux_stats] = is_operational(candidate, truth_table, params.operational_params, std::optional{input_bdl_wires}, std::optional{output_bdl_wires}); status == operational_status::OPERATIONAL) @@ -465,7 +510,7 @@ class design_sidb_gates_impl /** * Parameters for the *SiDB Gate Designer*. */ - const design_sidb_gates_params>& params; + const design_sidb_gates_params> params; /** * All cells within the canvas. */ @@ -758,8 +803,7 @@ class design_sidb_gates_impl while (cds_canvas.get_charge_index_and_base().first <= cds_canvas.get_max_charge_index()) { cds_canvas.foreach_cell( - [&](const auto& c) - { + [&](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -1060,6 +1104,97 @@ class design_sidb_gates_impl return lyt; } + + /** + * This function makes sure that the underlying parameters for `is_operational` allow simulation results to be used + * when the given parameter set indicates the use for it. + * + * @params Parameters and settings for the gate designer. + * @return Parameters and settings for the gate designer for which the simulation results retention of the + * underlying parameter for operational status assessment is set accordingly. + */ + [[nodiscard]] static design_sidb_gates_params> + set_simulation_results_retention_accordingly(const design_sidb_gates_params>& params) noexcept + { + design_sidb_gates_params> ps{params}; + + if (params.post_design_process == design_sidb_gates_params>::post_design_mode::DO_NOTHING) + { + return ps; + } + + ps.operational_params.simulation_results_retention = + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS; + + return ps; + } + + /** + * Performs a sorting operation on the designed gate layouts, preferring those for which the energetic gap between + * the ground state and the first excited state is larger. For each designed gate layout, the minimum energetic gap + * is taken over each input. + * + * @param designed_gate_layouts A vector of designed gate layouts to sort in place. + * @param sim_results_per_input_for_each_gate_design The simulation results for each input of each designed gate + * layout. + */ + void sort_designed_gate_layouts_by_ground_state_isolation( + std::vector& designed_gate_layouts, std::vector>>> + sim_results_per_input_for_each_gate_design) const noexcept + { + // pair the two input vectors + std::vector>>>> pairs{}; + pairs.reserve(designed_gate_layouts.size()); + + for (auto i = 0; i < designed_gate_layouts.size(); ++i) + { + pairs.emplace_back(std::move(designed_gate_layouts.at(i)), + std::move(sim_results_per_input_for_each_gate_design.at(i))); + } + + // clear the designed_gate_layouts vector so that we may reenter the elements in order later + designed_gate_layouts.clear(); + + // sort all individual simulation results by system energy + for (auto& pair : pairs) + { + for (std::vector>& sim_res : pair.second) + { + std::sort(sim_res.begin(), sim_res.end(), [](const auto& cds1, const auto& cds2) noexcept + { return cds1.get_system_energy() < cds2.get_system_energy(); }); + } + } + + const auto get_ground_state_isolation = + [&](const std::vector>& sim_res) noexcept + { + return sim_res.size() == 1 ? std::numeric_limits::infinity() : + sim_res.at(1).get_system_energy() - sim_res.at(0).get_system_energy(); + }; + + const auto minimum_ground_state_isolation_for_all_inputs = + [&get_ground_state_isolation]( + const std::vector>>& res_per_input) noexcept + { + return std::min_element(res_per_input.cbegin(), res_per_input.cend(), + [&get_ground_state_isolation](const auto& lhs, const auto& rhs) noexcept + { return get_ground_state_isolation(lhs) < get_ground_state_isolation(rhs); }); + }; + + // sort the pairs by minimum ground state isolation for each input + std::sort(pairs.begin(), pairs.end(), + [&minimum_ground_state_isolation_for_all_inputs](const auto& lhs, const auto& rhs) noexcept + { + return minimum_ground_state_isolation_for_all_inputs(lhs.second) < + minimum_ground_state_isolation_for_all_inputs(rhs.second); + }); + + // put the designed gate layouts back in the sorted order + for (auto& pair : pairs) + { + designed_gate_layouts.emplace_back(pair.first); + } + } }; } // namespace detail From d914aa04e0c7b96d1b4f820100ff6fde62c9c1f2 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 30 Oct 2024 13:58:13 +0100 Subject: [PATCH 005/138] :white_check_mark: Removed redundant test --- .../physical_design/design_sidb_gates.cpp | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 39f3f41c7..f22c65059 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -118,19 +118,6 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ CHECK(found_gate_layouts.size() == 4); } - SECTION("Four cells in canvas, design one gate with one SiDB in the canvas (terminate on first found)") - { - const auto params = design_sidb_gates_params>{ - is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, - {{10, 4, 0}, {13, 4, 0}}, - 1, - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION}; - - const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); - - CHECK(found_gate_layouts.size() == 1); - } SECTION("Four cells in canvas, design process is terminated after first solution is found (one SiDB in the " "canvas), QuickExact") { From 32db7bc2655a5f4a74888c1e9ed872672feec517 Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 30 Oct 2024 12:59:37 +0000 Subject: [PATCH 006/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 91 +++++++++++++++++-- 1 file changed, 81 insertions(+), 10 deletions(-) diff --git a/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index f7c9ee4ee..b25a1df7c 100644 --- a/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -3816,6 +3816,20 @@ static const char *__doc_fiction_design_sidb_gates_params_number_of_sidbs = R"do static const char *__doc_fiction_design_sidb_gates_params_operational_params = R"doc(Parameters for the `is_operational` function.)doc"; +static const char *__doc_fiction_design_sidb_gates_params_post_design_mode = R"doc(Selector for the available post-design processes.)doc"; + +static const char *__doc_fiction_design_sidb_gates_params_post_design_mode_DO_NOTHING = R"doc(No post-design operation is performed.)doc"; + +static const char *__doc_fiction_design_sidb_gates_params_post_design_mode_PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES = +R"doc(The designed gates are sorted by how energetically isolated the ground +state is from the first excited state.)doc"; + +static const char *__doc_fiction_design_sidb_gates_params_post_design_process = +R"doc(After the design process, the returned gates are not sorted. + +@note This parameter has no effect unless the gate design is +exhaustive and all combinations are enumerated.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_termination_cond = R"doc(The design process is terminated after a valid SiDB gate design is found. @@ -4803,6 +4817,19 @@ Parameter ``layout``: Parameter ``input_index``: The index representing the current input pattern.)doc"; +static const char *__doc_fiction_detail_design_sidb_gates_impl_set_simulation_results_retention_accordingly = +R"doc(This function makes sure that the underlying parameters for +`is_operational` allow simulation results to be used when the given +parameter set indicates the use for it. + +Parameter ``Parameters``: + and settings for the gate designer. + +Returns: + Parameters and settings for the gate designer for which the + simulation results retention of the underlying parameter for + operational status assessment is set accordingly.)doc"; + static const char *__doc_fiction_detail_design_sidb_gates_impl_skeleton_layout = R"doc(The skeleton layout serves as a starting layout to which SiDBs are added to create unique SiDB layouts and, if possible, working gates. @@ -4819,6 +4846,19 @@ Parameter ``cell_indices``: A copy of the original layout (`skeleton_layout`) with SiDB cells added at specified indices.)doc"; +static const char *__doc_fiction_detail_design_sidb_gates_impl_sort_designed_gate_layouts_by_ground_state_isolation = +R"doc(Performs a sorting operation on the designed gate layouts, preferring +those for which the energetic gap between the ground state and the +first excited state is larger. For each designed gate layout, the +minimum energetic gap is taken over each input. + +Parameter ``designed_gate_layouts``: + A vector of designed gate layouts to sort in place. + +Parameter ``sim_results_per_input_for_each_gate_design``: + The simulation results for each input of each designed gate + layout.)doc"; + static const char *__doc_fiction_detail_design_sidb_gates_impl_stats = R"doc(The statistics of the gate design.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_truth_table = R"doc(Truth table of the given gate.)doc"; @@ -6823,11 +6863,12 @@ Parameter ``bdl``: Returns: `true` if `0` is encoded, `false` otherwise.)doc"; -static const char *__doc_fiction_detail_is_operational_impl_get_number_of_simulator_invocations = -R"doc(Returns the total number of simulator invocations. +static const char *__doc_fiction_detail_is_operational_impl_get_operational_status_assessment_stats = +R"doc(Returns auxiliary results from the operational status assessment, +including the number of simulator invocations. Returns: - The number of simulator invocations.)doc"; + Auxiliary results from the operational status assessment.)doc"; static const char *__doc_fiction_detail_is_operational_impl_input_bdl_wires = R"doc(Input BDL wires.)doc"; @@ -6897,7 +6938,9 @@ the gate layout and parameters provided during initialization. The operational status of the gate layout (either `OPERATIONAL` or `NON_OPERATIONAL`).)doc"; -static const char *__doc_fiction_detail_is_operational_impl_simulator_invocations = R"doc(Number of simulator invocations.)doc"; +static const char *__doc_fiction_detail_is_operational_impl_stats = +R"doc(Auxiliary results from the operational status assessment, including +the number of simulator invocations.)doc"; static const char *__doc_fiction_detail_is_operational_impl_truth_table = R"doc(The specification of the layout.)doc"; @@ -13610,16 +13653,16 @@ Parameter ``input_bdl_wire_direction``: Returns: A pair containing the operational status of the gate layout - (either `OPERATIONAL` or `NON_OPERATIONAL`) and the number of - input combinations tested.)doc"; + (either `OPERATIONAL` or `NON_OPERATIONAL`) along with auxiliary + statistics.)doc"; static const char *__doc_fiction_is_operational_params = R"doc(Parameters for the `is_operational` algorithm.)doc"; static const char *__doc_fiction_is_operational_params_input_bdl_iterator_params = R"doc(Parameters for the BDL input iterator.)doc"; static const char *__doc_fiction_is_operational_params_op_condition = -R"doc(Condition which is used to decide if a layout is `operational` or -`non-operational`.)doc"; +R"doc(Condition that is used to decide if a layout is `operational` or `non- +operational`.)doc"; static const char *__doc_fiction_is_operational_params_sim_engine = R"doc(The simulation engine to be used for the operational domain @@ -13629,6 +13672,20 @@ static const char *__doc_fiction_is_operational_params_simulation_parameters = R"doc(The simulation parameters for the physical simulation of the ground state.)doc"; +static const char *__doc_fiction_is_operational_params_simulation_results_mode = R"doc(Selector for the different ways to handle obtained simulation results.)doc"; + +static const char *__doc_fiction_is_operational_params_simulation_results_mode_DISCARD_SIMULATION_RESULTS = +R"doc(The simulation results are discarded after the operational status was +assessed.)doc"; + +static const char *__doc_fiction_is_operational_params_simulation_results_mode_KEEP_SIMULATION_RESULTS = +R"doc(The simulation results for each input pattern are returned for +operational gates.)doc"; + +static const char *__doc_fiction_is_operational_params_simulation_results_retention = +R"doc(Simulation results that are used to certify the status `OPERATIONAL` +are not kept by default.)doc"; + static const char *__doc_fiction_is_positively_charged_defect = R"doc(Checks whether the given defect has a positive charge value assigned to it. This function is irrespective of the associated defect type. @@ -13877,7 +13934,7 @@ Template parameter ``InputIt``: Must meet the requirements of `LegacyInputIterator`. Parameter ``first``: - Begin of the range to examime. + Begin of the range to examine. Parameter ``last``: End of the range to examine. @@ -13895,7 +13952,7 @@ Template parameter ``InputIt``: Must meet the requirements of `LegacyInputIterator`. Parameter ``first``: - Begin of the range to examime. + Begin of the range to examine. Parameter ``last``: End of the range to examine. @@ -14717,6 +14774,20 @@ static const char *__doc_fiction_operational_status_NON_OPERATIONAL = R"doc(The static const char *__doc_fiction_operational_status_OPERATIONAL = R"doc(The layout is operational.)doc"; +static const char *__doc_fiction_operational_status_assessment_stats = +R"doc(This struct is used to collect auxiliary results from the operational +status assessment. + +Template parameter ``SiDB``: + cell-level layout type.)doc"; + +static const char *__doc_fiction_operational_status_assessment_stats_number_of_simulator_invocations = R"doc(The number of input combinations tested.)doc"; + +static const char *__doc_fiction_operational_status_assessment_stats_simulation_results = +R"doc(The charge distributions obtained for each input combination tested, +sorted by the binary representation of the respectively associated +input combinations.)doc"; + static const char *__doc_fiction_orthogonal = R"doc(A scalable placement & routing approach based on orthogonal graph drawing as originally proposed in \"Scalable Design for Field-coupled From 1a4c2d0b5288b8284c69936d836040688c972bc2 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 30 Oct 2024 14:45:34 +0100 Subject: [PATCH 007/138] :sparkles: Added average ground state isolation as tie-breaker --- .../physical_design/design_sidb_gates.hpp | 50 +++++++++++++++---- 1 file changed, 41 insertions(+), 9 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index c1da6026c..4d76b513f 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -793,8 +793,7 @@ class design_sidb_gates_impl while (cds_canvas.get_charge_index_and_base().first <= cds_canvas.get_max_charge_index()) { cds_canvas.foreach_cell( - [&](const auto& c) - { + [&](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -1121,9 +1120,9 @@ class design_sidb_gates_impl } /** - * Performs a sorting operation on the designed gate layouts, preferring those for which the energetic gap between - * the ground state and the first excited state is larger. For each designed gate layout, the minimum energetic gap - * is taken over each input. + * Performs a sorting operation on the designed gate layouts, putting those in front for which the energetic gap + * between the ground state and the first excited state is larger. For each designed gate layout, the minimum + * energetic gap is taken over each input. * * @param designed_gate_layouts A vector of designed gate layouts to sort in place. * @param sim_results_per_input_for_each_gate_design The simulation results for each input of each designed gate @@ -1160,7 +1159,7 @@ class design_sidb_gates_impl [&](const std::vector>& sim_res) noexcept { return sim_res.size() == 1 ? std::numeric_limits::infinity() : - sim_res.at(1).get_system_energy() - sim_res.at(0).get_system_energy(); + sim_res.at(1).get_system_energy() - sim_res.at(0).get_system_energy(); }; const auto minimum_ground_state_isolation_for_all_inputs = @@ -1172,12 +1171,45 @@ class design_sidb_gates_impl { return get_ground_state_isolation(lhs) < get_ground_state_isolation(rhs); }); }; + const auto average_ground_state_isolation_for_all_inputs = + [&get_ground_state_isolation]( + const std::vector>>& res_per_input) noexcept + { + uint64_t count = 0; + + double accumulated_ground_state_isolation = 0.0; + + for (const auto& sim_res : res_per_input) + { + if (sim_res.size() == 1) + { + continue; + } + + accumulated_ground_state_isolation += get_ground_state_isolation(sim_res); + + ++count; + } + + return accumulated_ground_state_isolation / static_cast(count); + }; + // sort the pairs by minimum ground state isolation for each input std::sort(pairs.begin(), pairs.end(), - [&minimum_ground_state_isolation_for_all_inputs](const auto& lhs, const auto& rhs) noexcept + [&minimum_ground_state_isolation_for_all_inputs, + &average_ground_state_isolation_for_all_inputs](const auto& lhs, const auto& rhs) noexcept { - return minimum_ground_state_isolation_for_all_inputs(lhs.second) < - minimum_ground_state_isolation_for_all_inputs(rhs.second); + const double diff = minimum_ground_state_isolation_for_all_inputs(lhs.second) - + minimum_ground_state_isolation_for_all_inputs(rhs.second); + + // when minima are equal, take the average + if (std::abs(diff) < std::numeric_limits::epsilon()) + { + return average_ground_state_isolation_for_all_inputs(lhs.second) > + average_ground_state_isolation_for_all_inputs(rhs.second); + } + + return diff > 0.0; }); // put the designed gate layouts back in the sorted order From 92045d6dc788abb37e628e548144db72c77a581d Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 30 Oct 2024 14:45:48 +0100 Subject: [PATCH 008/138] :white_check_mark: Added test --- .../physical_design/design_sidb_gates.cpp | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index f22c65059..26810fb17 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -158,6 +158,25 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ CHECK(mockturtle::to_seconds(stats.time_total) > 0.0); CHECK(stats.sim_engine == sidb_simulation_engine::QUICKSIM); } + SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation") + { + const auto params = design_sidb_gates_params>{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, + design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + {{10, 4, 0}, {13, 4, 0}}, + 1, + design_sidb_gates_params>::termination_condition::ALL_COMBINATIONS_ENUMERATED, + design_sidb_gates_params< + cell>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES}; + + const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); + + REQUIRE(found_gate_layouts.size() == 4); + CHECK(found_gate_layouts[0].get_cell_type({11, 4, 0}) == siqad_layout::technology::LOGIC); + CHECK(found_gate_layouts[1].get_cell_type({13, 4, 0}) == siqad_layout::technology::LOGIC); + CHECK(found_gate_layouts[2].get_cell_type({10, 4, 0}) == siqad_layout::technology::LOGIC); + CHECK(found_gate_layouts[3].get_cell_type({12, 4, 0}) == siqad_layout::technology::LOGIC); + } } TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[design-sidb-gates]") From 1a8cecd7dea57741879331635db93df42c57778e Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 30 Oct 2024 13:46:37 +0000 Subject: [PATCH 009/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index b25a1df7c..fe4c395bd 100644 --- a/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4847,10 +4847,10 @@ Parameter ``cell_indices``: added at specified indices.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_sort_designed_gate_layouts_by_ground_state_isolation = -R"doc(Performs a sorting operation on the designed gate layouts, preferring -those for which the energetic gap between the ground state and the -first excited state is larger. For each designed gate layout, the -minimum energetic gap is taken over each input. +R"doc(Performs a sorting operation on the designed gate layouts, putting +those in front for which the energetic gap between the ground state +and the first excited state is larger. For each designed gate layout, +the minimum energetic gap is taken over each input. Parameter ``designed_gate_layouts``: A vector of designed gate layouts to sort in place. From 19ec6a7dcb86d3e4b9e982b8d5b1b520cf62a6c0 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Wed, 30 Oct 2024 13:53:21 +0000 Subject: [PATCH 010/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../algorithms/physical_design/design_sidb_gates.hpp | 3 ++- test/algorithms/physical_design/design_sidb_gates.cpp | 6 ++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 4d76b513f..f2e32ee08 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -793,7 +793,8 @@ class design_sidb_gates_impl while (cds_canvas.get_charge_index_and_base().first <= cds_canvas.get_max_charge_index()) { cds_canvas.foreach_cell( - [&](const auto& c) { + [&](const auto& c) + { cds_layout.assign_charge_state(c, cds_canvas.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 26810fb17..557e0e87b 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -385,10 +385,8 @@ TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") CHECK(found_gate_layouts_quickcell.front().num_defects() == 1); CHECK(found_gate_layouts_quickcell.front().num_cells() == lyt.num_cells() + 2); - found_gate_layouts_quickcell.front().foreach_cell( - [](const auto& cell) { - CHECK(cell != siqad::coord_t{16, 10, 0}); - }); + found_gate_layouts_quickcell.front().foreach_cell([](const auto& cell) + { CHECK(cell != siqad::coord_t{16, 10, 0}); }); } } From 805aa23285fcabc228b7dca2291eb44bbee300d4 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 13 Nov 2024 00:02:20 +0100 Subject: [PATCH 011/138] :bug: forgotten deref --- .../fiction/algorithms/physical_design/design_sidb_gates.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index f2e32ee08..f52f99b0b 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -1167,7 +1167,7 @@ class design_sidb_gates_impl [&get_ground_state_isolation]( const std::vector>>& res_per_input) noexcept { - return std::min_element(res_per_input.cbegin(), res_per_input.cend(), + return *std::min_element(res_per_input.cbegin(), res_per_input.cend(), [&get_ground_state_isolation](const auto& lhs, const auto& rhs) noexcept { return get_ground_state_isolation(lhs) < get_ground_state_isolation(rhs); }); }; From ef68da7aebde75e4e273a2511f52e4b7e488b7d4 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Tue, 12 Nov 2024 23:02:50 +0000 Subject: [PATCH 012/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../fiction/algorithms/physical_design/design_sidb_gates.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index f52f99b0b..612ad141a 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -1168,8 +1168,8 @@ class design_sidb_gates_impl const std::vector>>& res_per_input) noexcept { return *std::min_element(res_per_input.cbegin(), res_per_input.cend(), - [&get_ground_state_isolation](const auto& lhs, const auto& rhs) noexcept - { return get_ground_state_isolation(lhs) < get_ground_state_isolation(rhs); }); + [&get_ground_state_isolation](const auto& lhs, const auto& rhs) noexcept + { return get_ground_state_isolation(lhs) < get_ground_state_isolation(rhs); }); }; const auto average_ground_state_isolation_for_all_inputs = From 9a09663b283ed7fd6620d081324f91514a252eb1 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 13 Nov 2024 00:19:55 +0100 Subject: [PATCH 013/138] :bug: forgotten deref --- .../algorithms/physical_design/design_sidb_gates.hpp | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index f52f99b0b..6773dafa0 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -793,8 +793,7 @@ class design_sidb_gates_impl while (cds_canvas.get_charge_index_and_base().first <= cds_canvas.get_max_charge_index()) { cds_canvas.foreach_cell( - [&](const auto& c) - { + [&](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -1167,9 +1166,12 @@ class design_sidb_gates_impl [&get_ground_state_isolation]( const std::vector>>& res_per_input) noexcept { - return *std::min_element(res_per_input.cbegin(), res_per_input.cend(), - [&get_ground_state_isolation](const auto& lhs, const auto& rhs) noexcept - { return get_ground_state_isolation(lhs) < get_ground_state_isolation(rhs); }); + std::vector ground_state_isolations{}; + + std::transform(res_per_input.cbegin(), res_per_input.cend(), ground_state_isolations.begin(), + get_ground_state_isolation); + + return *std::min_element(ground_state_isolations.cbegin(), ground_state_isolations.cend()); }; const auto average_ground_state_isolation_for_all_inputs = From 34c40930070f1288c2ea08c523caf24cfb33e789 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 13 Nov 2024 00:20:59 +0100 Subject: [PATCH 014/138] :bug: forgotten deref --- .../algorithms/physical_design/design_sidb_gates.hpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 612ad141a..7f751b935 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -793,8 +793,7 @@ class design_sidb_gates_impl while (cds_canvas.get_charge_index_and_base().first <= cds_canvas.get_max_charge_index()) { cds_canvas.foreach_cell( - [&](const auto& c) - { + [&](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -1167,9 +1166,10 @@ class design_sidb_gates_impl [&get_ground_state_isolation]( const std::vector>>& res_per_input) noexcept { - return *std::min_element(res_per_input.cbegin(), res_per_input.cend(), - [&get_ground_state_isolation](const auto& lhs, const auto& rhs) noexcept - { return get_ground_state_isolation(lhs) < get_ground_state_isolation(rhs); }); + std::vector ground_state_isolations{}; + std::transform(res_per_input.cbegin(), res_per_input.cend(), ground_state_isolations.begin(), + get_ground_state_isolation); + return *std::min_element(ground_state_isolations.cbegin(), ground_state_isolations.cend()); }; const auto average_ground_state_isolation_for_all_inputs = From c109e6c0edf7811741cc11417401ce947743d0f3 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Tue, 12 Nov 2024 23:21:30 +0000 Subject: [PATCH 015/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../fiction/algorithms/physical_design/design_sidb_gates.hpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 7f751b935..7bf50204e 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -793,7 +793,8 @@ class design_sidb_gates_impl while (cds_canvas.get_charge_index_and_base().first <= cds_canvas.get_max_charge_index()) { cds_canvas.foreach_cell( - [&](const auto& c) { + [&](const auto& c) + { cds_layout.assign_charge_state(c, cds_canvas.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); From eed0cd4f1fecdd22692598ad9c9e7b26d6e3d608 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 13 Nov 2024 01:19:13 +0100 Subject: [PATCH 016/138] :bug: forgotten deref --- .../fiction/algorithms/physical_design/design_sidb_gates.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 7f751b935..284051044 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -1167,7 +1167,7 @@ class design_sidb_gates_impl const std::vector>>& res_per_input) noexcept { std::vector ground_state_isolations{}; - std::transform(res_per_input.cbegin(), res_per_input.cend(), ground_state_isolations.begin(), + std::transform(res_per_input.cbegin(), res_per_input.cend(), std::back_inserter(ground_state_isolations), get_ground_state_isolation); return *std::min_element(ground_state_isolations.cbegin(), ground_state_isolations.cend()); }; From f8fae78b9294a10501c86a5d94bef482f23ad216 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Mon, 3 Feb 2025 10:44:05 +0000 Subject: [PATCH 017/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../fiction/algorithms/simulation/sidb/is_operational.hpp | 2 +- test/algorithms/simulation/sidb/is_operational.cpp | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 12a2aa3bf..006b80882 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -444,7 +444,7 @@ class is_operational_impl is_operational_params::operational_analysis_strategy::SIMULATION_ONLY && parameters.strategy_to_analyze_operational_status != is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION && - !canvas_lyt.is_empty()) + !canvas_lyt.is_empty()) { return {operational_status::OPERATIONAL, non_operationality_reason::NONE}; } diff --git a/test/algorithms/simulation/sidb/is_operational.cpp b/test/algorithms/simulation/sidb/is_operational.cpp index fab62cb62..d96231430 100644 --- a/test/algorithms/simulation/sidb/is_operational.cpp +++ b/test/algorithms/simulation/sidb/is_operational.cpp @@ -32,10 +32,13 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") const sidb_100_cell_clk_lyt_siqad lat{or_gate}; auto op_params = is_operational_params{ - sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, + sidb_simulation_parameters{2, -0.32}, + sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{detect_bdl_wires_params{1.5}, bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, - is_operational_params::operational_condition::TOLERATE_KINKS, {}, is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS}; + is_operational_params::operational_condition::TOLERATE_KINKS, + {}, + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS}; SECTION("determine if layout is operational, tolerate kinks and keep simulation results") { From 9213881984b3248513769a66ebf42be7c3086e67 Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Mon, 3 Feb 2025 10:44:53 +0000 Subject: [PATCH 018/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 126 ++++++++++++------ 1 file changed, 84 insertions(+), 42 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index f0d5bd1b8..9dbb5620a 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4320,6 +4320,20 @@ static const char *__doc_fiction_design_sidb_gates_params_number_of_sidbs = R"do static const char *__doc_fiction_design_sidb_gates_params_operational_params = R"doc(Parameters for the `is_operational` function.)doc"; +static const char *__doc_fiction_design_sidb_gates_params_post_design_mode = R"doc(Selector for the available post-design processes.)doc"; + +static const char *__doc_fiction_design_sidb_gates_params_post_design_mode_DO_NOTHING = R"doc(No post-design operation is performed.)doc"; + +static const char *__doc_fiction_design_sidb_gates_params_post_design_mode_PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES = +R"doc(The designed gates are sorted by how energetically isolated the ground +state is from the first excited state.)doc"; + +static const char *__doc_fiction_design_sidb_gates_params_post_design_process = +R"doc(After the design process, the returned gates are not sorted. + +@note This parameter has no effect unless the gate design is +exhaustive and all combinations are enumerated.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_termination_cond = R"doc(The design process is terminated after a valid SiDB gate design is found. @@ -5737,6 +5751,19 @@ parameters. The design process is parallelized to improve performance. Returns: A vector of designed SiDB gate layouts.)doc"; +static const char *__doc_fiction_detail_design_sidb_gates_impl_set_simulation_results_retention_accordingly = +R"doc(This function makes sure that the underlying parameters for +`is_operational` allow simulation results to be used when the given +parameter set indicates the use for it. + +Parameter ``params``: + Parameters and settings for the gate designer. + +Returns: + Parameters and settings for the gate designer for which the + simulation results retention of the underlying parameter for + operational status assessment is set accordingly.)doc"; + static const char *__doc_fiction_detail_design_sidb_gates_impl_skeleton_layout = R"doc(The skeleton layout serves as a starting layout to which SiDBs are added to create unique SiDB layouts and, if possible, working gates. @@ -5753,6 +5780,21 @@ Parameter ``cell_indices``: A copy of the original layout (`skeleton_layout`) with SiDB cells added at specified indices.)doc"; +static const char *__doc_fiction_detail_design_sidb_gates_impl_sort_designed_gate_layouts_by_ground_state_isolation = +R"doc(Performs a sorting operation on the designed gate layouts, putting +those in front for which the energetic gap between the ground state +and the first excited state is larger. For each designed gate layout, +the minimum energetic gap is taken over each input. When the minima +are equal for two designed gate layouts, the average energetic gap +over each input is taken as a tiebreaker. + +Parameter ``designed_gate_layouts``: + A vector of designed gate layouts to sort in place. + +Parameter ``sim_results_per_input_for_each_gate_design``: + The simulation results for each input of each designed gate + layout.)doc"; + static const char *__doc_fiction_detail_design_sidb_gates_impl_stats = R"doc(The statistics of the gate design.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_truth_table = R"doc(Truth table of the given gate.)doc"; @@ -8135,11 +8177,12 @@ Parameter ``bdl``: Returns: `true` if `0` is encoded, `false` otherwise.)doc"; -static const char *__doc_fiction_detail_is_operational_impl_get_number_of_simulator_invocations = -R"doc(Returns the total number of simulator invocations. +static const char *__doc_fiction_detail_is_operational_impl_get_operational_status_assessment_stats = +R"doc(Returns auxiliary results from the operational status assessment, +including the number of simulator invocations. Returns: - The number of simulator invocations.)doc"; + Auxiliary results from the operational status assessment.)doc"; static const char *__doc_fiction_detail_is_operational_impl_input_bdl_wires = R"doc(Input BDL wires.)doc"; @@ -8338,7 +8381,9 @@ Parameter ``output_wire_index``: The index representing the current input pattern of the output wire.)doc"; -static const char *__doc_fiction_detail_is_operational_impl_simulator_invocations = R"doc(Number of simulator invocations.)doc"; +static const char *__doc_fiction_detail_is_operational_impl_stats = +R"doc(Auxiliary results from the operational status assessment, including +the number of simulator invocations.)doc"; static const char *__doc_fiction_detail_is_operational_impl_truth_table = R"doc(The specification of the layout.)doc"; @@ -15500,9 +15545,9 @@ Parameter ``params``: Parameters for the `is_operational` algorithm. Returns: - A pair containing the operational status of the SiDB layout - (either `OPERATIONAL` or `NON_OPERATIONAL`) and the number of - input combinations tested.)doc"; + A pair containing the operational status of the gate layout + (either `OPERATIONAL` or `NON_OPERATIONAL`) along with auxiliary + statistics.)doc"; static const char *__doc_fiction_is_operational_2 = R"doc(Determine the operational status of an SiDB layout. @@ -15538,9 +15583,9 @@ Parameter ``canvas_lyt``: Optional canvas layout. Returns: - A pair containing the operational status of the SiDB layout - (either `OPERATIONAL` or `NON_OPERATIONAL`) and the number of - input combinations tested.)doc"; + A pair containing the operational status of the gate layout + (either `OPERATIONAL` or `NON_OPERATIONAL`) along with auxiliary + statistics.)doc"; static const char *__doc_fiction_is_operational_params = R"doc(Parameters for the `is_operational` algorithm.)doc"; @@ -15604,6 +15649,20 @@ static const char *__doc_fiction_is_operational_params_simulation_parameters = R"doc(The simulation parameters for the physical simulation of the ground state.)doc"; +static const char *__doc_fiction_is_operational_params_simulation_results_mode = R"doc(Selector for the different ways to handle obtained simulation results.)doc"; + +static const char *__doc_fiction_is_operational_params_simulation_results_mode_DISCARD_SIMULATION_RESULTS = +R"doc(The simulation results are discarded after the operational status was +assessed.)doc"; + +static const char *__doc_fiction_is_operational_params_simulation_results_mode_KEEP_SIMULATION_RESULTS = +R"doc(The simulation results for each input pattern are returned for +operational gates.)doc"; + +static const char *__doc_fiction_is_operational_params_simulation_results_retention = +R"doc(Simulation results that are used to certify the status `OPERATIONAL` +are not kept by default.)doc"; + static const char *__doc_fiction_is_operational_params_strategy_to_analyze_operational_status = R"doc(Strategy to determine whether a layout is operational or non- operational.)doc"; @@ -15884,7 +15943,7 @@ Template parameter ``InputIt``: Must meet the requirements of `LegacyInputIterator`. Parameter ``first``: - Begin of the range to examime. + Begin of the range to examine. Parameter ``last``: End of the range to examine. @@ -15902,7 +15961,7 @@ Template parameter ``InputIt``: Must meet the requirements of `LegacyInputIterator`. Parameter ``first``: - Begin of the range to examime. + Begin of the range to examine. Parameter ``last``: End of the range to examine. @@ -16802,42 +16861,25 @@ Parameter ``params``: Returns: The count of operational input combinations.)doc"; -static const char *__doc_fiction_operational_input_patterns_2 = -R"doc(This function determines the input combinations for which the layout -is operational. - -Template parameter ``Lyt``: - SiDB cell-level layout type. - -Template parameter ``TT``: - Type of the truth table. - -Parameter ``lyt``: - The SiDB layout. - -Parameter ``spec``: - Vector of truth table specifications. - -Parameter ``params``: - Parameters to simulate if a input combination is operational. - -Parameter ``input_bdl_wire``: - Optional BDL input wires of lyt. +static const char *__doc_fiction_operational_status = R"doc(Possible operational status of a layout.)doc"; -Parameter ``output_bdl_wire``: - Optional BDL output wires of lyt. +static const char *__doc_fiction_operational_status_NON_OPERATIONAL = R"doc(The layout is non-operational.)doc"; -Parameter ``canvas_lyt``: - Optional canvas layout. +static const char *__doc_fiction_operational_status_OPERATIONAL = R"doc(The layout is operational.)doc"; -Returns: - The count of operational input combinations.)doc"; +static const char *__doc_fiction_operational_status_assessment_stats = +R"doc(This struct is used to collect auxiliary results from the operational +status assessment. -static const char *__doc_fiction_operational_status = R"doc(Possible operational status of a layout.)doc"; +Template parameter ``Lyt``: + SiDB cell-level layout type.)doc"; -static const char *__doc_fiction_operational_status_NON_OPERATIONAL = R"doc(The layout is non-operational.)doc"; +static const char *__doc_fiction_operational_status_assessment_stats_simulation_results = +R"doc(The charge distributions obtained for each input combination tested, +sorted by the binary representation of the respectively associated +input combinations.)doc"; -static const char *__doc_fiction_operational_status_OPERATIONAL = R"doc(The layout is operational.)doc"; +static const char *__doc_fiction_operational_status_assessment_stats_simulator_invocations = R"doc(The number of input combinations tested.)doc"; static const char *__doc_fiction_orthogonal = R"doc(A scalable placement & routing approach based on orthogonal graph From 2e9181c10ea7c3ccddc43f3c4e0ea63eb8a83cc0 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 11:49:34 +0100 Subject: [PATCH 019/138] :art: Post-fix `&&` --- .../fiction/algorithms/physical_design/design_sidb_gates.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 3341f2a24..578408c81 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -188,7 +188,7 @@ class design_sidb_gates_impl * @param ps Parameters and settings for the gate designer. * @param st Statistics for the gate design process. */ - design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params> ps, + design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params>&& ps, design_sidb_gates_stats& st) : skeleton_layout{skeleton}, truth_table{spec}, From de1982a7a186dbe0291a683c4fa3a4b2e0549947 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 12:04:37 +0100 Subject: [PATCH 020/138] :snake: Adjusted bindings for `is_operational` --- .../simulation/sidb/is_operational.hpp | 61 ++++++++++++++++++- .../sidb/sidb_simulation_result.hpp | 1 - .../simulation/sidb/is_operational.hpp | 1 - 3 files changed, 60 insertions(+), 3 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index c2cf73349..0c23cd247 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -83,6 +83,22 @@ void is_operational(pybind11::module& m) py::arg("canvas_lyt") = std::nullopt, DOC(fiction_is_kink_induced_non_operational_2)); } +template +void operational_status_assessment_stats(pybind11::module& m, const std::string& lattice = "") +{ + namespace py = pybind11; + + py::class_>( + m, fmt::format("operational_status_assessment_stats{}", lattice).c_str(), + DOC(fiction_operational_status_assessment_stats)) + .def(py::init<>()) + .def_readwrite("simulation_results", &fiction::operational_status_assessment_stats::simulation_results, + DOC(fiction_operational_status_assessment_stats_simulation_results)) + .def_readwrite("simulator_invocations", + &fiction::operational_status_assessment_stats::simulator_invocations, + DOC(fiction_operational_status_assessment_stats_simulator_invocations)); +} + } // namespace detail inline void is_operational(pybind11::module& m) @@ -101,6 +117,44 @@ inline void is_operational(pybind11::module& m) .value("REJECT_KINKS", fiction::is_operational_params::operational_condition::REJECT_KINKS, DOC(fiction_is_operational_params_operational_condition_REJECT_KINKS)); + py::enum_( + m, "operational_analysis_strategy", DOC(fiction_is_operational_params_operational_analysis_strategy)) + .value("SIMULATION_ONLY", fiction::is_operational_params::operational_analysis_strategy::SIMULATION_ONLY, + DOC(fiction_is_operational_params_operational_analysis_strategy_SIMULATION_ONLY)) + .value("FILTER_ONLY", fiction::is_operational_params::operational_analysis_strategy::FILTER_ONLY, + DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_ONLY)) + .value("FILTER_THEN_SIMULATION", + fiction::is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION, + DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_THEN_SIMULATION)); + + py::enum_( + m, "simulation_results_mode", DOC(fiction_is_operational_params_simulation_results_mode)) + .value("KEEP_SIMULATION_RESULTS", + fiction::is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS, + DOC(fiction_is_operational_params_simulation_results_mode_KEEP_SIMULATION_RESULTS)) + .value("DISCARD_SIMULATION_RESULTS", + fiction::is_operational_params::simulation_results_mode::DISCARD_SIMULATION_RESULTS, + DOC(fiction_is_operational_params_simulation_results_mode_DISCARD_SIMULATION_RESULTS)); + + py::enum_( + m, "operational_analysis_strategy", DOC(fiction_is_operational_params_operational_analysis_strategy)) + .value("SIMULATION_ONLY", fiction::is_operational_params::operational_analysis_strategy::SIMULATION_ONLY, + DOC(fiction_is_operational_params_operational_analysis_strategy_SIMULATION_ONLY)) + .value("FILTER_ONLY", fiction::is_operational_params::operational_analysis_strategy::FILTER_ONLY, + DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_ONLY)) + .value("FILTER_THEN_SIMULATION", + fiction::is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION, + DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_THEN_SIMULATION)); + + py::enum_( + m, "simulation_results_mode", DOC(fiction_is_operational_params_simulation_results_mode)) + .value("KEEP_SIMULATION_RESULTS", + fiction::is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS, + DOC(fiction_is_operational_params_simulation_results_mode_KEEP_SIMULATION_RESULTS)) + .value("DISCARD_SIMULATION_RESULTS", + fiction::is_operational_params::simulation_results_mode::DISCARD_SIMULATION_RESULTS, + DOC(fiction_is_operational_params_simulation_results_mode_DISCARD_SIMULATION_RESULTS)); + py::class_(m, "is_operational_params", DOC(fiction_is_operational_params)) .def(py::init<>()) .def_readwrite("simulation_parameters", &fiction::is_operational_params::simulation_parameters, @@ -113,9 +167,14 @@ inline void is_operational(pybind11::module& m) DOC(fiction_is_operational_params_op_condition)) .def_readwrite("strategy_to_analyze_operational_status", &fiction::is_operational_params::strategy_to_analyze_operational_status, - DOC(fiction_is_operational_params_strategy_to_analyze_operational_status)); + DOC(fiction_is_operational_params_strategy_to_analyze_operational_status)) + .def_readwrite("simulation_results_retention", &fiction::is_operational_params::simulation_results_retention, + DOC(fiction_is_operational_params_simulation_results_retention)); // NOTE be careful with the order of the following calls! Python will resolve the first matching overload! + detail::operational_status_assessment_stats(m); + detail::operational_status_assessment_stats(m); + detail::is_operational(m); detail::is_operational(m); } diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_result.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_result.hpp index b5ed86ec3..bc6244afb 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_result.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_result.hpp @@ -26,7 +26,6 @@ template void sidb_simulation_result(pybind11::module& m, const std::string& lattice = "") { namespace py = pybind11; - namespace py = pybind11; py::class_>(m, fmt::format("sidb_simulation_result{}", lattice).c_str(), DOC(fiction_sidb_simulation_result)) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 006b80882..8f2052359 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -75,7 +75,6 @@ struct is_operational_params */ REJECT_KINKS }; - /** * Simulation method to determine if the layout is operational or non-operational. There are three possible * strategies: From 9bbfc8396ecb7c71d786e54665c69432acfa560d Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 12:27:14 +0100 Subject: [PATCH 021/138] :snake: Fixed bindings for `is_operational` --- .../algorithms/simulation/sidb/is_operational.hpp | 8 -------- 1 file changed, 8 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index 0c23cd247..47e6d2d20 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -47,14 +47,6 @@ void is_operational(pybind11::module& m) py::arg("lyt"), py::arg("spec"), py::arg("params") = fiction::is_operational_params{}, DOC(fiction_operational_input_patterns)); - m.def("operational_input_patterns", - py::overload_cast&, const fiction::is_operational_params&, - const std::vector>&, const std::vector>&, - const std::optional&>(&fiction::operational_input_patterns), - py::arg("lyt"), py::arg("spec"), py::arg("params") = fiction::is_operational_params{}, - py::arg("input_bdl_wire"), py::arg("output_bdl_wire"), py::arg("canvas_lyt") = std::nullopt, - DOC(fiction_operational_input_patterns_2)); - m.def("kink_induced_non_operational_input_patterns", py::overload_cast&, const fiction::is_operational_params&>( &fiction::kink_induced_non_operational_input_patterns), From ca252365aa98049084e0f553d0da77cd972b01a5 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 12:40:15 +0100 Subject: [PATCH 022/138] :adhesive_bandage: Changed the way `set_simulation_results_retention_accordingly` acts --- .../physical_design/design_sidb_gates.hpp | 30 +++++-------------- 1 file changed, 8 insertions(+), 22 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 578408c81..efd3de446 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -125,7 +125,6 @@ struct design_sidb_gates_params */ post_design_mode post_design_process = post_design_mode::DO_NOTHING; }; - /** * Statistics for the design of SiDB gates. */ @@ -188,11 +187,11 @@ class design_sidb_gates_impl * @param ps Parameters and settings for the gate designer. * @param st Statistics for the gate design process. */ - design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params>&& ps, + design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params> ps, design_sidb_gates_stats& st) : skeleton_layout{skeleton}, truth_table{spec}, - params{set_simulation_results_retention_accordingly(std::move(ps))}, + params{ps}, all_sidbs_in_canvas{all_coordinates_in_spanned_area(params.canvas.first, params.canvas.second)}, stats{st}, input_bdl_wires{detect_bdl_wires(skeleton_layout, @@ -207,8 +206,9 @@ class design_sidb_gates_impl { stats.number_of_layouts = all_canvas_layouts.size(); stats.sim_engine = params.operational_params.sim_engine; - } + set_simulation_results_retention_accordingly(); + } /** * Design gates by using the *Automatic Exhaustive Gate Desginer*. This algorithm was proposed in \"Minimal * Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds\" by J. Drewniok, M. Walter, @@ -418,7 +418,6 @@ class design_sidb_gates_impl return randomly_designed_gate_layouts; } - /** * Design Standard Cells/gates by using the *QuickCell* algorithm. * @@ -808,31 +807,18 @@ class design_sidb_gates_impl return lyt; } - /** * This function makes sure that the underlying parameters for `is_operational` allow simulation results to be used * when the given parameter set indicates the use for it. - * - * @param params Parameters and settings for the gate designer. - * @return Parameters and settings for the gate designer for which the simulation results retention of the - * underlying parameter for operational status assessment is set accordingly. */ - [[nodiscard]] static design_sidb_gates_params> - set_simulation_results_retention_accordingly(const design_sidb_gates_params>& params) noexcept + void set_simulation_results_retention_accordingly() noexcept { - design_sidb_gates_params> ps{params}; - - if (params.post_design_process == design_sidb_gates_params>::post_design_mode::DO_NOTHING) + if (params.post_design_process != design_sidb_gates_params>::post_design_mode::DO_NOTHING) { - return ps; + params.operational_params.simulation_results_retention = + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS; } - - ps.operational_params.simulation_results_retention = - is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS; - - return ps; } - /** * Performs a sorting operation on the designed gate layouts, putting those in front for which the energetic gap * between the ground state and the first excited state is larger. For each designed gate layout, the minimum From 3fa58abec51c0852f06a1966cded4e596f76b60d Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Mon, 3 Feb 2025 11:41:22 +0000 Subject: [PATCH 023/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 9dbb5620a..26a7a79b3 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -5754,15 +5754,7 @@ parameters. The design process is parallelized to improve performance. static const char *__doc_fiction_detail_design_sidb_gates_impl_set_simulation_results_retention_accordingly = R"doc(This function makes sure that the underlying parameters for `is_operational` allow simulation results to be used when the given -parameter set indicates the use for it. - -Parameter ``params``: - Parameters and settings for the gate designer. - -Returns: - Parameters and settings for the gate designer for which the - simulation results retention of the underlying parameter for - operational status assessment is set accordingly.)doc"; +parameter set indicates the use for it.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_skeleton_layout = R"doc(The skeleton layout serves as a starting layout to which SiDBs are From d5866a45431c0a0a3fba2f9f1909e05f7d5e7755 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 12:46:21 +0100 Subject: [PATCH 024/138] :adhesive_bandage: Renaming artifact --- .../fiction/algorithms/simulation/sidb/operational_domain.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/simulation/sidb/operational_domain.hpp b/include/fiction/algorithms/simulation/sidb/operational_domain.hpp index a2cd10600..ee789f842 100644 --- a/include/fiction/algorithms/simulation/sidb/operational_domain.hpp +++ b/include/fiction/algorithms/simulation/sidb/operational_domain.hpp @@ -1111,7 +1111,7 @@ class operational_domain_impl const auto& [status, aux_stats] = is_operational(layout, truth_table, op_params_set_dimension_values, input_bdl_wires, output_bdl_wires, std::optional{canvas_lyt}); - num_simulator_invocations += aux_stats.number_of_simulator_invocations; + num_simulator_invocations += aux_stats.simulator_invocations; if (status == operational_status::NON_OPERATIONAL) { From 1feeb5648bcfad62b1b769ffda761c7f64316a6a Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 13:00:26 +0100 Subject: [PATCH 025/138] :adhesive_bandage: Removed duplicate definitions --- .../simulation/sidb/is_operational.hpp | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index 47e6d2d20..ba09e8596 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -128,25 +128,6 @@ inline void is_operational(pybind11::module& m) fiction::is_operational_params::simulation_results_mode::DISCARD_SIMULATION_RESULTS, DOC(fiction_is_operational_params_simulation_results_mode_DISCARD_SIMULATION_RESULTS)); - py::enum_( - m, "operational_analysis_strategy", DOC(fiction_is_operational_params_operational_analysis_strategy)) - .value("SIMULATION_ONLY", fiction::is_operational_params::operational_analysis_strategy::SIMULATION_ONLY, - DOC(fiction_is_operational_params_operational_analysis_strategy_SIMULATION_ONLY)) - .value("FILTER_ONLY", fiction::is_operational_params::operational_analysis_strategy::FILTER_ONLY, - DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_ONLY)) - .value("FILTER_THEN_SIMULATION", - fiction::is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION, - DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_THEN_SIMULATION)); - - py::enum_( - m, "simulation_results_mode", DOC(fiction_is_operational_params_simulation_results_mode)) - .value("KEEP_SIMULATION_RESULTS", - fiction::is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS, - DOC(fiction_is_operational_params_simulation_results_mode_KEEP_SIMULATION_RESULTS)) - .value("DISCARD_SIMULATION_RESULTS", - fiction::is_operational_params::simulation_results_mode::DISCARD_SIMULATION_RESULTS, - DOC(fiction_is_operational_params_simulation_results_mode_DISCARD_SIMULATION_RESULTS)); - py::class_(m, "is_operational_params", DOC(fiction_is_operational_params)) .def(py::init<>()) .def_readwrite("simulation_parameters", &fiction::is_operational_params::simulation_parameters, From f0bf4fff4ce26ce6826b6daffd2372fd922c0c13 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Mon, 3 Feb 2025 17:02:32 +0100 Subject: [PATCH 026/138] :snake: Added missing identifiers to `__init__.py` --- bindings/mnt/pyfiction/__init__.py | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index cdbd2e9ce..9051f43a1 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -201,6 +201,7 @@ offset_area, offset_coordinate, offset_volume, + operational_analysis_strategy, operational_condition, operational_domain, operational_domain_contour_tracing, @@ -214,6 +215,7 @@ operational_domain_value_range, operational_input_patterns, operational_status, + operational_status_assessment_stats, orthogonal, orthogonal_params, orthogonal_stats, @@ -228,6 +230,7 @@ population_stability_information_100, population_stability_information_111, positive_charges, + post_design_mode, post_layout_optimization, post_layout_optimization_params, post_layout_optimization_stats, @@ -273,6 +276,7 @@ sign_to_charge_state, ### logic simulate, + simulation_results_mode, siqad_area, siqad_coordinate, siqad_volume, @@ -287,6 +291,7 @@ technology_mapping_stats, # Networks technology_network, + termination_condition, time_to_solution, time_to_solution_for_given_simulation_results, time_to_solution_params, @@ -508,6 +513,7 @@ "offset_area", "offset_coordinate", "offset_volume", + "operational_analysis_strategy", "operational_condition", "operational_domain", "operational_domain_contour_tracing", @@ -521,6 +527,7 @@ "operational_domain_value_range", "operational_input_patterns", "operational_status", + "operational_status_assessment_stats", "orthogonal", "orthogonal_params", "orthogonal_stats", @@ -535,6 +542,7 @@ "population_stability_information_100", "population_stability_information_111", "positive_charges", + "post_design_mode", "post_layout_optimization", "post_layout_optimization_params", "post_layout_optimization_stats", @@ -580,6 +588,7 @@ "sign_to_charge_state", ### logic "simulate", + "simulation_results_mode", "siqad_area", "siqad_coordinate", "siqad_volume", @@ -594,6 +603,7 @@ "technology_mapping_stats", # Networks "technology_network", + "termination_condition", "time_to_solution", "time_to_solution_for_given_simulation_results", "time_to_solution_params", From 617cde2e573d653184fa56494196e0130a8cee70 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Mon, 3 Feb 2025 17:18:01 +0100 Subject: [PATCH 027/138] :art: Missing import --- .../pyfiction/algorithms/simulation/sidb/is_operational.hpp | 1 + 1 file changed, 1 insertion(+) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index ba09e8596..36e4d38de 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -15,6 +15,7 @@ #include #include +#include #include namespace pyfiction From 8f171d2414bc5e28994c7f283bf725646d3cf7fc Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 19:33:45 +0100 Subject: [PATCH 028/138] :art: Renamed return value --- .../simulation/sidb/test_is_operational.py | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py index f995637c8..aff427772 100644 --- a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py +++ b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py @@ -47,20 +47,20 @@ def test_is_operational(self): params = is_operational_params() params.simulation_parameters = sidb_simulation_parameters(2, -0.28) - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) self.assertEqual(op_status, operational_status.OPERATIONAL) params.simulation_parameters = sidb_simulation_parameters(2, -0.1) - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) self.assertEqual(op_status, operational_status.NON_OPERATIONAL) # pre-determined I/O pins output_bdl_wires = detect_bdl_wires_100(lyt, detect_bdl_wires_params(), bdl_wire_selection.OUTPUT) input_bdl_wires = detect_bdl_wires_100(lyt, detect_bdl_wires_params(), bdl_wire_selection.INPUT) - [op_status, _evaluated_input_combinations] = is_operational( + [op_status, _aux_stats] = is_operational( lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires ) self.assertEqual(op_status, operational_status.NON_OPERATIONAL) @@ -69,7 +69,7 @@ def test_is_operational(self): canvas_lyt = sidb_100_lattice() canvas_lyt.assign_cell_type((4, 5), sidb_technology.cell_type.LOGIC) canvas_lyt.assign_cell_type((6, 7), sidb_technology.cell_type.LOGIC) - [op_status, _evaluated_input_combinations] = is_operational( + [op_status, _aux_stats] = is_operational( lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires ) self.assertEqual(op_status, operational_status.NON_OPERATIONAL) @@ -80,13 +80,13 @@ def test_and_gate_kinks(self): params = is_operational_params() params.simulation_parameters = sidb_simulation_parameters(2, -0.32) - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) self.assertEqual(op_status, operational_status.OPERATIONAL) params.op_condition = operational_condition.REJECT_KINKS - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) self.assertEqual(op_status, operational_status.NON_OPERATIONAL) @@ -116,7 +116,7 @@ def test_and_gate_111_lattice_11_input_pattern(self): params = is_operational_params() params.simulation_parameters = sidb_simulation_parameters(2, -0.32) - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) self.assertEqual(op_status, operational_status.OPERATIONAL) @@ -124,7 +124,7 @@ def test_and_gate_111_lattice_11_input_pattern(self): self.assertEqual(params.simulation_parameters.mu_minus, -0.1) - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) self.assertEqual(op_status, operational_status.NON_OPERATIONAL) From 1b4fefb52d8dd8518701fd440c033b071d151667 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 19:35:58 +0100 Subject: [PATCH 029/138] :adhesive_bandage: Added forgotten parameter --- .../pyfiction/algorithms/simulation/sidb/is_operational.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index 36e4d38de..67fa2d0cc 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -146,8 +146,8 @@ inline void is_operational(pybind11::module& m) DOC(fiction_is_operational_params_simulation_results_retention)); // NOTE be careful with the order of the following calls! Python will resolve the first matching overload! - detail::operational_status_assessment_stats(m); - detail::operational_status_assessment_stats(m); + detail::operational_status_assessment_stats(m, "_100"); + detail::operational_status_assessment_stats(m, "_111"); detail::is_operational(m); detail::is_operational(m); From b70565c5ae07935b98de9bccc4cc12292e8e7093 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Mon, 3 Feb 2025 18:36:43 +0000 Subject: [PATCH 030/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../algorithms/simulation/sidb/test_is_operational.py | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py index aff427772..4f0795342 100644 --- a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py +++ b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py @@ -60,18 +60,14 @@ def test_is_operational(self): # pre-determined I/O pins output_bdl_wires = detect_bdl_wires_100(lyt, detect_bdl_wires_params(), bdl_wire_selection.OUTPUT) input_bdl_wires = detect_bdl_wires_100(lyt, detect_bdl_wires_params(), bdl_wire_selection.INPUT) - [op_status, _aux_stats] = is_operational( - lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires - ) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires) self.assertEqual(op_status, operational_status.NON_OPERATIONAL) # pre-determined I/O pins and canvas layout canvas_lyt = sidb_100_lattice() canvas_lyt.assign_cell_type((4, 5), sidb_technology.cell_type.LOGIC) canvas_lyt.assign_cell_type((6, 7), sidb_technology.cell_type.LOGIC) - [op_status, _aux_stats] = is_operational( - lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires - ) + [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires) self.assertEqual(op_status, operational_status.NON_OPERATIONAL) def test_and_gate_kinks(self): From e80df5597c6eed4fb21750e9096460e59cfc744f Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 20:29:26 +0100 Subject: [PATCH 031/138] :white_check_mark: Increased test coverage --- .../physical_design/design_sidb_gates.cpp | 21 ++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 68fcffcef..56daefbb7 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -201,7 +201,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ CHECK(mockturtle::to_seconds(stats.time_total) > 0.0); CHECK(stats.sim_engine == sidb_simulation_engine::QUICKSIM); } - SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation") + SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation (Automatic Exhaustive Gate Designer)") { const auto params = design_sidb_gates_params>{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, @@ -214,6 +214,25 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); + REQUIRE(found_gate_layouts.size() == 4); + CHECK(found_gate_layouts[0].get_cell_type({10, 4, 0}) == siqad_layout::technology::LOGIC); + CHECK(found_gate_layouts[1].get_cell_type({11, 4, 0}) == siqad_layout::technology::LOGIC); + CHECK(found_gate_layouts[2].get_cell_type({12, 4, 0}) == siqad_layout::technology::LOGIC); + CHECK(found_gate_layouts[3].get_cell_type({13, 4, 0}) == siqad_layout::technology::LOGIC); + } + SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation (QuickCell)") + { + const auto params = design_sidb_gates_params>{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, + design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + {{10, 4, 0}, {13, 4, 0}}, + 1, + design_sidb_gates_params>::termination_condition::ALL_COMBINATIONS_ENUMERATED, + design_sidb_gates_params< + cell>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES}; + + const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); + REQUIRE(found_gate_layouts.size() == 4); CHECK(found_gate_layouts[0].get_cell_type({10, 4, 0}) == siqad_layout::technology::LOGIC); CHECK(found_gate_layouts[1].get_cell_type({11, 4, 0}) == siqad_layout::technology::LOGIC); From 46d688461c169affaf9967b955228727cfe22acd Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Mon, 3 Feb 2025 19:30:15 +0000 Subject: [PATCH 032/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- test/algorithms/physical_design/design_sidb_gates.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 56daefbb7..fa4c28b39 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -201,7 +201,8 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ CHECK(mockturtle::to_seconds(stats.time_total) > 0.0); CHECK(stats.sim_engine == sidb_simulation_engine::QUICKSIM); } - SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation (Automatic Exhaustive Gate Designer)") + SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation " + "(Automatic Exhaustive Gate Designer)") { const auto params = design_sidb_gates_params>{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, @@ -220,7 +221,8 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ CHECK(found_gate_layouts[2].get_cell_type({12, 4, 0}) == siqad_layout::technology::LOGIC); CHECK(found_gate_layouts[3].get_cell_type({13, 4, 0}) == siqad_layout::technology::LOGIC); } - SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation (QuickCell)") + SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation " + "(QuickCell)") { const auto params = design_sidb_gates_params>{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, From 40822a6caf88ad93d12bd6d0bc9170d002992efd Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 3 Feb 2025 21:20:02 +0100 Subject: [PATCH 033/138] :snake: Different lattice instantiations get different identifiers in `__init__.py` --- bindings/mnt/pyfiction/__init__.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index 9051f43a1..ecafe9e75 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -215,7 +215,8 @@ operational_domain_value_range, operational_input_patterns, operational_status, - operational_status_assessment_stats, + operational_status_assessment_stats_100, + operational_status_assessment_stats_111, orthogonal, orthogonal_params, orthogonal_stats, @@ -527,7 +528,8 @@ "operational_domain_value_range", "operational_input_patterns", "operational_status", - "operational_status_assessment_stats", + "operational_status_assessment_stats_100", + "operational_status_assessment_stats_111", "orthogonal", "orthogonal_params", "orthogonal_stats", From 756f5230547a56689f7aa8d36f6d29e5282363a7 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 5 Feb 2025 17:59:33 +0100 Subject: [PATCH 034/138] :sparkles: Generic framework for comparing SiDB gates --- .../physical_design/design_sidb_gates.hpp | 4 +- .../physical_design/design_sidb_gates.hpp | 233 ++++-------------- .../physical_design/design_sidb_gates.cpp | 140 +++++------ 3 files changed, 124 insertions(+), 253 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index ab4ad4c55..8501e9a0c 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -24,7 +24,7 @@ void design_sidb_gates(pybind11::module& m) namespace py = pybind11; m.def("design_sidb_gates", &fiction::design_sidb_gates, py::arg("skeleton"), py::arg("spec"), - py::arg("params") = fiction::design_sidb_gates_params>{}, py::arg("stats") = nullptr, + py::arg("params") = fiction::design_sidb_gates_params{}, py::arg("stats") = nullptr, DOC(fiction_design_sidb_gates)); } @@ -44,6 +44,8 @@ inline void design_sidb_gates(pybind11::module& m) return stream.str(); }); + // TODO: fix design_sidb_gates_params template arg + /** * Design approach selector type. */ diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index efd3de446..ddd2a0bac 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -6,6 +6,7 @@ #define FICTION_DESIGN_SIDB_GATES_HPP #include "fiction/algorithms/iter/bdl_input_iterator.hpp" +#include "fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp" #include "fiction/algorithms/simulation/sidb/detect_bdl_wires.hpp" #include "fiction/algorithms/simulation/sidb/is_operational.hpp" #include "fiction/algorithms/simulation/sidb/random_sidb_layout_generator.hpp" @@ -26,10 +27,7 @@ #include #include #include -#include #include -#include -#include #include #include #include @@ -44,10 +42,10 @@ namespace fiction /** * This struct contains parameters and settings to design SiDB gates. * - * @tparam CellType Cell type. + * @tparam Lyt SiDB cell-level layout type. * */ -template +template struct design_sidb_gates_params { /** @@ -82,20 +80,6 @@ struct design_sidb_gates_params */ ALL_COMBINATIONS_ENUMERATED }; - /** - * Selector for the available post-design processes. - */ - enum class post_design_mode : uint8_t - { - /** - * No post-design operation is performed. - */ - DO_NOTHING, - /** - * The designed gates are sorted by how energetically isolated the ground state is from the first excited state. - */ - PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES - }; /** * Parameters for the `is_operational` function. */ @@ -107,7 +91,7 @@ struct design_sidb_gates_params /** * Canvas spanned by the northwest and southeast cell. */ - std::pair canvas{}; + std::pair, cell> canvas{}; /** * Number of SiDBs placed in the canvas to create a working gate. */ @@ -118,12 +102,13 @@ struct design_sidb_gates_params * @note This parameter has no effect unless the gate design is exhaustive. */ termination_condition termination_cond = termination_condition::ALL_COMBINATIONS_ENUMERATED; - /** - * After the design process, the returned gates are not sorted. - * - * @note This parameter has no effect unless the gate design is exhaustive and all combinations are enumerated. - */ - post_design_mode post_design_process = post_design_mode::DO_NOTHING; + // /** + // * After the design process, the returned gates are not sorted. + // * + // * @note This parameter has no effect unless the gate design is exhaustive and all combinations are enumerated. + // */ + // post_design_mode post_design_process = post_design_mode::DO_NOTHING; + designed_sidb_gates_ordering_recipe post_design_process{}; }; /** * Statistics for the design of SiDB gates. @@ -187,7 +172,7 @@ class design_sidb_gates_impl * @param ps Parameters and settings for the gate designer. * @param st Statistics for the gate design process. */ - design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params> ps, + design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params ps, design_sidb_gates_stats& st) : skeleton_layout{skeleton}, truth_table{spec}, @@ -226,21 +211,17 @@ class design_sidb_gates_impl auto all_combinations = determine_all_combinations_of_distributing_k_entities_on_n_positions( params.number_of_sidbs, static_cast(all_sidbs_in_canvas.size())); - std::vector designed_gate_layouts{}; - if (all_combinations.empty()) { - return designed_gate_layouts; + return std::vector{}; } - std::optional>>>> - sim_results_per_input_for_each_gate_design{}; + designed_sidb_gates designed_gate_layouts{}; - if (params.post_design_process == - design_sidb_gates_params>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES) + if (!params.post_design_process.empty()) { - sim_results_per_input_for_each_gate_design = - std::make_optional>>>>(); + designed_gate_layouts.simulation_results = + std::make_optional::simulation_results_per_input>>(); } std::unordered_set> sidbs_affected_by_defects = {}; @@ -259,12 +240,12 @@ class design_sidb_gates_impl std::shuffle(all_combinations.begin(), all_combinations.end(), std::default_random_engine(std::random_device{}())); - const auto add_combination_to_layout_and_check_operation = - [this, &mutex_to_protect_designed_gate_layouts, &designed_gate_layouts, - &sim_results_per_input_for_each_gate_design, &solution_found](const auto& combination) noexcept + const auto add_combination_to_layout_and_check_operation = [this, &mutex_to_protect_designed_gate_layouts, + &designed_gate_layouts, + &solution_found](const auto& combination) noexcept { // canvas SiDBs are added to the skeleton - const auto layout_with_added_cells = skeleton_layout_with_canvas_sidbs(combination); + auto&& layout_with_added_cells = skeleton_layout_with_canvas_sidbs(combination); if (const auto [status, aux_stats] = is_operational( layout_with_added_cells, truth_table, params.operational_params, input_bdl_wires, output_bdl_wires); @@ -273,11 +254,11 @@ class design_sidb_gates_impl { const std::lock_guard lock_vector{mutex_to_protect_designed_gate_layouts}; - designed_gate_layouts.emplace_back(layout_with_added_cells); + designed_gate_layouts.gate_layouts.emplace_back(std::move(layout_with_added_cells)); - if (sim_results_per_input_for_each_gate_design.has_value()) + if (designed_gate_layouts.simulation_results.has_value()) { - sim_results_per_input_for_each_gate_design.value().emplace_back( + designed_gate_layouts.simulation_results.value().emplace_back( std::move(aux_stats.simulation_results.value())); } } @@ -306,7 +287,7 @@ class design_sidb_gates_impl { if (solution_found && (params.termination_cond == - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION)) + design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION)) { return; } @@ -324,15 +305,12 @@ class design_sidb_gates_impl } } - if (params.post_design_process == - design_sidb_gates_params>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES && - designed_gate_layouts.size() > 1) + if (!params.post_design_process.empty() && designed_gate_layouts.gate_layouts.size() > 1) { - sort_designed_gate_layouts_by_ground_state_isolation( - designed_gate_layouts, std::move(sim_results_per_input_for_each_gate_design.value())); + order_designed_sidb_gates(params.post_design_process, designed_gate_layouts); } - return designed_gate_layouts; + return designed_gate_layouts.gate_layouts; } /** * Design gates randomly and in parallel. @@ -442,27 +420,22 @@ class design_sidb_gates_impl stats.number_of_layouts_after_third_pruning = stats.number_of_layouts_after_second_pruning - number_of_discarded_layouts_at_third_pruning.load(); - std::vector gate_layouts{}; - gate_layouts.reserve(gate_candidates.size()); - if (gate_candidates.empty()) { - return gate_layouts; + return std::vector{}; } - std::optional>>>> - sim_results_per_input_for_each_gate_design{}; + designed_sidb_gates designed_gate_layouts{}; - if (params.post_design_process == - design_sidb_gates_params>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES) + if (!params.post_design_process.empty()) { - sim_results_per_input_for_each_gate_design = - std::make_optional>>>>(); + designed_gate_layouts.simulation_results = + std::make_optional::simulation_results_per_input>>(); } std::mutex mutex_to_protect_gate_designs{}; - gate_layouts.reserve(gate_candidates.size()); + designed_gate_layouts.gate_layouts.reserve(gate_candidates.size()); // TODO: is it smart to do a reserve here? const std::size_t num_threads = std::min(number_of_threads, gate_candidates.size()); @@ -473,13 +446,11 @@ class design_sidb_gates_impl std::atomic gate_design_found = false; - const auto check_operational_status = - [this, &gate_layouts, &mutex_to_protect_gate_designs, &gate_design_found, - &sim_results_per_input_for_each_gate_design](const auto& candidate) noexcept + const auto check_operational_status = [this, &designed_gate_layouts, &mutex_to_protect_gate_designs, + &gate_design_found](auto&& candidate) noexcept { // Early exit if a solution is found and only the first solution is required - if (gate_design_found && (params.termination_cond == - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION)) + if (gate_design_found && (params.termination_cond == design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION)) { return; } @@ -496,11 +467,11 @@ class design_sidb_gates_impl { const std::lock_guard lock{mutex_to_protect_gate_designs}; - gate_layouts.emplace_back(candidate); + designed_gate_layouts.gate_layouts.emplace_back(std::move(candidate)); - if (sim_results_per_input_for_each_gate_design.has_value()) + if (designed_gate_layouts.simulation_results.has_value()) { - sim_results_per_input_for_each_gate_design.value().emplace_back( + designed_gate_layouts.simulation_results.value().emplace_back( std::move(aux_stats.simulation_results.value())); } } @@ -520,7 +491,7 @@ class design_sidb_gates_impl { if (gate_design_found && (params.termination_cond == - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION)) + design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION)) { return; } @@ -538,15 +509,12 @@ class design_sidb_gates_impl } } - if (params.post_design_process == - design_sidb_gates_params>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES && - gate_layouts.size() > 1) + if (!params.post_design_process.empty() && designed_gate_layouts.gate_layouts.size() > 1) { - sort_designed_gate_layouts_by_ground_state_isolation( - gate_layouts, std::move(sim_results_per_input_for_each_gate_design.value())); + order_designed_sidb_gates(params.post_design_process, designed_gate_layouts); } - return gate_layouts; + return designed_gate_layouts.gate_layouts; } private: @@ -562,7 +530,7 @@ class design_sidb_gates_impl /** * Parameters for the *SiDB Gate Designer*. */ - design_sidb_gates_params> params; + design_sidb_gates_params params; /** * All cells within the canvas. */ @@ -813,113 +781,12 @@ class design_sidb_gates_impl */ void set_simulation_results_retention_accordingly() noexcept { - if (params.post_design_process != design_sidb_gates_params>::post_design_mode::DO_NOTHING) + if (!params.post_design_process.empty()) { params.operational_params.simulation_results_retention = is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS; } } - /** - * Performs a sorting operation on the designed gate layouts, putting those in front for which the energetic gap - * between the ground state and the first excited state is larger. For each designed gate layout, the minimum - * energetic gap is taken over each input. When the minima are equal for two designed gate layouts, the average - * energetic gap over each input is taken as a tiebreaker. - * - * @param designed_gate_layouts A vector of designed gate layouts to sort in place. - * @param sim_results_per_input_for_each_gate_design The simulation results for each input of each designed gate - * layout. - */ - void sort_designed_gate_layouts_by_ground_state_isolation( - std::vector& designed_gate_layouts, std::vector>>> - sim_results_per_input_for_each_gate_design) const noexcept - { - // pair the two input vectors - std::vector>>>> pairs{}; - pairs.reserve(designed_gate_layouts.size()); - - for (uint64_t i = 0; i < designed_gate_layouts.size(); ++i) - { - pairs.emplace_back(std::move(designed_gate_layouts.at(i)), - std::move(sim_results_per_input_for_each_gate_design.at(i))); - } - - // clear the designed_gate_layouts vector so that we may reenter the elements in order later - designed_gate_layouts.clear(); - - // sort all individual simulation results by system energy - for (auto& pair : pairs) - { - for (std::vector>& sim_res : pair.second) - { - std::sort(sim_res.begin(), sim_res.end(), [](const auto& cds1, const auto& cds2) noexcept - { return cds1.get_system_energy() < cds2.get_system_energy(); }); - } - } - - const auto get_ground_state_isolation = - [&](const std::vector>& sim_res) noexcept - { - return sim_res.size() == 1 ? std::numeric_limits::infinity() : - sim_res.at(1).get_system_energy() - sim_res.at(0).get_system_energy(); - }; - - const auto minimum_ground_state_isolation_for_all_inputs = - [&get_ground_state_isolation]( - const std::vector>>& res_per_input) noexcept - { - std::vector ground_state_isolations{}; - std::transform(res_per_input.cbegin(), res_per_input.cend(), std::back_inserter(ground_state_isolations), - get_ground_state_isolation); - return *std::min_element(ground_state_isolations.cbegin(), ground_state_isolations.cend()); - }; - - const auto average_ground_state_isolation_for_all_inputs = - [&get_ground_state_isolation]( - const std::vector>>& res_per_input) noexcept - { - uint64_t count = 0; - - double accumulated_ground_state_isolation = 0.0; - - for (const auto& sim_res : res_per_input) - { - if (sim_res.size() == 1) - { - continue; - } - - accumulated_ground_state_isolation += get_ground_state_isolation(sim_res); - - ++count; - } - - return accumulated_ground_state_isolation / static_cast(count); - }; - - // sort the pairs by minimum ground state isolation for each input - std::sort(pairs.begin(), pairs.end(), - [&minimum_ground_state_isolation_for_all_inputs, - &average_ground_state_isolation_for_all_inputs](const auto& lhs, const auto& rhs) noexcept - { - const double diff = minimum_ground_state_isolation_for_all_inputs(lhs.second) - - minimum_ground_state_isolation_for_all_inputs(rhs.second); - - // when minima are equal, take the average - if (std::abs(diff) < std::numeric_limits::epsilon()) - { - return average_ground_state_isolation_for_all_inputs(lhs.second) > - average_ground_state_isolation_for_all_inputs(rhs.second); - } - - return diff > 0.0; - }); - - // put the designed gate layouts back in the sorted order - for (auto& pair : pairs) - { - designed_gate_layouts.emplace_back(pair.first); - } - } }; } // namespace detail @@ -955,8 +822,8 @@ class design_sidb_gates_impl */ template [[nodiscard]] std::vector design_sidb_gates(const Lyt& skeleton, const std::vector& spec, - const design_sidb_gates_params>& params = {}, - design_sidb_gates_stats* stats = nullptr) noexcept + const design_sidb_gates_params& params = {}, + design_sidb_gates_stats* stats = nullptr) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -977,12 +844,12 @@ template std::vector result{}; if (params.design_mode == - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER) + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER) { result = p.run_automatic_exhaustive_gate_designer(); } - else if (params.design_mode == design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL) + else if (params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL) { result = p.run_quickcell(); } diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index fa4c28b39..71942fcaf 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -24,6 +25,7 @@ #include +#include #include #include @@ -34,10 +36,10 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi { const auto lyt = blueprints::two_input_one_output_skeleton_west_west(); - design_sidb_gates_params> params{ + design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.31}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{27, 6, 0}, {30, 8, 0}}, 3}; @@ -61,7 +63,7 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi SECTION("Automatic Exhaustive Gate Designer") { params.design_mode = design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); REQUIRE(found_gate_layouts.size() == 10); @@ -103,9 +105,9 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ SECTION("One cell in canvas") { - const auto params = design_sidb_gates_params>{ + const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {10, 4, 0}}, 1}; @@ -117,9 +119,9 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ // using cube coordinates const auto lyt_in_cube_coord = convert_layout_to_fiction_coordinates(lyt); - const design_sidb_gates_params> params_cube{ + const design_sidb_gates_params params_cube{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {siqad::to_fiction_coord(siqad::coord_t{10, 4, 0}), siqad::to_fiction_coord(siqad::coord_t{10, 4, 0})}, 1}; @@ -134,9 +136,9 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ // using offset coordinates const auto lyt_in_offset_coord = convert_layout_to_fiction_coordinates(lyt); - const design_sidb_gates_params> params_offset{ + const design_sidb_gates_params params_offset{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {siqad::to_fiction_coord(siqad::coord_t{10, 4, 0}), siqad::to_fiction_coord(siqad::coord_t{10, 4, 0})}, 1}; @@ -151,9 +153,9 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ } SECTION("Four cells in canvas, design all gates with one SiDB in the canvas") { - const auto params = design_sidb_gates_params>{ + const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {13, 4, 0}}, 1}; @@ -164,12 +166,12 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ SECTION("Four cells in canvas, design process is terminated after first solution is found (one SiDB in the " "canvas), QuickExact") { - const auto params = design_sidb_gates_params>{ + const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {10, 4, 0}}, 1, - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION}; + design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION}; design_sidb_gates_stats stats{}; @@ -184,12 +186,12 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ SECTION("Four cells in canvas, design process is terminated after first solution is found (one SiDB in the " "canvas), QuickSim") { - const auto params = design_sidb_gates_params>{ + const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKSIM}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {10, 4, 0}}, 1, - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION}; + design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION}; design_sidb_gates_stats stats{}; @@ -204,14 +206,14 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation " "(Automatic Exhaustive Gate Designer)") { - const auto params = design_sidb_gates_params>{ + const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {13, 4, 0}}, 1, - design_sidb_gates_params>::termination_condition::ALL_COMBINATIONS_ENUMERATED, - design_sidb_gates_params< - cell>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES}; + design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, + {std::make_unique>(), + std::make_unique>()}}; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); @@ -224,14 +226,14 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ SECTION("Four cells in canvas, design all gates with one SiDB in the canvas and sort by ground state isolation " "(QuickCell)") { - const auto params = design_sidb_gates_params>{ + const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{10, 4, 0}, {13, 4, 0}}, 1, - design_sidb_gates_params>::termination_condition::ALL_COMBINATIONS_ENUMERATED, - design_sidb_gates_params< - cell>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES}; + design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, + {std::make_unique>(), + std::make_unique>()}}; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); @@ -264,12 +266,12 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ lyt.assign_cell_type({10, 9, 1}, sidb_technology::cell_type::NORMAL); - design_sidb_gates_params> params{ + design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::EXGS, {detect_bdl_wires_params{2.0}}}, design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{4, 4, 0}, {14, 5, 1}}, 1}; @@ -281,8 +283,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ SECTION("Random Generation") { - params.design_mode = - design_sidb_gates_params>::design_sidb_gates_mode::RANDOM; + params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::RANDOM; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); CHECK(!found_gate_layouts.empty()); } @@ -292,11 +293,10 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ params.canvas = {{4, 4, 0}, {4, 4, 0}}; params.number_of_sidbs = 0; params.design_mode = design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); CHECK(found_gate_layouts_exhaustive.empty()); - params.design_mode = - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL; + params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL; const auto found_gate_layouts_quickcell = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); CHECK(found_gate_layouts_quickcell.empty()); } @@ -340,10 +340,10 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin SECTION("generate original FO2") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{17, 11, 0}, {17, 11, 0}}, 1}; @@ -359,10 +359,10 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin SECTION("replace the output perturbers by equivalent negatively charged defects") { - design_sidb_gates_params> params{ + design_sidb_gates_params> params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params>::design_sidb_gates_mode:: + AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{17, 11, 0}, {17, 11, 0}}, 1}; @@ -388,8 +388,8 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin CHECK(found_gate_layouts_exhaustive[0].get_cell_type({17, 11, 0}) == sidb_100_cell_clk_lyt_siqad::cell_type::LOGIC); - params.design_mode = - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL; + params.design_mode = design_sidb_gates_params< + sidb_defect_surface>::design_sidb_gates_mode::QUICKCELL; const auto found_gate_layouts_quickcell = design_sidb_gates(defect_layout, std::vector{create_fan_out_tt()}, params); @@ -402,15 +402,15 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") { - const auto lyt = blueprints::two_input_one_output_bestagon_skeleton(); + const auto lyt = blueprints::two_input_one_output_bestagon_skeleton(); SECTION("Random Generation") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::TOLERATE_KINKS}, - design_sidb_gates_params>::design_sidb_gates_mode::RANDOM, + design_sidb_gates_params::design_sidb_gates_mode::RANDOM, {{14, 6, 0}, {24, 12, 0}}, 3}; @@ -423,11 +423,11 @@ TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") { sidb_defect_surface defect_layout{lyt}; - design_sidb_gates_params> params{ + design_sidb_gates_params> params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params>::design_sidb_gates_mode::RANDOM, + design_sidb_gates_params>::design_sidb_gates_mode::RANDOM, {{18, 8, 1}, {22, 12, 0}}, 2}; @@ -443,16 +443,18 @@ TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") found_gate_layouts.front().foreach_cell([](const auto& cell) { CHECK(cell != siqad::coord_t{16, 10, 0}); }); - params.design_mode = - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL; + params.design_mode = design_sidb_gates_params< + sidb_defect_surface>::design_sidb_gates_mode::QUICKCELL; const auto found_gate_layouts_quickcell = design_sidb_gates(defect_layout, std::vector{create_and_tt()}, params); REQUIRE(!found_gate_layouts_quickcell.empty()); CHECK(found_gate_layouts_quickcell.front().num_defects() == 1); CHECK(found_gate_layouts_quickcell.front().num_cells() == lyt.num_cells() + 2); - found_gate_layouts_quickcell.front().foreach_cell([](const auto& cell) - { CHECK(cell != siqad::coord_t{16, 10, 0}); }); + found_gate_layouts_quickcell.front().foreach_cell( + [](const auto& cell) { + CHECK(cell != siqad::coord_t{16, 10, 0}); + }); } } @@ -472,9 +474,9 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") SECTION("Random Generation") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode::RANDOM, + design_sidb_gates_params::design_sidb_gates_mode::RANDOM, {{10, 11, 0}, {14, 15, 0}}, 3}; @@ -485,10 +487,10 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") SECTION("Exhaustive Generation, allowing kinks") { - design_sidb_gates_params> params{ + design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {14, 17, 0}}, 3}; // to save runtime in the CI, this test is only run in RELEASE mode @@ -503,8 +505,8 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") SECTION("terminate after first solution is found") { - params.termination_cond = design_sidb_gates_params< - cell>::termination_condition::AFTER_FIRST_SOLUTION; + params.termination_cond = + design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_nor_tt()}, params); REQUIRE(found_gate_layouts.size() <= std::thread::hardware_concurrency()); CHECK(found_gate_layouts.front().num_cells() == lyt.num_cells() + 3); @@ -515,12 +517,12 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") #ifdef NDEBUG SECTION("Exhaustive Generation, forbidding kinks") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {15, 17, 0}}, 3}; @@ -532,10 +534,10 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") SECTION("Exhaustive Generation, QuickCell") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{10, 13, 0}, {15, 17, 0}}, 3}; @@ -545,13 +547,13 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") } SECTION("Stop after first gate design is finished, QuickCell") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{8, 13, 0}, {17, 17, 0}}, 3, - design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION}; + design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION}; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_nor_tt()}, params); REQUIRE(found_gate_layouts.size() <= std::thread::hardware_concurrency()); @@ -567,10 +569,10 @@ TEST_CASE("Design Bestagon shaped CX gate with QuickCell", "[design-sidb-gates]" SECTION("Exhaustive Generation, QuickCell") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{16, 8, 0}, {22, 14, 0}}, 3}; @@ -587,10 +589,10 @@ TEST_CASE("Design Bestagon shaped CX gate with QuickCell (flipped)", "[design-si SECTION("Exhaustive Generation, QuickCell") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{16, 7, 0}, {22, 15, 0}}, 3}; @@ -606,11 +608,11 @@ TEST_CASE("Design AND gate with input left and output top-right with QuickCell ( SECTION("Exhaustive Generation, QuickCell") { - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{17, 5, 0}, {24, 8, 0}}, 3}; From ecec062b6b424b4e24c2980ed3bda9fe21b98451 Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 5 Feb 2025 17:01:00 +0000 Subject: [PATCH 035/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 35 ++----------------- 1 file changed, 3 insertions(+), 32 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 26a7a79b3..8a3db104a 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4301,10 +4301,8 @@ Parameter ``stats``: static const char *__doc_fiction_design_sidb_gates_params = R"doc(This struct contains parameters and settings to design SiDB gates. -Template parameter ``CellType``: - Cell type.)doc"; - -static const char *__doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; +Template parameter ``Lyt``: + SiDB cell-level layout type.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; @@ -4320,19 +4318,7 @@ static const char *__doc_fiction_design_sidb_gates_params_number_of_sidbs = R"do static const char *__doc_fiction_design_sidb_gates_params_operational_params = R"doc(Parameters for the `is_operational` function.)doc"; -static const char *__doc_fiction_design_sidb_gates_params_post_design_mode = R"doc(Selector for the available post-design processes.)doc"; - -static const char *__doc_fiction_design_sidb_gates_params_post_design_mode_DO_NOTHING = R"doc(No post-design operation is performed.)doc"; - -static const char *__doc_fiction_design_sidb_gates_params_post_design_mode_PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES = -R"doc(The designed gates are sorted by how energetically isolated the ground -state is from the first excited state.)doc"; - -static const char *__doc_fiction_design_sidb_gates_params_post_design_process = -R"doc(After the design process, the returned gates are not sorted. - -@note This parameter has no effect unless the gate design is -exhaustive and all combinations are enumerated.)doc"; +static const char *__doc_fiction_design_sidb_gates_params_post_design_process = R"doc()doc"; static const char *__doc_fiction_design_sidb_gates_params_termination_cond = R"doc(The design process is terminated after a valid SiDB gate design is @@ -5772,21 +5758,6 @@ Parameter ``cell_indices``: A copy of the original layout (`skeleton_layout`) with SiDB cells added at specified indices.)doc"; -static const char *__doc_fiction_detail_design_sidb_gates_impl_sort_designed_gate_layouts_by_ground_state_isolation = -R"doc(Performs a sorting operation on the designed gate layouts, putting -those in front for which the energetic gap between the ground state -and the first excited state is larger. For each designed gate layout, -the minimum energetic gap is taken over each input. When the minima -are equal for two designed gate layouts, the average energetic gap -over each input is taken as a tiebreaker. - -Parameter ``designed_gate_layouts``: - A vector of designed gate layouts to sort in place. - -Parameter ``sim_results_per_input_for_each_gate_design``: - The simulation results for each input of each designed gate - layout.)doc"; - static const char *__doc_fiction_detail_design_sidb_gates_impl_stats = R"doc(The statistics of the gate design.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_truth_table = R"doc(Truth table of the given gate.)doc"; From eb1367d108ff0863a49a83c2d7a80b5e0a0ad515 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 6 Feb 2025 11:02:18 +0100 Subject: [PATCH 036/138] :art: Removed duplicate `namespace py = pybind11` --- .../include/pyfiction/algorithms/physical_design/exact.hpp | 1 - .../physical_design/graph_oriented_layout_design.hpp | 1 - .../pyfiction/algorithms/physical_design/orthogonal.hpp | 1 - .../algorithms/physical_design/post_layout_optimization.hpp | 1 - .../pyfiction/algorithms/physical_design/wiring_reduction.hpp | 1 - .../simulation/sidb/random_sidb_layout_generator.hpp | 1 - .../algorithms/simulation/sidb/sidb_simulation_parameters.hpp | 1 - .../mnt/pyfiction/include/pyfiction/inout/write_qca_layout.hpp | 1 - .../mnt/pyfiction/include/pyfiction/inout/write_svg_layout.hpp | 1 - .../pyfiction/include/pyfiction/layouts/cartesian_layout.hpp | 1 - .../pyfiction/include/pyfiction/layouts/cell_level_layout.hpp | 1 - .../mnt/pyfiction/include/pyfiction/layouts/coordinates.hpp | 3 --- .../pyfiction/include/pyfiction/layouts/gate_level_layout.hpp | 1 - .../pyfiction/include/pyfiction/layouts/hexagonal_layout.hpp | 1 - .../pyfiction/include/pyfiction/layouts/obstruction_layout.hpp | 1 - .../include/pyfiction/layouts/shifted_cartesian_layout.hpp | 1 - .../pyfiction/include/pyfiction/networks/logic_networks.hpp | 1 - .../pyfiction/technology/charge_distribution_surface.hpp | 1 - .../pyfiction/include/pyfiction/technology/sidb_lattice.hpp | 1 - 19 files changed, 21 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/exact.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/exact.hpp index 28ff8f24d..0f1061566 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/exact.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/exact.hpp @@ -26,7 +26,6 @@ namespace pyfiction inline void exact(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::enum_(m, "technology_constraints", DOC(fiction_technology_constraints)) .value("NONE", fiction::technology_constraints::NONE, DOC(fiction_technology_constraints_NONE)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/graph_oriented_layout_design.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/graph_oriented_layout_design.hpp index ceca6f703..3a7e4a50d 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/graph_oriented_layout_design.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/graph_oriented_layout_design.hpp @@ -25,7 +25,6 @@ namespace pyfiction inline void graph_oriented_layout_design(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::enum_( m, "gold_effort_mode", DOC(fiction_graph_oriented_layout_design_params_effort_mode)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/orthogonal.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/orthogonal.hpp index 4fac19f3c..da80a40a4 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/orthogonal.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/orthogonal.hpp @@ -24,7 +24,6 @@ namespace pyfiction inline void orthogonal(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "orthogonal_params", DOC(fiction_orthogonal_physical_design_params)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/post_layout_optimization.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/post_layout_optimization.hpp index fb892f852..fe52c30c0 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/post_layout_optimization.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/post_layout_optimization.hpp @@ -21,7 +21,6 @@ namespace pyfiction inline void post_layout_optimization(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "post_layout_optimization_params", DOC(fiction_post_layout_optimization_params)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/wiring_reduction.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/wiring_reduction.hpp index 3496a9184..fb2ab374e 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/wiring_reduction.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/wiring_reduction.hpp @@ -21,7 +21,6 @@ namespace pyfiction inline void wiring_reduction(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "wiring_reduction_params", DOC(fiction_wiring_reduction_params)) .def(py::init<>()) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/random_sidb_layout_generator.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/random_sidb_layout_generator.hpp index 1a330627a..154f58f7a 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/random_sidb_layout_generator.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/random_sidb_layout_generator.hpp @@ -41,7 +41,6 @@ void random_layout_generator(pybind11::module& m) inline void random_sidb_layout_generator(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::enum_::positive_charges>( m, "positive_charges", DOC(fiction_generate_random_sidb_layout_params_positive_charges)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_parameters.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_parameters.hpp index 815b579e1..3e309b4d4 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_parameters.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/sidb_simulation_parameters.hpp @@ -22,7 +22,6 @@ namespace pyfiction inline void sidb_simulation_parameters(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "sidb_simulation_parameters", DOC(fiction_sidb_simulation_parameters)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/inout/write_qca_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/inout/write_qca_layout.hpp index 296a7c84c..38403ea97 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/inout/write_qca_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/inout/write_qca_layout.hpp @@ -20,7 +20,6 @@ namespace pyfiction inline void write_qca_layout(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "write_qca_layout_params", DOC(fiction_write_qca_layout_params)) .def(py::init<>()) diff --git a/bindings/mnt/pyfiction/include/pyfiction/inout/write_svg_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/inout/write_svg_layout.hpp index 6ba7888cc..9ee910865 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/inout/write_svg_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/inout/write_svg_layout.hpp @@ -64,7 +64,6 @@ inline void write_qca_layout_svg_impl(pybind11::module& m) void write_svg_layout(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::enum_(m, "color_mode", DOC(fiction_write_sidb_layout_svg_params_color_mode)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/layouts/cartesian_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/layouts/cartesian_layout.hpp index 0e9b9c1a4..61cd0573a 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/layouts/cartesian_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/layouts/cartesian_layout.hpp @@ -23,7 +23,6 @@ namespace pyfiction inline void cartesian_layout(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; /** * Cartesian layout. diff --git a/bindings/mnt/pyfiction/include/pyfiction/layouts/cell_level_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/layouts/cell_level_layout.hpp index 7a3312459..39d136a82 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/layouts/cell_level_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/layouts/cell_level_layout.hpp @@ -32,7 +32,6 @@ template void fcn_technology_cell_level_layout(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; // fetch technology name auto tech_name = std::string{fiction::tech_impl_name}; diff --git a/bindings/mnt/pyfiction/include/pyfiction/layouts/coordinates.hpp b/bindings/mnt/pyfiction/include/pyfiction/layouts/coordinates.hpp index 360e9896b..06140ed43 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/layouts/coordinates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/layouts/coordinates.hpp @@ -32,7 +32,6 @@ namespace pyfiction inline void offset_coordinate(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "offset_coordinate", DOC(fiction_offset_ucoord_t)) .def(py::init<>(), DOC(fiction_offset_ucoord_t_ucoord_t)) @@ -93,7 +92,6 @@ inline void offset_coordinate(pybind11::module& m) inline void cube_coordinate(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "cube_coordinate", DOC(fiction_cube_coord_t)) .def(py::init<>(), DOC(fiction_cube_coord_t_coord_t)) @@ -150,7 +148,6 @@ inline void cube_coordinate(pybind11::module& m) inline void siqad_coordinate(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, "siqad_coordinate", DOC(fiction_siqad_coord_t)) .def(py::init<>(), DOC(fiction_siqad_coord_t_coord_t)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/layouts/gate_level_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/layouts/gate_level_layout.hpp index 2ee16d208..dda497234 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/layouts/gate_level_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/layouts/gate_level_layout.hpp @@ -29,7 +29,6 @@ template void gate_level_layout(pybind11::module& m, const std::string& topology) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, fmt::format("{}_gate_layout", topology).c_str(), DOC(fiction_gate_level_layout)) .def(py::init<>()) diff --git a/bindings/mnt/pyfiction/include/pyfiction/layouts/hexagonal_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/layouts/hexagonal_layout.hpp index 2ca20d37b..d36e872f4 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/layouts/hexagonal_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/layouts/hexagonal_layout.hpp @@ -22,7 +22,6 @@ namespace pyfiction inline void hexagonal_layout(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; /** * Hexagonal layout. diff --git a/bindings/mnt/pyfiction/include/pyfiction/layouts/obstruction_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/layouts/obstruction_layout.hpp index b846f1be6..694fc0069 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/layouts/obstruction_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/layouts/obstruction_layout.hpp @@ -22,7 +22,6 @@ template void obstruction_layout(pybind11::module& m, const std::string& topology) { namespace py = pybind11; - namespace py = pybind11; py::class_(m, fmt::format("{}_obstruction_layout", topology).c_str(), DOC(fiction_obstruction_layout)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/layouts/shifted_cartesian_layout.hpp b/bindings/mnt/pyfiction/include/pyfiction/layouts/shifted_cartesian_layout.hpp index e8a19f237..f7d81beff 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/layouts/shifted_cartesian_layout.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/layouts/shifted_cartesian_layout.hpp @@ -23,7 +23,6 @@ namespace pyfiction inline void shifted_cartesian_layout(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; /** * Shifted Cartesian layout. diff --git a/bindings/mnt/pyfiction/include/pyfiction/networks/logic_networks.hpp b/bindings/mnt/pyfiction/include/pyfiction/networks/logic_networks.hpp index 65a100012..fb10fe4c0 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/networks/logic_networks.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/networks/logic_networks.hpp @@ -34,7 +34,6 @@ template void network(pybind11::module& m, const std::string& network_name) { namespace py = pybind11; - namespace py = pybind11; /** * Network node. diff --git a/bindings/mnt/pyfiction/include/pyfiction/technology/charge_distribution_surface.hpp b/bindings/mnt/pyfiction/include/pyfiction/technology/charge_distribution_surface.hpp index da7bbc150..2dc0c7a84 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/technology/charge_distribution_surface.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/technology/charge_distribution_surface.hpp @@ -32,7 +32,6 @@ template void charge_distribution_surface_layout(pybind11::module& m, const std::string& lattice = "") { namespace py = pybind11; - namespace py = pybind11; using py_cds = py_charge_distribution_surface_layout; diff --git a/bindings/mnt/pyfiction/include/pyfiction/technology/sidb_lattice.hpp b/bindings/mnt/pyfiction/include/pyfiction/technology/sidb_lattice.hpp index 4fc8c310d..6f96e1efe 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/technology/sidb_lattice.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/technology/sidb_lattice.hpp @@ -32,7 +32,6 @@ template void sidb_lattice_cell_level_layout(pybind11::module& m) { namespace py = pybind11; - namespace py = pybind11; // fetch technology name auto orientation = std::string{fiction::sidb_lattice_name}; From 42f81139e88d9531756175174fae64a7defdaf8e Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 6 Feb 2025 11:02:51 +0100 Subject: [PATCH 037/138] :rotating_light: Fixed compiler warning (unused `this` in Release) --- include/fiction/technology/charge_distribution_surface.hpp | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/include/fiction/technology/charge_distribution_surface.hpp b/include/fiction/technology/charge_distribution_surface.hpp index 0a8f01356..de21fde41 100644 --- a/include/fiction/technology/charge_distribution_surface.hpp +++ b/include/fiction/technology/charge_distribution_surface.hpp @@ -1380,12 +1380,7 @@ class charge_distribution_surface : public Lyt strg->dependent_cell_in_sub_layout = false; // check if all SiDBs are negatively charged - this->foreach_cell( - [this]([[maybe_unused]] const auto& c) - { - assert(this->get_charge_state(c) == sidb_charge_state::NEGATIVE && - "All SiDBs have to be negatively charged"); - }); + assert(this->num_negative_sidbs() == this->num_cells() && "All SiDBs have to be negatively charged"); // Each SiDB is checked to see if the local electrostatic potential is high enough // to cause a positively charged SiDB From fd8cdd1f96c52aa90a21cb95f4ec44af27d0dfb4 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 6 Feb 2025 11:18:44 +0100 Subject: [PATCH 038/138] :memo: Cleaned up docstring --- .../algorithms/simulation/sidb/is_operational.hpp | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 8f2052359..26dcb834d 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -76,18 +76,7 @@ struct is_operational_params REJECT_KINKS }; /** - * Simulation method to determine if the layout is operational or non-operational. There are three possible - * strategies: - * - * - `SIMULATION_ONLY`: This setting does not apply any filtering strategies to determine if the layout is - * operational. Instead, it relies solely on physical simulation to make this determination. - * - `FILTER_ONLY`: This setting does only apply filtering strategies to determine if the layout is - * non-operational. If the layout passes all filtering strategies, it is considered operational. This is only an - * approximation. It may be possible that the layout is non-operational, but the filtering strategies do not detect - * it. - * - `FILTER_THEN_SIMULATION`: Before a physical simulation is conducted, the algorithm checks if filtering - * strategies have detected whether the layout is non-operational. This only provides any runtime benefits if kinks - * are rejected. + * Simulation method to determine if the layout is operational or non-operational. */ enum class operational_analysis_strategy : uint8_t { @@ -100,7 +89,7 @@ struct is_operational_params * Apply filtering exclusively to determine whether the layout is non-operational. If the layout * passes all filter steps, it is considered operational. * - * @note This is an extremely fast approximation that may sometimes lead to false positives. + * @note This is an extremely fast approximation that may lead to false positives. */ FILTER_ONLY, /** From d8294ac1185365c2b584e8b649678092b5142a04 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 6 Feb 2025 14:22:56 +0100 Subject: [PATCH 039/138] :bug: Fixed a case where `|determine_all_combinations_of_distributing_k_entities_on_n_positions(k,n)| != binomial_coefficient(n,k)` --- include/fiction/utils/math_utils.hpp | 6 +-- test/utils/math_utils.cpp | 61 ++++++++++++++-------------- 2 files changed, 34 insertions(+), 33 deletions(-) diff --git a/include/fiction/utils/math_utils.hpp b/include/fiction/utils/math_utils.hpp index 6c396edea..ecab5c24b 100644 --- a/include/fiction/utils/math_utils.hpp +++ b/include/fiction/utils/math_utils.hpp @@ -101,13 +101,13 @@ determine_all_combinations_of_distributing_k_entities_on_n_positions(const std:: return {}; } - std::vector> all_combinations{}; - if (k == 0) { - return all_combinations; + return {{}}; } + std::vector> all_combinations{}; + all_combinations.reserve(binomial_coefficient(n, k)); std::vector numbers(n); diff --git a/test/utils/math_utils.cpp b/test/utils/math_utils.cpp index c2890c6bf..8b2807c01 100644 --- a/test/utils/math_utils.cpp +++ b/test/utils/math_utils.cpp @@ -66,54 +66,54 @@ TEST_CASE("Binomial Coefficient Tests") SECTION("C(5, 2)") { const uint64_t result = binomial_coefficient(5, 2); - REQUIRE(result == 10); // C(5, 2) = 10 + CHECK(result == 10); // C(5, 2) = 10 } SECTION("C(10, 3)") { const uint64_t result = binomial_coefficient(10, 3); - REQUIRE(result == 120); // C(10, 3) = 120 + CHECK(result == 120); // C(10, 3) = 120 } SECTION("C(0, 0)") { const uint64_t result = binomial_coefficient(0, 0); - REQUIRE(result == 1); // C(0, 0) = 1 + CHECK(result == 1); // C(0, 0) = 1 } SECTION("C(8, 8)") { const uint64_t result = binomial_coefficient(8, 8); - REQUIRE(result == 1); // C(8, 8) = 1 + CHECK(result == 1); // C(8, 8) = 1 } SECTION("C(7, 10)") { const uint64_t result = binomial_coefficient(7, 10); - REQUIRE(result == 0); // C(7, 10) = 0 (k > n) + CHECK(result == 0); // C(7, 10) = 0 (k > n) } SECTION("C(15, 7)") { const uint64_t result = binomial_coefficient(15, 7); - REQUIRE(result == 6435); // C(15, 7) = 6435 + CHECK(result == 6435); // C(15, 7) = 6435 } SECTION("C(20, 10)") { const uint64_t result = binomial_coefficient(20, 10); - REQUIRE(result == 184756); // C(20, 10) = 184,756 + CHECK(result == 184756); // C(20, 10) = 184,756 } SECTION("C(30, 15)") { const uint64_t result = binomial_coefficient(30, 15); - REQUIRE(result == 155117520); // C(30, 15) = 155,117,520 + CHECK(result == 155117520); // C(30, 15) = 155,117,520 } SECTION("C(50, 25)") { const uint64_t result = binomial_coefficient(50, 25); - REQUIRE(result == 126410606437752); // C(50, 25) = 126,410,606,437,752 + CHECK(result == 126410606437752); // C(50, 25) = 126,410,606,437,752 } } @@ -126,7 +126,7 @@ TEST_CASE("Test the computation of the cartesian combinations", "[cartesian_comb auto result = cartesian_combinations(input); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("Two dimensions") @@ -136,7 +136,7 @@ TEST_CASE("Test the computation of the cartesian combinations", "[cartesian_comb auto result = cartesian_combinations(input); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("Three dimensions") @@ -147,7 +147,7 @@ TEST_CASE("Test the computation of the cartesian combinations", "[cartesian_comb auto result = cartesian_combinations(input); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("Empty input") @@ -157,7 +157,7 @@ TEST_CASE("Test the computation of the cartesian combinations", "[cartesian_comb auto result = cartesian_combinations(input); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("Empty dimension") @@ -167,7 +167,7 @@ TEST_CASE("Test the computation of the cartesian combinations", "[cartesian_comb auto result = cartesian_combinations(input); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("Mixed types") @@ -177,7 +177,7 @@ TEST_CASE("Test the computation of the cartesian combinations", "[cartesian_comb auto result = cartesian_combinations(input); - REQUIRE(result == expected); + CHECK(result == expected); } } @@ -188,11 +188,11 @@ TEST_CASE("Test the determination of all combinations of distributing k entities { const std::size_t k = 0; const std::size_t n = 0; - const std::vector> expected{}; + const std::vector> expected{{}}; auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(k, n); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("k = 1, n = 1") @@ -203,7 +203,7 @@ TEST_CASE("Test the determination of all combinations of distributing k entities auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(k, n); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("k = 2, n = 3") @@ -214,7 +214,7 @@ TEST_CASE("Test the determination of all combinations of distributing k entities auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(k, n); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("k = 3, n = 5") @@ -226,18 +226,18 @@ TEST_CASE("Test the determination of all combinations of distributing k entities auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(k, n); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("k = 0, n = 5") { const std::size_t k = 0; const std::size_t n = 5; - const std::vector> expected{}; + const std::vector> expected{{}}; auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(k, n); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("k = 5, n = 5") @@ -248,7 +248,7 @@ TEST_CASE("Test the determination of all combinations of distributing k entities auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(k, n); - REQUIRE(result == expected); + CHECK(result == expected); } SECTION("k > n (invalid case)") @@ -259,34 +259,35 @@ TEST_CASE("Test the determination of all combinations of distributing k entities auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(k, n); - REQUIRE(result == expected); + CHECK(result == expected); } } TEST_CASE("Zero entities", "[determine-all-combinations-of-distributing-k-entities-on-n-positions]") { const auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(0, 5); - REQUIRE(result.empty()); + REQUIRE(result.size() == 1); + CHECK(result.front().empty()); } TEST_CASE("More entities than positions", "[determine-all-combinations-of-distributing-k-entities-on-n-positions]") { const auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(5, 3); - REQUIRE(result.empty()); + CHECK(result.empty()); } TEST_CASE("Equal entities and positions", "[determine-all-combinations-of-distributing-k-entities-on-n-positions]") { const auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(3, 3); REQUIRE(result.size() == 1); - REQUIRE(result[0] == std::vector{0, 1, 2}); + CHECK(result[0] == std::vector{0, 1, 2}); } TEST_CASE("Less entities than positions", "[determine-all-combinations-of-distributing-k-entities-on-n-positions]") { const auto result = determine_all_combinations_of_distributing_k_entities_on_n_positions(2, 3); REQUIRE(result.size() == 3); - REQUIRE(result[0] == std::vector{0, 1}); - REQUIRE(result[1] == std::vector{0, 2}); - REQUIRE(result[2] == std::vector{1, 2}); + CHECK(result[0] == std::vector{0, 1}); + CHECK(result[1] == std::vector{0, 2}); + CHECK(result[2] == std::vector{1, 2}); } From 0fd566933535494a62bcc120b347889349e37a7a Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 6 Feb 2025 15:21:10 +0100 Subject: [PATCH 040/138] :art: Removed `inline` specifier where Clang-Tidy suggested to do so --- include/fiction/utils/layout_utils.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/fiction/utils/layout_utils.hpp b/include/fiction/utils/layout_utils.hpp index e1bca9816..647ec6d8b 100644 --- a/include/fiction/utils/layout_utils.hpp +++ b/include/fiction/utils/layout_utils.hpp @@ -622,7 +622,7 @@ CoordinateType random_coordinate(CoordinateType coordinate1, CoordinateType coor * @return A vector containing all cells within the specified area. */ template -[[nodiscard]] inline std::vector +[[nodiscard]] std::vector all_coordinates_in_spanned_area(const CoordinateType& cell_first_corner, const CoordinateType& cell_second_corner) noexcept { @@ -713,7 +713,7 @@ all_coordinates_in_spanned_area(const CoordinateType& cell_first_corner, * @return `true` if the layouts are identical, `false` otherwise. */ template -[[nodiscard]] inline bool are_cell_layouts_identical(const Lyt& first_lyt, const Lyt& second_lyt) noexcept +[[nodiscard]] bool are_cell_layouts_identical(const Lyt& first_lyt, const Lyt& second_lyt) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); From e756bdbebe801cb622dc96f7793a825caf78f585 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 6 Feb 2025 16:44:28 +0100 Subject: [PATCH 041/138] :recycle: Refactor/Clean-up of `design_sidb_gates.hpp` --- .../physical_design/design_sidb_gates.hpp | 78 ++-- .../physical_design/design_sidb_gates.hpp | 433 +++++++----------- .../simulation/sidb/is_operational.hpp | 147 ++++-- .../physical_design/design_sidb_gates.cpp | 56 ++- 4 files changed, 366 insertions(+), 348 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 8501e9a0c..5f248c67d 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -26,53 +26,30 @@ void design_sidb_gates(pybind11::module& m) m.def("design_sidb_gates", &fiction::design_sidb_gates, py::arg("skeleton"), py::arg("spec"), py::arg("params") = fiction::design_sidb_gates_params{}, py::arg("stats") = nullptr, DOC(fiction_design_sidb_gates)); -} - -} // namespace detail - -inline void design_sidb_gates(pybind11::module& m) -{ - namespace py = pybind11; - - py::class_(m, "design_sidb_gates_stats", DOC(fiction_design_sidb_gates_stats)) - .def(py::init<>()) - .def("__repr__", - [](const fiction::design_sidb_gates_stats& stats) - { - std::stringstream stream{}; - stats.report(stream); - return stream.str(); - }); - - // TODO: fix design_sidb_gates_params template arg /** * Design approach selector type. */ - py::enum_::design_sidb_gates_mode>( + py::enum_::design_sidb_gates_mode>( m, "design_sidb_gates_mode", DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) - .value("QUICKCELL", - fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, + .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) .value("AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER", - fiction::design_sidb_gates_params< - fiction::offset::ucoord_t>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + fiction::design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) - .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, + .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_RANDOM)); /** * Termination condition selector type. */ - py::enum_::termination_condition>( + py::enum_::termination_condition>( m, "termination_condition", DOC(fiction_design_sidb_gates_params_termination_condition)) - .value( - "AFTER_FIRST_SOLUTION", - fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, - DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) + .value("AFTER_FIRST_SOLUTION", + fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, + DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) .value("ALL_COMBINATIONS_ENUMERATED", - fiction::design_sidb_gates_params< - fiction::offset::ucoord_t>::termination_condition::ALL_COMBINATIONS_ENUMERATED, + fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); /** @@ -90,25 +67,38 @@ inline void design_sidb_gates(pybind11::module& m) /** * Parameters. */ - py::class_>(m, "design_sidb_gates_params", - DOC(fiction_design_sidb_gates_params)) + py::class_>(m, "design_sidb_gates_params", + DOC(fiction_design_sidb_gates_params)) .def(py::init<>()) - .def_readwrite("operational_params", - &fiction::design_sidb_gates_params::operational_params, + .def_readwrite("operational_params", &fiction::design_sidb_gates_params::operational_params, DOC(fiction_design_sidb_gates_params_operational_params)) - .def_readwrite("design_mode", &fiction::design_sidb_gates_params::design_mode, + .def_readwrite("design_mode", &fiction::design_sidb_gates_params::design_mode, DOC(fiction_design_sidb_gates_params_design_mode)) - .def_readwrite("canvas", &fiction::design_sidb_gates_params::canvas, + .def_readwrite("canvas", &fiction::design_sidb_gates_params::canvas, DOC(fiction_design_sidb_gates_params_canvas)) - .def_readwrite("number_of_sidbs", - &fiction::design_sidb_gates_params::number_of_sidbs, + .def_readwrite("number_of_sidbs", &fiction::design_sidb_gates_params::number_of_sidbs, DOC(fiction_design_sidb_gates_params_number_of_sidbs)) - .def_readwrite("termination_cond", - &fiction::design_sidb_gates_params::termination_cond, + .def_readwrite("termination_cond", &fiction::design_sidb_gates_params::termination_cond, DOC(fiction_design_sidb_gates_params_termination_cond)) - .def_readwrite("post_design_process", - &fiction::design_sidb_gates_params::post_design_process, + .def_readwrite("post_design_process", &fiction::design_sidb_gates_params::post_design_process, DOC(fiction_design_sidb_gates_params_post_design_process)); +} + +} // namespace detail + +inline void design_sidb_gates(pybind11::module& m) +{ + namespace py = pybind11; + + py::class_(m, "design_sidb_gates_stats", DOC(fiction_design_sidb_gates_stats)) + .def(py::init<>()) + .def("__repr__", + [](const fiction::design_sidb_gates_stats& stats) + { + std::stringstream stream{}; + stats.report(stream); + return stream.str(); + }); detail::design_sidb_gates(m); detail::design_sidb_gates(m); diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index ddd2a0bac..96f0d6036 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -26,13 +26,13 @@ #include #include #include +#include #include #include #include #include #include #include -#include #include #include @@ -102,12 +102,11 @@ struct design_sidb_gates_params * @note This parameter has no effect unless the gate design is exhaustive. */ termination_condition termination_cond = termination_condition::ALL_COMBINATIONS_ENUMERATED; - // /** - // * After the design process, the returned gates are not sorted. - // * - // * @note This parameter has no effect unless the gate design is exhaustive and all combinations are enumerated. - // */ - // post_design_mode post_design_process = post_design_mode::DO_NOTHING; + /** + * After the design process, the returned gates are not sorted. + * + * @note This parameter has no effect unless the gate design is exhaustive and all combinations are enumerated. + */ designed_sidb_gates_ordering_recipe post_design_process{}; }; /** @@ -186,16 +185,15 @@ class design_sidb_gates_impl params.operational_params.input_bdl_iterator_params.bdl_wire_params, bdl_wire_selection::OUTPUT)}, number_of_input_wires{input_bdl_wires.size()}, - number_of_output_wires{output_bdl_wires.size()}, - all_canvas_layouts{determine_all_possible_canvas_layouts()} + number_of_output_wires{output_bdl_wires.size()} { - stats.number_of_layouts = all_canvas_layouts.size(); + stats.number_of_layouts = binomial_coefficient(all_sidbs_in_canvas.size(), params.number_of_sidbs); stats.sim_engine = params.operational_params.sim_engine; - set_simulation_results_retention_accordingly(); + set_operational_params_accordingly(); } /** - * Design gates by using the *Automatic Exhaustive Gate Desginer*. This algorithm was proposed in \"Minimal + * Design gates by using the *Automatic Exhaustive Gate Designer*. This algorithm was proposed in \"Minimal * Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds\" by J. Drewniok, M. Walter, * and R. Wille in NANOARCH 2023 (https://dl.acm.org/doi/10.1145/3611315.3633241). * @@ -206,70 +204,32 @@ class design_sidb_gates_impl */ [[nodiscard]] std::vector run_automatic_exhaustive_gate_designer() const noexcept { - mockturtle::stopwatch stop{stats.time_total}; - - auto all_combinations = determine_all_combinations_of_distributing_k_entities_on_n_positions( - params.number_of_sidbs, static_cast(all_sidbs_in_canvas.size())); - - if (all_combinations.empty()) + if (stats.number_of_layouts == 0) { return std::vector{}; } - designed_sidb_gates designed_gate_layouts{}; - - if (!params.post_design_process.empty()) - { - designed_gate_layouts.simulation_results = - std::make_optional::simulation_results_per_input>>(); - } - - std::unordered_set> sidbs_affected_by_defects = {}; - - // used to collect all SiDBs that are affected due to neutrally charged defects. - if constexpr (has_get_sidb_defect_v) - { - sidbs_affected_by_defects = skeleton_layout.all_affected_sidbs(std::make_pair(0, 0)); - } - - std::mutex mutex_to_protect_designed_gate_layouts{}; + const std::vector& all_canvas_layouts = create_all_possible_canvas_layouts(); - std::atomic solution_found = false; + std::vector gate_candidates{}; + gate_candidates.reserve(all_canvas_layouts.size()); - // Shuffle the combinations before dividing them among threads - std::shuffle(all_combinations.begin(), all_combinations.end(), - std::default_random_engine(std::random_device{}())); + std::mutex mutex_to_protect_gate_candidates{}; // used to control access to shared resources - const auto add_combination_to_layout_and_check_operation = [this, &mutex_to_protect_designed_gate_layouts, - &designed_gate_layouts, - &solution_found](const auto& combination) noexcept + // The canvas layouts are to be inserted in the skeleton to create all gate candidates; this is done in parallel + auto insert_canvas_sidbs = [&](const Lyt& canvas_lyt) { - // canvas SiDBs are added to the skeleton - auto&& layout_with_added_cells = skeleton_layout_with_canvas_sidbs(combination); - - if (const auto [status, aux_stats] = is_operational( - layout_with_added_cells, truth_table, params.operational_params, input_bdl_wires, output_bdl_wires); - status == operational_status::OPERATIONAL) - { - { - const std::lock_guard lock_vector{mutex_to_protect_designed_gate_layouts}; + Lyt gate_candidate = skeleton_layout.clone(); - designed_gate_layouts.gate_layouts.emplace_back(std::move(layout_with_added_cells)); - - if (designed_gate_layouts.simulation_results.has_value()) - { - designed_gate_layouts.simulation_results.value().emplace_back( - std::move(aux_stats.simulation_results.value())); - } - } + canvas_lyt.foreach_cell([&gate_candidate](const auto& c) + { gate_candidate.assign_cell_type(c, Lyt::technology::cell_type::LOGIC); }); - solution_found = true; - } + const std::lock_guard lock{mutex_to_protect_gate_candidates}; + gate_candidates.emplace_back(gate_candidate); }; - const std::size_t num_threads = std::min(number_of_threads, all_combinations.size()); - - const std::size_t chunk_size = (all_combinations.size() + num_threads - 1) / num_threads; // Ceiling division + const std::size_t num_threads = std::min(number_of_threads, all_canvas_layouts.size()); + const std::size_t chunk_size = (all_canvas_layouts.size() + num_threads - 1) / num_threads; std::vector threads{}; threads.reserve(num_threads); @@ -277,22 +237,14 @@ class design_sidb_gates_impl for (std::size_t i = 0; i < num_threads; ++i) { threads.emplace_back( - [this, i, chunk_size, &all_combinations, &add_combination_to_layout_and_check_operation, - &solution_found]() + [i, chunk_size, &insert_canvas_sidbs, &all_canvas_layouts] { const std::size_t start_index = i * chunk_size; - const std::size_t end_index = std::min(start_index + chunk_size, all_combinations.size()); + const std::size_t end_index = std::min(start_index + chunk_size, all_canvas_layouts.size()); for (std::size_t j = start_index; j < end_index; ++j) { - if (solution_found && - (params.termination_cond == - design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION)) - { - return; - } - - add_combination_to_layout_and_check_operation(all_combinations[j]); + insert_canvas_sidbs(all_canvas_layouts.at(j)); } }); } @@ -305,12 +257,38 @@ class design_sidb_gates_impl } } - if (!params.post_design_process.empty() && designed_gate_layouts.gate_layouts.size() > 1) + return extract_gate_designs(gate_candidates); + } + /** + * Design Standard Cells/gates by using the *QuickCell* algorithm. + * + * @return A vector of designed SiDB gate layouts. + */ + [[nodiscard]] std::vector run_quickcell() noexcept + { + mockturtle::stopwatch stop{stats.time_total}; + + if (stats.number_of_layouts == 0) { - order_designed_sidb_gates(params.post_design_process, designed_gate_layouts); + return std::vector{}; } - return designed_gate_layouts.gate_layouts; + std::vector gate_candidates{}; + gate_candidates.reserve(stats.number_of_layouts); + + { + mockturtle::stopwatch stop_pruning{stats.pruning_total}; + gate_candidates = run_pruning(); + } + + stats.number_of_layouts_after_first_pruning = + stats.number_of_layouts - number_of_discarded_layouts_at_first_pruning.load(); + stats.number_of_layouts_after_second_pruning = + stats.number_of_layouts_after_first_pruning - number_of_discarded_layouts_at_second_pruning.load(); + stats.number_of_layouts_after_third_pruning = + stats.number_of_layouts_after_second_pruning - number_of_discarded_layouts_at_third_pruning.load(); + + return extract_gate_designs(gate_candidates); } /** * Design gates randomly and in parallel. @@ -330,16 +308,14 @@ class design_sidb_gates_impl params.canvas, params.number_of_sidbs, generate_random_sidb_layout_params>::positive_charges::ALLOWED}; - const auto num_threads = std::min(number_of_threads, all_canvas_layouts.size()); - std::vector threads{}; - threads.reserve(num_threads); + threads.reserve(number_of_threads); std::mutex mutex_to_protect_designed_gate_layouts{}; // used to control access to shared resources std::atomic gate_layout_is_found(false); - for (uint64_t z = 0u; z < num_threads; z++) + for (uint64_t z = 0u; z < number_of_threads; z++) { threads.emplace_back( [this, &gate_layout_is_found, &mutex_to_protect_designed_gate_layouts, ¶meter, @@ -396,30 +372,66 @@ class design_sidb_gates_impl return randomly_designed_gate_layouts; } + + private: /** - * Design Standard Cells/gates by using the *QuickCell* algorithm. - * - * @return A vector of designed SiDB gate layouts. + * The skeleton layout serves as a starting layout to which SiDBs are added to create unique SiDB layouts and, if + * possible, working gates. It defines input and output wires. */ - [[nodiscard]] std::vector run_quickcell() noexcept + const Lyt skeleton_layout; + /** + * Truth table of the given gate. + */ + const std::vector truth_table; + /** + * Parameters for the *SiDB Gate Designer*. + */ + design_sidb_gates_params params; + /** + * All cells within the canvas. + */ + std::vector all_sidbs_in_canvas; + /** + * The statistics of the gate design. + */ + design_sidb_gates_stats& stats; + /** + * Input BDL wires. + */ + const std::vector> input_bdl_wires; + /** + * Output BDL wires. + */ + const std::vector> output_bdl_wires; + /** + * Number of input BDL wires. + */ + const std::size_t number_of_input_wires; + /** + * Number of output BDL wires. + */ + const std::size_t number_of_output_wires; + /** + * Number of discarded layouts at first pruning. + */ + std::atomic number_of_discarded_layouts_at_first_pruning{0}; + /** + * Number of discarded layouts at second pruning. + */ + std::atomic number_of_discarded_layouts_at_second_pruning{0}; + /** + * Number of discarded layouts at third pruning. + */ + std::atomic number_of_discarded_layouts_at_third_pruning{0}; + /** + * Number of threads to be used for the design process. + */ + std::size_t number_of_threads{std::thread::hardware_concurrency()}; + + [[nodiscard]] std::vector extract_gate_designs(const std::vector& gate_candidates) const noexcept { mockturtle::stopwatch stop{stats.time_total}; - std::vector gate_candidates{}; - gate_candidates.reserve(all_canvas_layouts.size()); - - { - mockturtle::stopwatch stop_pruning{stats.pruning_total}; - gate_candidates = run_pruning(); - } - - stats.number_of_layouts_after_first_pruning = - all_canvas_layouts.size() - number_of_discarded_layouts_at_first_pruning.load(); - stats.number_of_layouts_after_second_pruning = - stats.number_of_layouts_after_first_pruning - number_of_discarded_layouts_at_second_pruning.load(); - stats.number_of_layouts_after_third_pruning = - stats.number_of_layouts_after_second_pruning - number_of_discarded_layouts_at_third_pruning.load(); - if (gate_candidates.empty()) { return std::vector{}; @@ -433,39 +445,20 @@ class design_sidb_gates_impl std::make_optional::simulation_results_per_input>>(); } - std::mutex mutex_to_protect_gate_designs{}; - - designed_gate_layouts.gate_layouts.reserve(gate_candidates.size()); // TODO: is it smart to do a reserve here? - - const std::size_t num_threads = std::min(number_of_threads, gate_candidates.size()); - - const std::size_t chunk_size = (gate_candidates.size() + num_threads - 1) / num_threads; // Ceiling division - - std::vector threads; - threads.reserve(num_threads); + std::mutex mutex_to_protect_designed_gate_layouts{}; - std::atomic gate_design_found = false; + std::atomic solution_found = false; - const auto check_operational_status = [this, &designed_gate_layouts, &mutex_to_protect_gate_designs, - &gate_design_found](auto&& candidate) noexcept + const auto add_combination_to_layout_and_check_operation = [this, &mutex_to_protect_designed_gate_layouts, + &designed_gate_layouts, + &solution_found](const auto& candidate) noexcept { - // Early exit if a solution is found and only the first solution is required - if (gate_design_found && (params.termination_cond == design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION)) - { - return; - } - - // pruning was already conducted above. Hence, SIMULATION_ONLY is chosen. - params.operational_params.strategy_to_analyze_operational_status = - is_operational_params::operational_analysis_strategy::SIMULATION_ONLY; - if (const auto [status, aux_stats] = is_operational(candidate, truth_table, params.operational_params, input_bdl_wires, output_bdl_wires); status == operational_status::OPERATIONAL) { - // Lock and update shared resources { - const std::lock_guard lock{mutex_to_protect_gate_designs}; + const std::lock_guard lock_vector{mutex_to_protect_designed_gate_layouts}; designed_gate_layouts.gate_layouts.emplace_back(std::move(candidate)); @@ -475,28 +468,37 @@ class design_sidb_gates_impl std::move(aux_stats.simulation_results.value())); } } - gate_design_found = true; // Notify all threads that a solution has been found + + solution_found = true; } }; + const std::size_t num_threads = std::min(number_of_threads, gate_candidates.size()); + + const std::size_t chunk_size = (gate_candidates.size() + num_threads - 1) / num_threads; // Ceiling division + + std::vector threads{}; + threads.reserve(num_threads); + for (std::size_t i = 0; i < num_threads; ++i) { threads.emplace_back( - [this, i, chunk_size, &gate_candidates, &check_operational_status, &gate_design_found]() + [this, i, chunk_size, &gate_candidates, &add_combination_to_layout_and_check_operation, + &solution_found]() { const std::size_t start_index = i * chunk_size; const std::size_t end_index = std::min(start_index + chunk_size, gate_candidates.size()); for (std::size_t j = start_index; j < end_index; ++j) { - if (gate_design_found && + if (solution_found && (params.termination_cond == design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION)) { return; } - check_operational_status(gate_candidates[j]); + add_combination_to_layout_and_check_operation(gate_candidates.at(j)); } }); } @@ -516,65 +518,6 @@ class design_sidb_gates_impl return designed_gate_layouts.gate_layouts; } - - private: - /** - * The skeleton layout serves as a starting layout to which SiDBs are added to create unique SiDB layouts and, if - * possible, working gates. It defines input and output wires. - */ - const Lyt skeleton_layout; - /** - * Truth table of the given gate. - */ - const std::vector truth_table; - /** - * Parameters for the *SiDB Gate Designer*. - */ - design_sidb_gates_params params; - /** - * All cells within the canvas. - */ - std::vector all_sidbs_in_canvas; - /** - * The statistics of the gate design. - */ - design_sidb_gates_stats& stats; - /** - * Input BDL wires. - */ - const std::vector> input_bdl_wires; - /** - * Output BDL wires. - */ - const std::vector> output_bdl_wires; - /** - * Number of input BDL wires. - */ - const std::size_t number_of_input_wires; - /** - * Number of output BDL wires. - */ - const std::size_t number_of_output_wires; - /** - * All Canvas SiDB layout (without I/O pins). - */ - const std::vector all_canvas_layouts{}; - /** - * Number of discarded layouts at first pruning. - */ - std::atomic number_of_discarded_layouts_at_first_pruning{0}; - /** - * Number of discarded layouts at second pruning. - */ - std::atomic number_of_discarded_layouts_at_second_pruning{0}; - /** - * Number of discarded layouts at third pruning. - */ - std::atomic number_of_discarded_layouts_at_third_pruning{0}; - /** - * Number of threads to be used for the design process. - */ - std::size_t number_of_threads{std::thread::hardware_concurrency()}; /** * This function processes each layout to determine if it represents a valid gate implementation or if it can be * pruned by using three distinct physically-informed pruning steps. It leverages multi-threading to accelerate the @@ -584,63 +527,54 @@ class design_sidb_gates_impl */ [[nodiscard]] std::vector run_pruning() noexcept { - std::vector gate_candidate = {}; + std::vector gate_candidates = {}; - if (all_canvas_layouts.empty()) + if (stats.number_of_layouts == 0) { - return gate_candidate; + return gate_candidates; } + gate_candidates.reserve(stats.number_of_layouts); + std::mutex mutex_to_protect_gate_candidates{}; // used to control access to shared resources + std::vector all_canvas_layouts = create_all_possible_canvas_layouts(); + // Function to check validity and add layout to all_designs auto conduct_pruning_steps = [&](const Lyt& canvas_lyt) { - auto current_layout = skeleton_layout.clone(); - - cell dependent_cell{}; - - canvas_lyt.foreach_cell( - [¤t_layout, &dependent_cell](const auto& c) - { - current_layout.assign_cell_type(c, Lyt::technology::cell_type::LOGIC); - dependent_cell = c; - }); + Lyt current_layout = skeleton_layout.clone(); - charge_distribution_surface cds_canvas{canvas_lyt, params.operational_params.simulation_parameters, - sidb_charge_state::NEGATIVE, - cds_configuration::CHARGE_LOCATION_ONLY}; - - cds_canvas.assign_dependent_cell(dependent_cell); + canvas_lyt.foreach_cell([¤t_layout](const auto& c) + { current_layout.assign_cell_type(c, Lyt::technology::cell_type::LOGIC); }); auto bii = bdl_input_iterator{current_layout, params.operational_params.input_bdl_iterator_params, input_bdl_wires}; - detail::is_operational_impl is_operational_impl{ + is_operational_impl is_operational_impl{ current_layout, truth_table, params.operational_params, input_bdl_wires, output_bdl_wires, canvas_lyt}; for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { - const auto reason_for_filtering = - is_operational_impl.is_layout_invalid(bii.get_current_input_index(), cds_canvas); - - if (reason_for_filtering.has_value()) + if (const auto reason_for_filtering = + is_operational_impl.is_layout_invalid(bii.get_current_input_index()); + reason_for_filtering.has_value()) { switch (reason_for_filtering.value()) { - case detail::layout_invalidity_reason::POTENTIAL_POSITIVE_CHARGES: + case layout_invalidity_reason::POTENTIAL_POSITIVE_CHARGES: { - number_of_discarded_layouts_at_first_pruning++; + ++number_of_discarded_layouts_at_first_pruning; break; } - case detail::layout_invalidity_reason::PHYSICAL_INFEASIBILITY: + case layout_invalidity_reason::PHYSICAL_INFEASIBILITY: { - number_of_discarded_layouts_at_second_pruning++; + ++number_of_discarded_layouts_at_second_pruning; break; } - case detail::layout_invalidity_reason::IO_INSTABILITY: + case layout_invalidity_reason::IO_INSTABILITY: { - number_of_discarded_layouts_at_third_pruning++; + ++number_of_discarded_layouts_at_third_pruning; break; } default: @@ -653,13 +587,11 @@ class design_sidb_gates_impl } const std::lock_guard lock{mutex_to_protect_gate_candidates}; - gate_candidate.push_back(current_layout); + gate_candidates.emplace_back(current_layout); }; - gate_candidate.reserve(all_canvas_layouts.size()); - - const std::size_t num_threads = std::min(number_of_threads, all_canvas_layouts.size()); - const std::size_t chunk_size = (all_canvas_layouts.size() + num_threads - 1) / num_threads; + const std::size_t num_threads = std::min(number_of_threads, stats.number_of_layouts); + const std::size_t chunk_size = (stats.number_of_layouts + num_threads - 1) / num_threads; std::vector threads{}; threads.reserve(num_threads); @@ -667,14 +599,14 @@ class design_sidb_gates_impl for (std::size_t i = 0; i < num_threads; ++i) { threads.emplace_back( - [i, chunk_size, this, &conduct_pruning_steps]() + [i, chunk_size, &conduct_pruning_steps, &all_canvas_layouts] { const std::size_t start_index = i * chunk_size; const std::size_t end_index = std::min(start_index + chunk_size, all_canvas_layouts.size()); for (std::size_t j = start_index; j < end_index; ++j) { - conduct_pruning_steps(all_canvas_layouts[j]); + conduct_pruning_steps(all_canvas_layouts.at(j)); } }); } @@ -687,7 +619,7 @@ class design_sidb_gates_impl } } - return gate_candidate; + return gate_candidates; } /** * This function calculates all combinations of distributing a given number of SiDBs across a specified number of @@ -695,18 +627,18 @@ class design_sidb_gates_impl * * @return A vector containing all possible gate layouts generated from the combinations. */ - [[nodiscard]] std::vector determine_all_possible_canvas_layouts() const noexcept + [[nodiscard]] std::vector create_all_possible_canvas_layouts() const noexcept { const auto all_combinations = determine_all_combinations_of_distributing_k_entities_on_n_positions( params.number_of_sidbs, static_cast(all_sidbs_in_canvas.size())); - std::vector designed_gate_layouts = {}; - designed_gate_layouts.reserve(all_combinations.size()); + std::vector all_canvas_layouts = {}; + all_canvas_layouts.reserve(all_combinations.size()); - const auto add_cell_combination_to_layout = [this, &designed_gate_layouts](const auto& combination) noexcept + const auto add_cell_combination_to_layout = [this, &all_canvas_layouts](const auto& combination) noexcept { const auto layout_with_added_cells = convert_canvas_cell_indices_to_layout(combination); - designed_gate_layouts.push_back(layout_with_added_cells); + all_canvas_layouts.emplace_back(layout_with_added_cells); }; for (const auto& combination : all_combinations) @@ -714,29 +646,11 @@ class design_sidb_gates_impl add_cell_combination_to_layout(combination); } - return designed_gate_layouts; - } - /** - * This function adds SiDBs (given by indices) to the skeleton layout that is returned afterwards. - * - * @param cell_indices A vector of indices of cells to be added to the skeleton layout. - * @return A copy of the original layout (`skeleton_layout`) with SiDB cells added at specified indices. - */ - [[nodiscard]] Lyt skeleton_layout_with_canvas_sidbs(const std::vector& cell_indices) const noexcept - { - Lyt lyt_copy{skeleton_layout.clone()}; - - for (const auto i : cell_indices) - { - assert(i < all_sidbs_in_canvas.size() && "cell indices are out-of-range"); - - if (lyt_copy.get_cell_type(all_sidbs_in_canvas[i]) == sidb_technology::cell_type::EMPTY) - { - lyt_copy.assign_cell_type(all_sidbs_in_canvas[i], sidb_technology::cell_type::LOGIC); - } - } + // Shuffle all canvas layouts to distribute thread load when extracting gate layouts later + std::shuffle(all_canvas_layouts.begin(), all_canvas_layouts.end(), + std::default_random_engine(std::random_device{}())); - return lyt_copy; + return all_canvas_layouts; } /** * This function generates canvas SiDb layouts. @@ -777,15 +691,21 @@ class design_sidb_gates_impl } /** * This function makes sure that the underlying parameters for `is_operational` allow simulation results to be used - * when the given parameter set indicates the use for it. + * when the given parameter set indicates the use for it. TODO */ - void set_simulation_results_retention_accordingly() noexcept + void set_operational_params_accordingly() noexcept { if (!params.post_design_process.empty()) { params.operational_params.simulation_results_retention = is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS; } + + if (params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL) + { + params.operational_params.strategy_to_analyze_operational_status = + is_operational_params::operational_analysis_strategy::SIMULATION_ONLY; + } } }; @@ -843,8 +763,7 @@ template std::vector result{}; - if (params.design_mode == - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER) + if (params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER) { result = p.run_automatic_exhaustive_gate_designer(); } diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 26dcb834d..ad50a32c2 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -296,19 +296,14 @@ class is_operational_impl output_bdl_pairs = detect_bdl_pairs(layout, sidb_technology::cell_type::OUTPUT, params.input_bdl_iterator_params.bdl_wire_params.bdl_pairs_params); } - canvas_lyt.foreach_cell( - [this](const auto& c) - { - dependent_cell = c; - return false; - }); } /** * Constructor to initialize the algorithm with a layout and parameters. * * @param lyt The SiDB cell-level layout to be checked. - * @param spec Expected Boolean function of the layout given as a multi-output truth table. + * @param tt Expected Boolean function of the layout given as a multi-output truth table. * @param params Parameters for the `is_operational` algorithm. + * @param c_lyt Canvas layout. */ is_operational_impl(const Lyt& lyt, const std::vector& tt, const is_operational_params& params, const Lyt& c_lyt) : @@ -333,22 +328,15 @@ class is_operational_impl * do not satisfy physical model constraints under the I/O pin conditions required for the desired Boolean function, * and (3) detecting I/O signal instability. * - * @tparam ChargeLyt The charge distribution surface layout type. * @param input_pattern The current input pattern. - * @param cds_canvas The charge distribution of the canvas layout. - * @param dependent_cell A dependent-cell of the canvas SiDBs. * @return A `layout_invalidity_reason` object indicating why the layout is non-operational; or `std::nullopt` if it * could not certainly be determined to be in fact non-operational. */ - template - [[nodiscard]] std::optional is_layout_invalid(const uint64_t input_pattern, - ChargeLyt& cds_canvas) noexcept + [[nodiscard]] std::optional is_layout_invalid(const uint64_t input_pattern) noexcept { - static_assert(is_charge_distribution_surface_v, "ChargeLyt is not a charge distribution surface"); - bii = input_pattern; - ChargeLyt cds_layout{*bii}; + charge_distribution_surface cds_layout{*bii}; cds_layout.assign_all_charge_states(sidb_charge_state::NEGATIVE); cds_layout.assign_physical_parameters(parameters.simulation_parameters); @@ -357,22 +345,15 @@ class is_operational_impl return layout_invalidity_reason::POTENTIAL_POSITIVE_CHARGES; } - cds_layout.assign_dependent_cell(dependent_cell); - cds_canvas.assign_dependent_cell(dependent_cell); - const auto input_index = bii.get_current_input_index(); set_charge_distribution_of_input_pins(cds_layout, bii.get_current_input_index()); set_charge_distribution_of_output_pins(cds_layout, evaluate_output(truth_table, input_index)); - const auto physical_validity = is_physical_validity_feasible(cds_layout); - - if (physical_validity.has_value()) + if (const auto physical_validity = is_physical_validity_feasible(cds_layout); physical_validity.has_value()) { - const auto output_index = evaluate_output(truth_table, input_index); - - if (is_io_signal_unstable(cds_layout, truth_table.front().num_bits(), input_index, output_index, - physical_validity.value())) + if (const auto output_index = evaluate_output(truth_table, input_index); is_io_signal_unstable( + cds_layout, truth_table.front().num_bits(), input_index, output_index, physical_validity.value())) { return layout_invalidity_reason::IO_INSTABILITY; }; @@ -397,11 +378,6 @@ class is_operational_impl if (!canvas_lyt.is_empty()) { - charge_distribution_surface cds_canvas{canvas_lyt}; - - cds_canvas.assign_dependent_cell(dependent_cell); - cds_canvas.assign_physical_parameters(parameters.simulation_parameters); - if ((parameters.op_condition == is_operational_params::operational_condition::REJECT_KINKS && parameters.strategy_to_analyze_operational_status == is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION) || @@ -411,7 +387,7 @@ class is_operational_impl // number of different input combinations for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { - if (is_layout_invalid(bii.get_current_input_index(), cds_canvas)) + if (is_layout_invalid(bii.get_current_input_index())) { return {operational_status::NON_OPERATIONAL, non_operationality_reason::LOGIC_MISMATCH}; } @@ -667,6 +643,20 @@ class is_operational_impl [[nodiscard]] std::optional is_physical_validity_feasible(charge_distribution_surface& cds_layout) const noexcept { + if (canvas_lyt.num_cells() == 0) + { + cds_layout.update_after_charge_change(dependent_cell_mode::FIXED, + energy_calculation::KEEP_OLD_ENERGY_VALUE); + + if (cds_layout.is_physically_valid()) + { + cds_layout.recompute_system_energy(); + return cds_layout.get_system_energy(); + } + + return std::nullopt; + } + auto min_energy = std::numeric_limits::infinity(); uint64_t canvas_charge_index = 0; @@ -674,18 +664,17 @@ class is_operational_impl charge_distribution_surface cds_canvas_copy{canvas_lyt}; cds_canvas_copy.assign_base_number(2); cds_canvas_copy.assign_charge_index(canvas_charge_index); - cds_canvas_copy.assign_dependent_cell(dependent_cell); + cds_layout.assign_dependent_cell(cds_canvas_copy.get_sidb_order().front()); const auto max_index = cds_canvas_copy.get_max_charge_index(); - assert(max_index == static_cast(std::pow(2, cds_canvas_copy.num_cells() - 1) - 1) && - "The maximum charge index is incorrect. Probably, the dependent cell is not set."); + // assert(max_index == static_cast(std::pow(2, cds_canvas_copy.num_cells() - 1) - 1) && + // "The maximum charge index is incorrect. Probably, the dependent cell is not set."); while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) - { + [&cds_layout, &cds_canvas_copy](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -921,9 +910,8 @@ class is_operational_impl set_charge_distribution_of_input_pins(cds_layout, kink_states_input); set_charge_distribution_of_output_pins(cds_layout, output_wire_index); - const auto physical_validity = is_physical_validity_feasible(cds_layout); - - if (physical_validity.has_value()) + if (const auto physical_validity = is_physical_validity_feasible(cds_layout); + physical_validity.has_value()) { if (physical_validity.value() + physical_constants::POP_STABILITY_ERR < minimal_energy_of_physically_valid_layout) @@ -982,10 +970,6 @@ class is_operational_impl * Layout consisting of all canvas SiDBs. */ Lyt canvas_lyt{}; - /** - * Dependent cell of the canvas SiDBs. - */ - cell dependent_cell{}; /** * This function conducts physical simulation of the given SiDB layout. * The simulation results are stored in the `sim_result` variable. @@ -1299,6 +1283,81 @@ template return input_patterns; } +/** + * This function determines the input combinations for which the layout is operational. + * + * @tparam Lyt SiDB cell-level layout type. + * @tparam TT Type of the truth table. + * @param lyt The SiDB layout. + * @param spec Vector of truth table specifications. + * @param params Parameters to simulate if an input combination is operational. + * @param input_bdl_wire Optional BDL input wires of lyt. + * @param output_bdl_wire Optional BDL output wires of lyt. + * @param canvas_lyt Optional canvas layout. + * @return The count of operational input combinations. + */ +template +[[nodiscard]] std::set +operational_input_patterns(const Lyt& lyt, const std::vector& spec, const is_operational_params& params, + const std::vector>& input_bdl_wire, + const std::vector>& output_bdl_wire, + const std::optional& canvas_lyt = std::nullopt) noexcept +{ + static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); + static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); + static_assert(kitty::is_truth_table::value, "TT is not a truth table"); + + assert(lyt.num_pis() > 0 && "skeleton needs input cells"); + assert(lyt.num_pos() > 0 && "skeleton needs output cells"); + + assert(!spec.empty()); + // all elements in spec must have the same number of variables + assert(std::adjacent_find(spec.cbegin(), spec.cend(), [](const auto& a, const auto& b) + { return a.num_vars() != b.num_vars(); }) == spec.cend()); + + if (canvas_lyt.has_value()) + { + detail::is_operational_impl p{lyt, spec, params, input_bdl_wire, output_bdl_wire, canvas_lyt.value()}; + + std::set input_patterns{}; + + // all possible input patterns + for (auto i = 0u; i < spec.front().num_bits(); ++i) + { + input_patterns.insert(i); + } + + const auto non_op_patterns_and_non_op_reason = + p.determine_non_operational_input_patterns_and_non_operationality_reason(); + + for (const auto& [input_pattern, _] : non_op_patterns_and_non_op_reason) + { + input_patterns.erase(input_pattern); + } + + return input_patterns; + } + + detail::is_operational_impl p{lyt, spec, params, input_bdl_wire, output_bdl_wire}; + + std::set input_patterns{}; + + // all possible input patterns + for (auto i = 0u; i < spec.front().num_bits(); ++i) + { + input_patterns.insert(i); + } + + const auto non_op_patterns_and_non_op_reason = + p.determine_non_operational_input_patterns_and_non_operationality_reason(); + + for (const auto& [input_pattern, _] : non_op_patterns_and_non_op_reason) + { + input_patterns.erase(input_pattern); + } + + return input_patterns; +} /** * This function determines all input combinations for which kinks induce the SiDB layout to become non-operational. * This means that the layout is operational if kinks would be accepted. diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 71942fcaf..df7d656ef 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -212,8 +212,8 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ {{10, 4, 0}, {13, 4, 0}}, 1, design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, - {std::make_unique>(), - std::make_unique>()}}; + {std::make_shared>(), + std::make_shared>()}}; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params); @@ -243,6 +243,26 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ CHECK(found_gate_layouts[2].get_cell_type({12, 4, 0}) == siqad_layout::technology::LOGIC); CHECK(found_gate_layouts[3].get_cell_type({13, 4, 0}) == siqad_layout::technology::LOGIC); } + SECTION("no canvas") + { + auto params = design_sidb_gates_params{}; + design_sidb_gates_stats design_gates_stats_exhaustive{}; + params.canvas = {{10, 4, 0}, {10, 4, 0}}; + params.number_of_sidbs = 0; + params.design_mode = design_sidb_gates_params< + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + const auto found_gate_layouts_exhaustive = + design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params, &design_gates_stats_exhaustive); + CHECK(found_gate_layouts_exhaustive.empty()); + CHECK(design_gates_stats_exhaustive.number_of_layouts == 1); + + design_sidb_gates_stats design_gates_stats_quickcell{}; + params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL; + const auto found_gate_layouts_quickcell = + design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params, &design_gates_stats_quickcell); + CHECK(found_gate_layouts_quickcell.empty()); + CHECK(design_gates_stats_quickcell.number_of_layouts == 1); + } } TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[design-sidb-gates]") @@ -290,12 +310,42 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ SECTION("no canvas") { + design_sidb_gates_stats design_gates_stats_exhaustive{}; params.canvas = {{4, 4, 0}, {4, 4, 0}}; params.number_of_sidbs = 0; params.design_mode = design_sidb_gates_params< sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; - const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); + const auto found_gate_layouts_exhaustive = + design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats_exhaustive); + REQUIRE(found_gate_layouts_exhaustive.size() == 1); + const auto& first_gate_exhaustive = found_gate_layouts_exhaustive.front(); + CHECK( + is_operational(first_gate_exhaustive, std::vector{create_and_tt()}, params.operational_params).first == + operational_status::OPERATIONAL); + CHECK(design_gates_stats_exhaustive.number_of_layouts == 1); + + design_sidb_gates_stats design_gates_stats_quickcell{}; + params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL; + const auto found_gate_layouts_quickcell = + design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats_quickcell); + REQUIRE(found_gate_layouts_quickcell.size() == 1); + const auto& first_gate_quickcell = found_gate_layouts_exhaustive.front(); + CHECK(is_operational(first_gate_quickcell, std::vector{create_and_tt()}, params.operational_params).first == + operational_status::OPERATIONAL); + CHECK(design_gates_stats_quickcell.number_of_layouts == 1); + } + + SECTION("more SiDBs than canvas positions") + { + design_sidb_gates_stats design_gates_stats{}; + params.canvas = {{4, 4, 0}, {4, 4, 0}}; + params.number_of_sidbs = 2; + params.design_mode = design_sidb_gates_params< + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + const auto found_gate_layouts_exhaustive = + design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats); CHECK(found_gate_layouts_exhaustive.empty()); + CHECK(design_gates_stats.number_of_layouts == 0); params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL; const auto found_gate_layouts_quickcell = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); CHECK(found_gate_layouts_quickcell.empty()); From 6945649949c9e2dcd78ab6e0d0e4b16cc288cddc Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 6 Feb 2025 15:44:57 +0000 Subject: [PATCH 042/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../fiction/algorithms/simulation/sidb/is_operational.hpp | 3 ++- test/algorithms/physical_design/design_sidb_gates.cpp | 6 ++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index ad50a32c2..64927b914 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -674,7 +674,8 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) { + [&cds_layout, &cds_canvas_copy](const auto& c) + { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index df7d656ef..0fcfb4b61 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -501,10 +501,8 @@ TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") CHECK(found_gate_layouts_quickcell.front().num_defects() == 1); CHECK(found_gate_layouts_quickcell.front().num_cells() == lyt.num_cells() + 2); - found_gate_layouts_quickcell.front().foreach_cell( - [](const auto& cell) { - CHECK(cell != siqad::coord_t{16, 10, 0}); - }); + found_gate_layouts_quickcell.front().foreach_cell([](const auto& cell) + { CHECK(cell != siqad::coord_t{16, 10, 0}); }); } } From 9a06c96ede8893b3263e5c591a7fc38fa0e0661c Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Thu, 6 Feb 2025 15:45:45 +0000 Subject: [PATCH 043/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 111 +++++++++--------- 1 file changed, 57 insertions(+), 54 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 8a3db104a..27f5c5344 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4318,7 +4318,11 @@ static const char *__doc_fiction_design_sidb_gates_params_number_of_sidbs = R"do static const char *__doc_fiction_design_sidb_gates_params_operational_params = R"doc(Parameters for the `is_operational` function.)doc"; -static const char *__doc_fiction_design_sidb_gates_params_post_design_process = R"doc()doc"; +static const char *__doc_fiction_design_sidb_gates_params_post_design_process = +R"doc(After the design process, the returned gates are not sorted. + +@note This parameter has no effect unless the gate design is +exhaustive and all combinations are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_params_termination_cond = R"doc(The design process is terminated after a valid SiDB gate design is @@ -5638,8 +5642,6 @@ Parameter ``to_delete``: static const char *__doc_fiction_detail_design_sidb_gates_impl = R"doc()doc"; -static const char *__doc_fiction_detail_design_sidb_gates_impl_all_canvas_layouts = R"doc(All Canvas SiDB layout (without I/O pins).)doc"; - static const char *__doc_fiction_detail_design_sidb_gates_impl_all_sidbs_in_canvas = R"doc(All cells within the canvas.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_convert_canvas_cell_indices_to_layout = @@ -5651,6 +5653,15 @@ Parameter ``cell_indices``: Returns: An SiDB cell-level layout consisting of canvas SidBs.)doc"; +static const char *__doc_fiction_detail_design_sidb_gates_impl_create_all_possible_canvas_layouts = +R"doc(This function calculates all combinations of distributing a given +number of SiDBs across a specified number of positions in the canvas. +Each combination is then used to create a gate layout candidate. + +Returns: + A vector containing all possible gate layouts generated from the + combinations.)doc"; + static const char *__doc_fiction_detail_design_sidb_gates_impl_design_sidb_gates_impl = R"doc(This constructor initializes an instance of the *SiDB Gate Designer* implementation with the provided skeleton layout and configuration @@ -5669,14 +5680,7 @@ Parameter ``ps``: Parameter ``st``: Statistics for the gate design process.)doc"; -static const char *__doc_fiction_detail_design_sidb_gates_impl_determine_all_possible_canvas_layouts = -R"doc(This function calculates all combinations of distributing a given -number of SiDBs across a specified number of positions in the canvas. -Each combination is then used to create a gate layout candidate. - -Returns: - A vector containing all possible gate layouts generated from the - combinations.)doc"; +static const char *__doc_fiction_detail_design_sidb_gates_impl_extract_gate_designs = R"doc()doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_input_bdl_wires = R"doc(Input BDL wires.)doc"; @@ -5697,7 +5701,7 @@ static const char *__doc_fiction_detail_design_sidb_gates_impl_output_bdl_wires static const char *__doc_fiction_detail_design_sidb_gates_impl_params = R"doc(Parameters for the *SiDB Gate Designer*.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_run_automatic_exhaustive_gate_designer = -R"doc(Design gates by using the *Automatic Exhaustive Gate Desginer*. This +R"doc(Design gates by using the *Automatic Exhaustive Gate Designer*. This algorithm was proposed in \"Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds\" by J. Drewniok, M. Walter, and R. Wille in NANOARCH 2023 @@ -5737,27 +5741,16 @@ parameters. The design process is parallelized to improve performance. Returns: A vector of designed SiDB gate layouts.)doc"; -static const char *__doc_fiction_detail_design_sidb_gates_impl_set_simulation_results_retention_accordingly = +static const char *__doc_fiction_detail_design_sidb_gates_impl_set_operational_params_accordingly = R"doc(This function makes sure that the underlying parameters for `is_operational` allow simulation results to be used when the given -parameter set indicates the use for it.)doc"; +parameter set indicates the use for it. TODO)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_skeleton_layout = R"doc(The skeleton layout serves as a starting layout to which SiDBs are added to create unique SiDB layouts and, if possible, working gates. It defines input and output wires.)doc"; -static const char *__doc_fiction_detail_design_sidb_gates_impl_skeleton_layout_with_canvas_sidbs = -R"doc(This function adds SiDBs (given by indices) to the skeleton layout -that is returned afterwards. - -Parameter ``cell_indices``: - A vector of indices of cells to be added to the skeleton layout. - -Returns: - A copy of the original layout (`skeleton_layout`) with SiDB cells - added at specified indices.)doc"; - static const char *__doc_fiction_detail_design_sidb_gates_impl_stats = R"doc(The statistics of the gate design.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_truth_table = R"doc(Truth table of the given gate.)doc"; @@ -8101,8 +8094,6 @@ Parameter ``current_input_index``: `true` if any output wire contains a kink (i.e., an unexpected charge state), `false` otherwise.)doc"; -static const char *__doc_fiction_detail_is_operational_impl_dependent_cell = R"doc(Dependent cell of the canvas SiDBs.)doc"; - static const char *__doc_fiction_detail_is_operational_impl_determine_non_operational_input_patterns_and_non_operationality_reason = R"doc(Determines the input combinations for which the layout is non- operational and the reason why the layout is non-operational. @@ -8184,18 +8175,9 @@ identify and discard SiDB layouts that do not satisfy physical model constraints under the I/O pin conditions required for the desired Boolean function, and (3) detecting I/O signal instability. -Template parameter ``ChargeLyt``: - The charge distribution surface layout type. - Parameter ``input_pattern``: The current input pattern. -Parameter ``cds_canvas``: - The charge distribution of the canvas layout. - -Parameter ``dependent_cell``: - A dependent-cell of the canvas SiDBs. - Returns: A `layout_invalidity_reason` object indicating why the layout is non-operational; or `std::nullopt` if it could not certainly be @@ -8268,12 +8250,15 @@ R"doc(Constructor to initialize the algorithm with a layout and parameters. Parameter ``lyt``: The SiDB cell-level layout to be checked. -Parameter ``spec``: +Parameter ``tt``: Expected Boolean function of the layout given as a multi-output truth table. Parameter ``params``: - Parameters for the `is_operational` algorithm.)doc"; + Parameters for the `is_operational` algorithm. + +Parameter ``c_lyt``: + Canvas layout.)doc"; static const char *__doc_fiction_detail_is_operational_impl_is_physical_validity_feasible = R"doc(This function determines if there is a charge distribution of the @@ -15560,28 +15545,15 @@ operational.)doc"; static const char *__doc_fiction_is_operational_params_operational_analysis_strategy = R"doc(Simulation method to determine if the layout is operational or non- -operational. There are three possible strategies: - -- `SIMULATION_ONLY`: This setting does not apply any filtering -strategies to determine if the layout is operational. Instead, it -relies solely on physical simulation to make this determination. - -`FILTER_ONLY`: This setting does only apply filtering strategies to -determine if the layout is non-operational. If the layout passes all -filtering strategies, it is considered operational. This is only an -approximation. It may be possible that the layout is non-operational, -but the filtering strategies do not detect it. - -`FILTER_THEN_SIMULATION`: Before a physical simulation is conducted, -the algorithm checks if filtering strategies have detected whether the -layout is non-operational. This only provides any runtime benefits if -kinks are rejected.)doc"; +operational.)doc"; static const char *__doc_fiction_is_operational_params_operational_analysis_strategy_FILTER_ONLY = R"doc(Apply filtering exclusively to determine whether the layout is non- operational. If the layout passes all filter steps, it is considered operational. -@note This is an extremely fast approximation that may sometimes lead -to false positives.)doc"; +@note This is an extremely fast approximation that may lead to false +positives.)doc"; static const char *__doc_fiction_is_operational_params_operational_analysis_strategy_FILTER_THEN_SIMULATION = R"doc(Before a physical simulation is conducted, the algorithm checks if @@ -16824,6 +16796,37 @@ Parameter ``params``: Returns: The count of operational input combinations.)doc"; +static const char *__doc_fiction_operational_input_patterns_2 = +R"doc(This function determines the input combinations for which the layout +is operational. + +Template parameter ``Lyt``: + SiDB cell-level layout type. + +Template parameter ``TT``: + Type of the truth table. + +Parameter ``lyt``: + The SiDB layout. + +Parameter ``spec``: + Vector of truth table specifications. + +Parameter ``params``: + Parameters to simulate if an input combination is operational. + +Parameter ``input_bdl_wire``: + Optional BDL input wires of lyt. + +Parameter ``output_bdl_wire``: + Optional BDL output wires of lyt. + +Parameter ``canvas_lyt``: + Optional canvas layout. + +Returns: + The count of operational input combinations.)doc"; + static const char *__doc_fiction_operational_status = R"doc(Possible operational status of a layout.)doc"; static const char *__doc_fiction_operational_status_NON_OPERATIONAL = R"doc(The layout is non-operational.)doc"; From bfb10c0a4ee1c00fca38ae84615ec9f272830048 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Fri, 7 Feb 2025 12:34:05 +0100 Subject: [PATCH 044/138] :sparkles: Extendable framework for comparing designed SiDB gates --- .../compare_designed_sidb_gates.hpp | 104 ++++++++ .../compare_by_ground_state_isolation.hpp | 235 ++++++++++++++++++ 2 files changed, 339 insertions(+) create mode 100644 include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp create mode 100644 include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp new file mode 100644 index 000000000..6ba5bd1fa --- /dev/null +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -0,0 +1,104 @@ +// +// Created by Willem Lambooy on 05/02/2025. +// + +#ifndef COMPARE_DESIGNED_SIDB_GATES_HPP +#define COMPARE_DESIGNED_SIDB_GATES_HPP + +#include "fiction/technology/charge_distribution_surface.hpp" + +#include +#include +#include +#include +#include + +namespace fiction +{ + +template +struct designed_sidb_gates +{ + using simulation_results_per_input = std::vector>>; + + std::vector gate_layouts; + + std::optional> simulation_results; +}; + +// every instance of a designed_sidb_gates_comparator should implement operator<, operator==, and have a sensitivity +// parameter +template +class designed_sidb_gates_comparator +{ + public: + struct sidb_gate_design + { + Lyt gate_design; + typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; + }; + + designed_sidb_gates_comparator() = delete; + virtual ~designed_sidb_gates_comparator() = default; + + designed_sidb_gates_comparator& operator=(const designed_sidb_gates_comparator& other) noexcept = default; + designed_sidb_gates_comparator& operator=(designed_sidb_gates_comparator&& other) noexcept = default; + + explicit designed_sidb_gates_comparator(const double sens) noexcept : sensitivity{sens} {} + + [[nodiscard]] virtual bool operator()(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept = 0; + [[nodiscard]] virtual bool equals(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept = 0; + + protected: + double sensitivity; +}; + +// use pointers to prevent slicing +template +using designed_sidb_gates_ordering_recipe = std::vector>>; + +template +void order_designed_sidb_gates(const designed_sidb_gates_ordering_recipe& recipe, + designed_sidb_gates& designed_gates) noexcept +{ + assert(designed_gates.simulation_results.has_value() && + "Simulation results must be available for gate design ordering"); + + std::vector::sidb_gate_design> gate_designs_for_assessment{}; + gate_designs_for_assessment.reserve(designed_gates.gate_layouts.size()); + + // pair the gate layouts with the associated simulation results using move + for (uint64_t i = 0; i < designed_gates.gate_layouts.size(); ++i) + { + gate_designs_for_assessment.emplace_back(typename designed_sidb_gates_comparator::sidb_gate_design{ + std::move(designed_gates.gate_layouts.at(i)), std::move(designed_gates.simulation_results.value().at(i))}); + } + + // clear the gate_layouts vector so that we may reenter the elements in order later + designed_gates.gate_layouts.clear(); + + // perform ordering procedure using the given recipe + std::sort(gate_designs_for_assessment.begin(), gate_designs_for_assessment.end(), + [&](const auto& lhs, const auto& rhs) noexcept + { + for (uint64_t i = 0; i < recipe.size() - 1; ++i) + { + if (!recipe.at(i)->equals(lhs, rhs)) + { + return (*recipe.at(i))(lhs, rhs); + } + } + + return (*recipe.at(recipe.size() - 1))(lhs, rhs); + }); + + // put the designed gate layouts back in order + for (auto&& [gate_design, _] : gate_designs_for_assessment) + { + designed_gates.gate_layouts.emplace_back(std::move(gate_design)); + } +} + +} // namespace fiction + +#endif // COMPARE_DESIGNED_SIDB_GATES_HPP diff --git a/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp b/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp new file mode 100644 index 000000000..4733ce047 --- /dev/null +++ b/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp @@ -0,0 +1,235 @@ +// +// Created by Willem Lambooy on 05/02/2025. +// + +#ifndef COMPARE_BY_ENERGETIC_GAP_HPP +#define COMPARE_BY_ENERGETIC_GAP_HPP + +#include "fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp" +#include "fiction/technology/charge_distribution_surface.hpp" + +#include + +#include +#include +#include +#include +#include +#include + +namespace fiction +{ + +namespace detail +{ + +template +[[nodiscard]] double get_ground_state_isolation(const std::vector>& sim_res) noexcept +{ + if (sim_res.size() == 1) + { + return std::numeric_limits::infinity(); + } + + phmap::btree_set system_energies{}; + + for (const charge_distribution_surface& cds : sim_res) + { + system_energies.insert(cds.get_system_energy()); + } + + return *system_energies.cbegin() - *std::next(system_energies.cbegin(), 1); +} + +} // namespace detail + +template +class compare_by_minimum_ground_state_isolation final : public designed_sidb_gates_comparator +{ + public: + using typename designed_sidb_gates_comparator::sidb_gate_design; + + explicit + compare_by_minimum_ground_state_isolation(const double sens = std::numeric_limits::epsilon()) noexcept : + designed_sidb_gates_comparator{sens} + {} + + [[nodiscard]] bool operator()(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept override + { + return minimum_ground_state_isolation_over_all_inputs(lhs) < + minimum_ground_state_isolation_over_all_inputs(rhs); + } + + [[nodiscard]] bool equals(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept override + { + return std::abs(minimum_ground_state_isolation_over_all_inputs(lhs) - + minimum_ground_state_isolation_over_all_inputs(rhs)) < this->sensitivity; + } + + private: + [[nodiscard]] double minimum_ground_state_isolation_over_all_inputs(const sidb_gate_design& gate_design) const noexcept + { + std::vector ground_state_isolations{}; + ground_state_isolations.reserve(gate_design.simulation_results_per_input.size()); + + std::transform(gate_design.simulation_results_per_input.cbegin(), + gate_design.simulation_results_per_input.cend(), std::back_inserter(ground_state_isolations), + [](const auto& sim_res) { return detail::get_ground_state_isolation(sim_res);}); + + return *std::min_element(ground_state_isolations.cbegin(), ground_state_isolations.cend()); + } +}; + +template +class compare_by_average_ground_state_isolation final : public designed_sidb_gates_comparator +{ + public: + using typename designed_sidb_gates_comparator::sidb_gate_design; + + explicit + compare_by_average_ground_state_isolation(const double sens = std::numeric_limits::epsilon()) noexcept : + designed_sidb_gates_comparator{sens} + {} + + [[nodiscard]] bool operator()(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept override + { + return average_ground_state_isolation_over_all_inputs(lhs) < + average_ground_state_isolation_over_all_inputs(rhs); + } + + [[nodiscard]] bool equals(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept override + { + return std::abs(average_ground_state_isolation_over_all_inputs(lhs) - + average_ground_state_isolation_over_all_inputs(rhs)) < this->sensitivity; + } + + private: + [[nodiscard]] double average_ground_state_isolation_over_all_inputs(const sidb_gate_design& gate_design) const noexcept + { + uint64_t count = 0; + + double accumulated_ground_state_isolation = 0.0; + + for (const auto& sim_res : gate_design.simulation_results_per_input) + { + if (sim_res.size() == 1) + { + continue; + } + + accumulated_ground_state_isolation += detail::get_ground_state_isolation(sim_res); + + ++count; + } + + return accumulated_ground_state_isolation / static_cast(count); + } +}; + +} // namespace fiction + +#endif // COMPARE_BY_ENERGETIC_GAP_HPP + +// +// /** +// * Performs a sorting operation on the designed gate layouts, putting those in front for which the energetic gap +// * between the ground state and the first excited state is larger. For each designed gate layout, the minimum +// * energetic gap is taken over each input. When the minima are equal for two designed gate layouts, the average +// * energetic gap over each input is taken as a tiebreaker. +// * +// * @param designed_gate_layouts A vector of designed gate layouts to sort in place. +// * @param sim_results_per_input_for_each_gate_design The simulation results for each input of each designed gate +// * layout. +// */ +// void sort_designed_gate_layouts_by_ground_state_isolation( +// std::vector& designed_gate_layouts, +// std::vector>>> +// sim_results_per_input_for_each_gate_design) const noexcept +// { +// // pair the two input vectors +// std::vector>>>> pairs{}; +// pairs.reserve(designed_gate_layouts.size()); +// +// for (uint64_t i = 0; i < designed_gate_layouts.size(); ++i) +// { +// pairs.emplace_back(std::move(designed_gate_layouts.at(i)), +// std::move(sim_results_per_input_for_each_gate_design.at(i))); +// } +// +// // clear the designed_gate_layouts vector so that we may reenter the elements in order later +// designed_gate_layouts.clear(); +// +// // sort all individual simulation results by system energy +// for (auto& pair : pairs) +// { +// for (std::vector>& sim_res : pair.second) +// { +// std::sort(sim_res.begin(), sim_res.end(), [](const auto& cds1, const auto& cds2) noexcept +// { return cds1.get_system_energy() < cds2.get_system_energy(); }); +// } +// } +// +// const auto get_ground_state_isolation = +// [&](const std::vector>& sim_res) noexcept +// { +// return sim_res.size() == 1 ? std::numeric_limits::infinity() : +// sim_res.at(1).get_system_energy() - sim_res.at(0).get_system_energy(); +// }; +// +// const auto minimum_ground_state_isolation_for_all_inputs = +// [&get_ground_state_isolation]( +// const std::vector>>& res_per_input) noexcept +// { +// std::vector ground_state_isolations{}; +// std::transform(res_per_input.cbegin(), res_per_input.cend(), std::back_inserter(ground_state_isolations), +// get_ground_state_isolation); +// return *std::min_element(ground_state_isolations.cbegin(), ground_state_isolations.cend()); +// }; +// +// const auto average_ground_state_isolation_for_all_inputs = +// [&get_ground_state_isolation]( +// const std::vector>>& res_per_input) noexcept +// { +// uint64_t count = 0; +// +// double accumulated_ground_state_isolation = 0.0; +// +// for (const auto& sim_res : res_per_input) +// { +// if (sim_res.size() == 1) +// { +// continue; +// } +// +// accumulated_ground_state_isolation += get_ground_state_isolation(sim_res); +// +// ++count; +// } +// +// return accumulated_ground_state_isolation / static_cast(count); +// }; +// +// // sort the pairs by minimum ground state isolation for each input +// std::sort(pairs.begin(), pairs.end(), +// [&minimum_ground_state_isolation_for_all_inputs, +// &average_ground_state_isolation_for_all_inputs](const auto& lhs, const auto& rhs) noexcept +// { +// const double diff = minimum_ground_state_isolation_for_all_inputs(lhs.second) - +// minimum_ground_state_isolation_for_all_inputs(rhs.second); +// +// // when minima are equal, take the average +// if (std::abs(diff) < std::numeric_limits::epsilon()) +// { +// return average_ground_state_isolation_for_all_inputs(lhs.second) > +// average_ground_state_isolation_for_all_inputs(rhs.second); +// } +// +// return diff > 0.0; +// }); +// +// // put the designed gate layouts back in the sorted order +// for (auto& pair : pairs) +// { +// designed_gate_layouts.emplace_back(pair.first); +// } +// } \ No newline at end of file From 0b7b6daa64ab4db194a8da23a7c1f80cf7008374 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Fri, 7 Feb 2025 12:34:29 +0100 Subject: [PATCH 045/138] :safety_vest: Fixed `assert` --- .../fiction/algorithms/simulation/sidb/is_operational.hpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 64927b914..1ecb6ac4e 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -270,7 +270,7 @@ class is_operational_impl * Constructor to initialize the algorithm with a layout, parameters, input and output wires, and a canvas layout. * * @param lyt The SiDB cell-level layout to be checked. - * @param spec Expected Boolean function of the layout given as a multi-output truth table. + * @param tt Expected Boolean function of the layout given as a multi-output truth table. * @param params Parameters for the `is_operational` algorithm. * @param input_wires BDL input wires of lyt. * @param output_wires BDL output wires of lyt. @@ -664,12 +664,13 @@ class is_operational_impl charge_distribution_surface cds_canvas_copy{canvas_lyt}; cds_canvas_copy.assign_base_number(2); cds_canvas_copy.assign_charge_index(canvas_charge_index); + cds_canvas_copy.assign_dependent_cell(cds_canvas_copy.get_sidb_order().front()); cds_layout.assign_dependent_cell(cds_canvas_copy.get_sidb_order().front()); const auto max_index = cds_canvas_copy.get_max_charge_index(); - // assert(max_index == static_cast(std::pow(2, cds_canvas_copy.num_cells() - 1) - 1) && - // "The maximum charge index is incorrect. Probably, the dependent cell is not set."); + assert(max_index == static_cast(std::pow(2, cds_canvas_copy.num_cells() - 1) - 1) && + "The maximum charge index is incorrect. Probably, the dependent cell is not set."); while (canvas_charge_index <= max_index) { From 2c0396df8b04a0fb1ea513e2471e08754ec099ea Mon Sep 17 00:00:00 2001 From: wlambooy Date: Fri, 7 Feb 2025 15:16:02 +0100 Subject: [PATCH 046/138] :sparkles: Added the `ALL_INPUT_COMBINATIONS_ASSESSED` (non-default) termination condition to `is_operational` --- .../simulation/sidb/is_operational.hpp | 249 ++++++++++++------ .../simulation/sidb/is_operational.cpp | 128 +++++---- 2 files changed, 249 insertions(+), 128 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 1ecb6ac4e..8463f4640 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -98,6 +98,21 @@ struct is_operational_params */ FILTER_THEN_SIMULATION }; + /** + * The termination condition for assessment of the operational status of the given layout. + */ + enum class termination_condition : uint8_t + { + /** + * The assessment for the given layout terminates either when it is found to be operational for all input + * combinations, or an input combination is found for which the layout is not operational. + */ + ON_FIRST_NON_OPERATIONAL, + /** + * The operational status is assessed for all input combinations. + */ + ALL_INPUT_COMBINATIONS_ASSESSED + }; /** * Selector for the different ways to handle obtained simulation results. */ @@ -133,6 +148,10 @@ struct is_operational_params */ operational_analysis_strategy strategy_to_analyze_operational_status = operational_analysis_strategy::SIMULATION_ONLY; + /** + * Condition to decide when to terminate the assessment of the operational status of the given layout. + */ + termination_condition termination_cond = termination_condition::ON_FIRST_NON_OPERATIONAL; /** * Simulation results that are used to certify the status `OPERATIONAL` are not kept by default. */ @@ -140,23 +159,45 @@ struct is_operational_params }; /** - * This struct is used to collect auxiliary results from the operational status assessment. + * This struct is used to collect results from the operational status assessment. * * @tparam Lyt SiDB cell-level layout type. */ template -struct operational_status_assessment_stats +struct operational_assessment { /** - * Simulation results for each input are only kept when the simulation results retention is set to - * `simulation_results_mode::KEEP_SIMULATION_RESULTS`. + * This struct collects the information for a specific input combination that was obtained during the assessment. */ - using simulation_results_per_input = std::optional>>>; + struct operational_assessment_for_input + { + /** + * Standard constructor that only sets the operational status. + */ + explicit operational_assessment_for_input(const operational_status op_status) noexcept : status{op_status} {} + /** + * The assessed operational status of the given layout under one input combination. + */ + operational_status status; + /** + * The charge distributions obtained for one input combination that was tested. + */ + std::optional>> simulation_results{}; + }; /** - * The charge distributions obtained for each input combination tested, sorted by the binary representation of the - * respectively associated input combinations. + * Standard constructor that only sets the operational status. */ - simulation_results_per_input simulation_results; + explicit operational_assessment(const operational_status op_status) noexcept : status{op_status} {} + /** + * The assessed operational status of the given layout. The status `OPERATIONAL` is given if and only the layout is + * operational under all input combinations. + */ + operational_status status; + /** + * When the termination condition is set to `ALL_INPUT_COMBINATIONS_ASSESSED`, the operational status for each + * respective input combination is stored here, sorted by their binary representation. + */ + std::optional> assessment_per_input{}; /** * The number of input combinations tested. */ @@ -223,7 +264,7 @@ class is_operational_impl * Constructor to initialize the algorithm with a layout and parameters. * * @param lyt The SiDB cell-level layout to be checked. - * @param spec Expected Boolean function of the layout given as a multi-output truth table. + * @param tt Expected Boolean function of the layout given as a multi-output truth table. * @param params Parameters for the `is_operational` algorithm. */ is_operational_impl(const Lyt& lyt, const std::vector& tt, const is_operational_params& params) : @@ -372,10 +413,8 @@ class is_operational_impl * @return Pair with the first element indicating the operational status (either `OPERATIONAL` or `NON_OPERATIONAL`) * and the second element indicating the reason if it is non-operational. */ - [[nodiscard]] std::pair run() noexcept + [[nodiscard]] std::pair, non_operationality_reason> run() noexcept { - bool at_least_one_layout_is_kink_induced_non_operational = false; - if (!canvas_lyt.is_empty()) { if ((parameters.op_condition == is_operational_params::operational_condition::REJECT_KINKS && @@ -389,7 +428,8 @@ class is_operational_impl { if (is_layout_invalid(bii.get_current_input_index())) { - return {operational_status::NON_OPERATIONAL, non_operationality_reason::LOGIC_MISMATCH}; + return {operational_assessment{operational_status::NON_OPERATIONAL}, + non_operationality_reason::LOGIC_MISMATCH}; } } } @@ -401,7 +441,7 @@ class is_operational_impl is_operational_params::operational_analysis_strategy::FILTER_ONLY && !canvas_lyt.is_empty()) { - return {operational_status::OPERATIONAL, non_operationality_reason::NONE}; + return {operational_assessment{operational_status::OPERATIONAL}, non_operationality_reason::NONE}; } if (parameters.strategy_to_analyze_operational_status != @@ -410,7 +450,19 @@ class is_operational_impl is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION && !canvas_lyt.is_empty()) { - return {operational_status::OPERATIONAL, non_operationality_reason::NONE}; + return {operational_assessment{operational_status::OPERATIONAL}, non_operationality_reason::NONE}; + } + + operational_assessment assessment_results{operational_status::OPERATIONAL}; + + // when `termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED` is set, the results of the operational status + // assessment are also stored for each input separately + std::vector::operational_assessment_for_input> + assessment_results_per_input{}; + if (parameters.termination_cond == + is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED) + { + assessment_results_per_input.reserve(truth_table.front().num_bits()); } // when `simulation_results_mode::KEEP_SIMULATION_RESULTS` is set, the simulation results must be collected for @@ -426,13 +478,30 @@ class is_operational_impl // number of different input combinations for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { + typename operational_assessment::operational_assessment_for_input + assessment_results_for_this_input_combination{operational_status::OPERATIONAL};; + // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) { - return {operational_status::NON_OPERATIONAL, non_operationality_reason::LOGIC_MISMATCH}; + assessment_results.status = operational_status::NON_OPERATIONAL; + + if (parameters.termination_cond == + is_operational_params::termination_condition::ON_FIRST_NON_OPERATIONAL) + { + return {assessment_results, non_operationality_reason::LOGIC_MISMATCH}; + } + + // all input combinations are assessed + + assessment_results_for_this_input_combination.status = operational_status::NON_OPERATIONAL; + + assessment_results_per_input.push_back(std::move(assessment_results_for_this_input_combination)); + + continue; } - ++stats.simulator_invocations; + ++assessment_results.simulator_invocations; // performs physical simulation of a given SiDB layout at a given input combination const auto simulation_results = physical_simulation_of_layout(bii); @@ -440,7 +509,23 @@ class is_operational_impl // if no physically valid charge distributions were found, the layout is non-operational if (simulation_results.charge_distributions.empty()) { - return {operational_status::NON_OPERATIONAL, non_operationality_reason::LOGIC_MISMATCH}; + assessment_results.status = operational_status::NON_OPERATIONAL; + + if (parameters.termination_cond == + is_operational_params::termination_condition::ON_FIRST_NON_OPERATIONAL) + { + return {assessment_results, non_operationality_reason::LOGIC_MISMATCH}; + } + + // all input combinations are assessed + + assessment_results_for_this_input_combination.status = operational_status::NON_OPERATIONAL; + + assessment_results_for_this_input_combination.simulation_results.emplace(); + + assessment_results_per_input.push_back(std::move(assessment_results_for_this_input_combination)); + + continue; } const auto ground_states = groundstate_from_simulation_result(simulation_results); @@ -449,43 +534,64 @@ class is_operational_impl { const auto [op_status, non_op_reason] = verify_logic_match_of_cds(gs, i); - if (op_status == operational_status::NON_OPERATIONAL && - non_op_reason == non_operationality_reason::LOGIC_MISMATCH) + if (op_status == operational_status::OPERATIONAL) { - return {operational_status::NON_OPERATIONAL, non_operationality_reason::LOGIC_MISMATCH}; + continue; } - if (op_status == operational_status::NON_OPERATIONAL && - non_op_reason == non_operationality_reason::KINKS && - parameters.op_condition == is_operational_params::operational_condition::REJECT_KINKS) + // op_status == operation_status::NON_OPERATIONAL + + assessment_results.status = operational_status::NON_OPERATIONAL; + + if (parameters.termination_cond == + is_operational_params::termination_condition::ON_FIRST_NON_OPERATIONAL) { - at_least_one_layout_is_kink_induced_non_operational = true; + if (non_op_reason == non_operationality_reason::LOGIC_MISMATCH) + { + return {assessment_results, non_operationality_reason::LOGIC_MISMATCH}; + } + + if (non_op_reason == non_operationality_reason::KINKS && + parameters.op_condition == is_operational_params::operational_condition::REJECT_KINKS) + { + return {assessment_results, non_operationality_reason::KINKS}; + } } + + // all input combinations are assessed + + assessment_results_for_this_input_combination.status = operational_status::NON_OPERATIONAL; } - // save simulation results when the simulation result retention is set to - // `simulation_results_mode::KEEP_SIMULATION_RESULTS` - if (parameters.simulation_results_retention == - is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) + // store the assessment results for this input combination when the termination condition is set to + // `termination_condition::ALL_INPUT_COMBINATION_ASSESSED` + if (parameters.termination_cond == + is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED) { - sim_res_per_input.emplace_back(std::move(simulation_results.charge_distributions)); - } - } + // save simulation results when the simulation result retention is set to + // `simulation_results_mode::KEEP_SIMULATION_RESULTS` + if (parameters.simulation_results_retention == + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) + { + assessment_results_for_this_input_combination.simulation_results = + std::move(simulation_results.charge_distributions); + } - if (at_least_one_layout_is_kink_induced_non_operational) - { - return {operational_status::NON_OPERATIONAL, non_operationality_reason::KINKS}; + assessment_results_per_input.push_back(std::move(assessment_results_for_this_input_combination)); + } } - // only when the layout is operational, the simulation results may be kept - if (parameters.simulation_results_retention == - is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) + // store the assessment results for all input combinations when the termination condition is set to + // `termination_condition::ALL_INPUT_COMBINATION_ASSESSED` + if (parameters.termination_cond == + is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED) { - stats.simulation_results.emplace(std::move(sim_res_per_input)); + assessment_results.assessment_per_input = std::move(assessment_results_per_input); } - // if we made it here, the layout is operational - return {operational_status::OPERATIONAL, non_operationality_reason::NONE}; + // note: when all input combinations are assessed per termination condition, the assessment can yield the layout + // is non-operational, yet we do not give a reason + return {assessment_results, non_operationality_reason::NONE}; } /** * Checks if the given charge distribution correctly encodes the expected logic for the given input pattern, @@ -584,14 +690,12 @@ class is_operational_impl assert((truth_table.size() == output_bdl_wires.size()) && "Number of truth tables and output BDL pairs does not match"); - std::vector> + std::vector> non_operational_input_pattern_and_non_operationality_reason{}; // number of different input combinations for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { - ++stats.simulator_invocations; - // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) { @@ -622,16 +726,6 @@ class is_operational_impl // if we made it here, the layout is operational return non_operational_input_pattern_and_non_operationality_reason; } - /** - * Returns auxiliary results from the operational status assessment, including the number of simulator invocations. - * - * @return Auxiliary results from the operational status assessment. - */ - [[nodiscard]] operational_status_assessment_stats get_operational_status_assessment_stats() const noexcept - { - return stats; - } - /** * This function determines if there is a charge distribution of the canvas SiDBs for which the charge distribution * of the whole layout is physically valid. @@ -675,8 +769,7 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) - { + [&cds_layout, &cds_canvas_copy](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -956,10 +1049,6 @@ class is_operational_impl * Output BDL wires. */ std::vector> output_bdl_wires; - /** - * Auxiliary results from the operational status assessment, including the number of simulator invocations. - */ - operational_status_assessment_stats stats; /** * Number of output BDL wires. */ @@ -1149,8 +1238,8 @@ class is_operational_impl * with auxiliary statistics. */ template -[[nodiscard]] std::pair> -is_operational(const Lyt& lyt, const std::vector& spec, const is_operational_params& params = {}) noexcept +[[nodiscard]] operational_assessment is_operational(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -1166,9 +1255,9 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational detail::is_operational_impl p{lyt, spec, params}; - const auto [status, _] = p.run(); + const auto [assessment_result, _] = p.run(); - return {status, p.get_operational_status_assessment_stats()}; + return assessment_result; } /** * Determine the operational status of an SiDB layout. @@ -1189,7 +1278,7 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational * with auxiliary statistics. */ template -[[nodiscard]] std::pair> +[[nodiscard]] operational_assessment is_operational(const Lyt& lyt, const std::vector& spec, const is_operational_params& params, const std::vector>& input_bdl_wire, const std::vector>& output_bdl_wire, const std::optional& canvas_lyt = std::nullopt) noexcept @@ -1210,14 +1299,12 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational { detail::is_operational_impl p{lyt, spec, params, input_bdl_wire, output_bdl_wire, canvas_lyt.value()}; - const auto [status, _] = p.run(); + const auto [assessment_result, _] = p.run(); - return {status, p.get_operational_status_assessment_stats()}; + return assessment_result; } - const auto logic_cells = lyt.get_cells_by_type(technology::cell_type::LOGIC); - - if (!logic_cells.empty()) + if (const auto logic_cells = lyt.get_cells_by_type(technology::cell_type::LOGIC); !logic_cells.empty()) { Lyt c_lyt{}; @@ -1228,16 +1315,16 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational detail::is_operational_impl p{lyt, spec, params, input_bdl_wire, output_bdl_wire, c_lyt}; - const auto [status, _] = p.run(); + const auto [assessment_result, _] = p.run(); - return {status, p.get_operational_status_assessment_stats()}; + return assessment_result; } detail::is_operational_impl p{lyt, spec, params, input_bdl_wire, output_bdl_wire}; - const auto [status, _] = p.run(); + const auto [assessment_result, _] = p.run(); - return {status, p.get_operational_status_assessment_stats()}; + return assessment_result; } /** * This function determines the input combinations for which the layout is operational. @@ -1246,7 +1333,7 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational * @tparam TT Type of the truth table. * @param lyt The SiDB layout. * @param spec Vector of truth table specifications. - * @param params Parameters to simulate if a input combination is operational. + * @param params Parameters to simulate if an input combination is operational. * @return The count of operational input combinations. */ template @@ -1525,9 +1612,9 @@ template detail::is_operational_impl p{lyt, spec, params_with_rejecting_kinks}; - const auto [op_status, non_op_reason] = p.run(); + const auto [assessment_result, non_op_reason] = p.run(); - return op_status == operational_status::NON_OPERATIONAL && + return assessment_result.status == operational_status::NON_OPERATIONAL && non_op_reason == detail::non_operationality_reason::KINKS; } @@ -1576,17 +1663,17 @@ template detail::is_operational_impl p{ lyt, spec, params_with_rejecting_kinks, input_bdl_wire, output_bdl_wire, canvas_lyt.value()}; - const auto [op_status, non_op_reason] = p.run(); + const auto [assessment_result, non_op_reason] = p.run(); - return op_status == operational_status::NON_OPERATIONAL && + return assessment_result.status == operational_status::NON_OPERATIONAL && non_op_reason == detail::non_operationality_reason::KINKS; } detail::is_operational_impl p{lyt, spec, params_with_rejecting_kinks, input_bdl_wire, output_bdl_wire}; - const auto [op_status, non_op_reason] = p.run(); + const auto [assessment_result, non_op_reason] = p.run(); - return op_status == operational_status::NON_OPERATIONAL && + return assessment_result.status == operational_status::NON_OPERATIONAL && non_op_reason == detail::non_operationality_reason::KINKS; } /** diff --git a/test/algorithms/simulation/sidb/is_operational.cpp b/test/algorithms/simulation/sidb/is_operational.cpp index d96231430..3249c9f7d 100644 --- a/test/algorithms/simulation/sidb/is_operational.cpp +++ b/test/algorithms/simulation/sidb/is_operational.cpp @@ -38,23 +38,56 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, is_operational_params::operational_condition::TOLERATE_KINKS, {}, + is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED, is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS}; - SECTION("determine if layout is operational, tolerate kinks and keep simulation results") + SECTION( + "determine if layout is operational, tolerate kinks, assess all input combinations and keep simulation results") { - const auto [op_status, aux_stats] = is_operational(lat, std::vector{create_or_tt()}, op_params); - CHECK(op_status == operational_status::OPERATIONAL); - CHECK(aux_stats.simulation_results.has_value()); + const auto assessment_results = is_operational(lat, std::vector{create_or_tt()}, op_params); + CHECK(assessment_results.status == operational_status::OPERATIONAL); + REQUIRE(assessment_results.assessment_per_input.has_value()); + REQUIRE(!assessment_results.assessment_per_input.value().empty()); + CHECK(assessment_results.assessment_per_input.value().front().simulation_results.has_value()); } // from now on, we will discard simulation results op_params.simulation_results_retention = is_operational_params::simulation_results_mode::DISCARD_SIMULATION_RESULTS; - SECTION("determine if layout is operational, tolerate kinks and discard simulation results") + SECTION("determine if layout is operational, tolerate kinks, assess all input combinations and discard simulation " + "results") { - const auto [op_status, aux_stats] = is_operational(lat, std::vector{create_or_tt()}, op_params); - CHECK(op_status == operational_status::OPERATIONAL); - CHECK(!aux_stats.simulation_results.has_value()); + const auto assessment_results = is_operational(lat, std::vector{create_or_tt()}, op_params); + CHECK(assessment_results.status == operational_status::OPERATIONAL); + REQUIRE(assessment_results.assessment_per_input.has_value()); + REQUIRE(assessment_results.assessment_per_input.value().size() == 4); + CHECK(assessment_results.assessment_per_input.value().at(0).status == operational_status::OPERATIONAL); + CHECK(!assessment_results.assessment_per_input.value().at(0).simulation_results.has_value()); + CHECK(assessment_results.assessment_per_input.value().at(1).status == operational_status::OPERATIONAL); + CHECK(!assessment_results.assessment_per_input.value().at(1).simulation_results.has_value()); + CHECK(assessment_results.assessment_per_input.value().at(2).status == operational_status::OPERATIONAL); + CHECK(!assessment_results.assessment_per_input.value().at(2).simulation_results.has_value()); + CHECK(assessment_results.assessment_per_input.value().at(3).status == operational_status::OPERATIONAL); + CHECK(!assessment_results.assessment_per_input.value().at(3).simulation_results.has_value()); + + const auto assessment_results_and = is_operational(lat, std::vector{create_and_tt()}, op_params); + CHECK(assessment_results_and.status == operational_status::NON_OPERATIONAL); + REQUIRE(assessment_results_and.assessment_per_input.has_value()); + REQUIRE(assessment_results_and.assessment_per_input.value().size() == 4); + CHECK(assessment_results_and.assessment_per_input.value().at(0).status == operational_status::OPERATIONAL); + CHECK(assessment_results_and.assessment_per_input.value().at(1).status == operational_status::NON_OPERATIONAL); + CHECK(assessment_results_and.assessment_per_input.value().at(2).status == operational_status::NON_OPERATIONAL); + CHECK(assessment_results_and.assessment_per_input.value().at(3).status == operational_status::OPERATIONAL); + } + + // from now on, we will terminate when the first non-operational input combination is found + op_params.termination_cond = is_operational_params::termination_condition::ON_FIRST_NON_OPERATIONAL; + + SECTION("determine if layout is operational, tolerate kinks and terminate on first non-operational assessment") + { + const auto assessment_results = is_operational(lat, std::vector{create_or_tt()}, op_params); + CHECK(assessment_results.status == operational_status::OPERATIONAL); + CHECK(!assessment_results.assessment_per_input.has_value()); } // from now on, we will reject kinks @@ -62,7 +95,7 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") SECTION("determine if layout is operational, reject kinks") { - CHECK(is_operational(lat, std::vector{create_and_tt()}, op_params).first == + CHECK(is_operational(lat, std::vector{create_and_tt()}, op_params).status == operational_status::NON_OPERATIONAL); } @@ -85,7 +118,7 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") SECTION("use pre-determined I/O pins") { - CHECK(is_operational(lat, std::vector{create_and_tt()}, op_params, input_wires, output_wires).first == + CHECK(is_operational(lat, std::vector{create_and_tt()}, op_params, input_wires, output_wires).status == operational_status::NON_OPERATIONAL); } @@ -103,7 +136,8 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") CHECK(kink_induced_non_operational_input_pattern.size() == 1); op_params.op_condition = is_operational_params::operational_condition::TOLERATE_KINKS; - CHECK(is_operational(lat, std::vector{create_or_tt()}, op_params).first == operational_status::OPERATIONAL); + CHECK(is_operational(lat, std::vector{create_or_tt()}, op_params).status == + operational_status::OPERATIONAL); } } @@ -122,14 +156,14 @@ TEST_CASE("SiQAD NAND gate", "[is-operational]") SECTION("Pruning and simulation") { - CHECK(is_operational(lat, std::vector{create_nand_tt()}, op_params).first == + CHECK(is_operational(lat, std::vector{create_nand_tt()}, op_params).status == operational_status::OPERATIONAL); } SECTION("only pruning") { op_params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_ONLY; - CHECK(is_operational(lat, std::vector{create_nand_tt()}, op_params).first == + CHECK(is_operational(lat, std::vector{create_nand_tt()}, op_params).status == operational_status::OPERATIONAL); } @@ -144,7 +178,7 @@ TEST_CASE("SiQAD NAND gate", "[is-operational]") { CHECK(is_operational(lat, std::vector{create_nand_tt()}, op_params, input_wires, output_wires, std::optional{canvas_lyt}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); } } @@ -175,10 +209,10 @@ TEST_CASE("SiQAD's AND gate with input BDL pairs of different size", "[is-operat CHECK(is_operational(lat, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.28}}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational(lat, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.1}}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } TEST_CASE("Bestagon FO2 gate", "[is-operational]") @@ -190,11 +224,11 @@ TEST_CASE("Bestagon FO2 gate", "[is-operational]") CHECK(is_operational( lyt, std::vector{create_fan_out_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational( lyt, std::vector{create_fan_out_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } SECTION("using QuickSim") @@ -202,11 +236,11 @@ TEST_CASE("Bestagon FO2 gate", "[is-operational]") CHECK(is_operational( lyt, std::vector{create_fan_out_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKSIM}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational( lyt, std::vector{create_fan_out_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKSIM}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } #if (FICTION_ALGLIB_ENABLED) @@ -216,11 +250,11 @@ TEST_CASE("Bestagon FO2 gate", "[is-operational]") CHECK(is_operational( lyt, std::vector{create_fan_out_tt()}, is_operational_params{sidb_simulation_parameters{3, -0.32}, sidb_simulation_engine::CLUSTERCOMPLETE}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational( lyt, std::vector{create_fan_out_tt()}, is_operational_params{sidb_simulation_parameters{3, -0.30}, sidb_simulation_engine::CLUSTERCOMPLETE}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } #endif // FICTION_ALGLIB_ENABLED @@ -237,11 +271,11 @@ TEST_CASE("Bestagon CROSSING gate", "[is-operational]") CHECK( is_operational(lat, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK( is_operational(lat, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } TEST_CASE("Bestagon AND gate", "[is-operational]") @@ -257,11 +291,11 @@ TEST_CASE("Bestagon AND gate", "[is-operational]") CHECK(is_operational( lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational( lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } SECTION("With defects") { @@ -269,30 +303,30 @@ TEST_CASE("Bestagon AND gate", "[is-operational]") sidb_defect{sidb_defect_type::UNKNOWN, -1, params.epsilon_r, params.lambda_tf}); CHECK(is_operational(lyt, std::vector{create_and_tt()}, is_operational_params{params, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); // move defect one to the right lyt.move_sidb_defect({3, 16, 1}, {4, 16, 1}); CHECK(is_operational(lyt, std::vector{create_and_tt()}, is_operational_params{params, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); // move defect one to the right lyt.move_sidb_defect({4, 16, 1}, {5, 16, 1}); CHECK(is_operational(lyt, std::vector{create_and_tt()}, is_operational_params{params, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } SECTION("Check operation for different values of mu") { CHECK(is_operational( lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational( lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } SECTION("Count the number of non-operational input combinations, accepting kinks") { @@ -334,7 +368,7 @@ TEST_CASE("Not working diagonal Wire", "[is-operational]") CHECK( is_operational(lat, std::vector{create_id_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } TEMPLATE_TEST_CASE("AND gate on the H-Si(111)-1x1 surface", "[is-operational]", sidb_111_cell_clk_lyt_siqad, @@ -381,7 +415,7 @@ TEST_CASE( { CHECK(is_operational(lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); } SECTION("reject kink states") { @@ -389,7 +423,7 @@ TEST_CASE( is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } SECTION("check if is_kink_induced_non_operational returns true") { @@ -441,7 +475,7 @@ TEST_CASE("BDL wire", "[is-operational]") const is_operational_params params{sim_params}; - CHECK(is_operational(lyt, std::vector{create_id_tt()}, params).first == operational_status::OPERATIONAL); + CHECK(is_operational(lyt, std::vector{create_id_tt()}, params).status == operational_status::OPERATIONAL); } TEST_CASE("Special wire that cannot be pruned, but is non-operational when kinks are rejected", "[is-operational]") @@ -483,7 +517,7 @@ TEST_CASE("Special wire that cannot be pruned, but is non-operational when kinks params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION; - CHECK(is_operational(lyt, std::vector{create_id_tt()}, params).first == + CHECK(is_operational(lyt, std::vector{create_id_tt()}, params).status == operational_status::NON_OPERATIONAL); } @@ -493,7 +527,7 @@ TEST_CASE("Special wire that cannot be pruned, but is non-operational when kinks params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_ONLY; - CHECK(is_operational(lyt, std::vector{create_id_tt()}, params).first == + CHECK(is_operational(lyt, std::vector{create_id_tt()}, params).status == operational_status::NON_OPERATIONAL); } } @@ -508,7 +542,7 @@ TEST_CASE("flipped CX bestagon gate", "[is-operational]") is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); const auto kink_induced_non_operational_input_pattern = kink_induced_non_operational_input_patterns( lyt, create_crossing_wire_tt(), @@ -538,11 +572,11 @@ TEST_CASE("is operational check for Bestagon CX gate", "[is-operational], [quali CHECK(is_operational( lat, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational( lat, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } SECTION("using predetermined wires") @@ -554,12 +588,12 @@ TEST_CASE("is operational check for Bestagon CX gate", "[is-operational], [quali lat, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, input_bdl_wires, output_bdl_wires) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK(is_operational( lat, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}, input_bdl_wires, output_bdl_wires) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); CHECK(!is_kink_induced_non_operational( lat, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}, @@ -575,7 +609,7 @@ TEST_CASE("is operational check for Bestagon CX gate", "[is-operational], [quali op_params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_ONLY; - CHECK(is_operational(lat, create_crossing_wire_tt(), op_params, input_bdl_wires, output_bdl_wires).first == + CHECK(is_operational(lat, create_crossing_wire_tt(), op_params, input_bdl_wires, output_bdl_wires).status == operational_status::OPERATIONAL); } } @@ -591,11 +625,11 @@ TEST_CASE("is operational check for Bestagon double wire", "[is-operational], [q CHECK( is_operational(lat, create_double_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK( is_operational(lat, create_double_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.30}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } TEST_CASE("is operational check for Bestagon half adder", "[is-operational], [quality]") @@ -609,10 +643,10 @@ TEST_CASE("is operational check for Bestagon half adder", "[is-operational], [qu CHECK( is_operational(lat, create_half_adder_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::OPERATIONAL); + .status == operational_status::OPERATIONAL); CHECK( is_operational(lat, create_half_adder_tt(), is_operational_params{sidb_simulation_parameters{2, -0.25}, sidb_simulation_engine::QUICKEXACT}) - .first == operational_status::NON_OPERATIONAL); + .status == operational_status::NON_OPERATIONAL); } #endif From c5f84791a4cf5e0579009ebc9bd770c19bddb014 Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Fri, 7 Feb 2025 14:17:02 +0000 Subject: [PATCH 047/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 132 ++++++++++++++---- 1 file changed, 105 insertions(+), 27 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 27f5c5344..5fdcd4549 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -3017,6 +3017,26 @@ Parameter ``n``: Returns: Columnar clocking scheme.)doc"; +static const char *__doc_fiction_compare_by_average_ground_state_isolation = R"doc()doc"; + +static const char *__doc_fiction_compare_by_average_ground_state_isolation_average_ground_state_isolation_over_all_inputs = R"doc()doc"; + +static const char *__doc_fiction_compare_by_average_ground_state_isolation_compare_by_average_ground_state_isolation = R"doc()doc"; + +static const char *__doc_fiction_compare_by_average_ground_state_isolation_equals = R"doc()doc"; + +static const char *__doc_fiction_compare_by_average_ground_state_isolation_operator_call = R"doc()doc"; + +static const char *__doc_fiction_compare_by_minimum_ground_state_isolation = R"doc()doc"; + +static const char *__doc_fiction_compare_by_minimum_ground_state_isolation_compare_by_minimum_ground_state_isolation = R"doc()doc"; + +static const char *__doc_fiction_compare_by_minimum_ground_state_isolation_equals = R"doc()doc"; + +static const char *__doc_fiction_compare_by_minimum_ground_state_isolation_minimum_ground_state_isolation_over_all_inputs = R"doc()doc"; + +static const char *__doc_fiction_compare_by_minimum_ground_state_isolation_operator_call = R"doc()doc"; + static const char *__doc_fiction_convert_array = R"doc(Converts an array of size `N` and type `T` to an array of size `N` and type `ElementType` by applying `static_cast` at compile time. @@ -4373,6 +4393,34 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_designed_sidb_gates_comparator = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_designed_sidb_gates_comparator_2 = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_equals = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_operator_assign = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_operator_assign_2 = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_operator_call = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_sensitivity = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_sidb_gate_design = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_sidb_gate_design_gate_design = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_comparator_sidb_gate_design_simulation_results_per_input = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_gate_layouts = R"doc()doc"; + +static const char *__doc_fiction_designed_sidb_gates_simulation_results = R"doc()doc"; + static const char *__doc_fiction_detail_a_star_impl = R"doc()doc"; static const char *__doc_fiction_detail_a_star_impl_a_star_impl = R"doc()doc"; @@ -7145,6 +7193,8 @@ static const char *__doc_fiction_detail_generate_edge_intersection_graph_impl_ps static const char *__doc_fiction_detail_generate_edge_intersection_graph_impl_run = R"doc()doc"; +static const char *__doc_fiction_detail_get_ground_state_isolation = R"doc()doc"; + static const char *__doc_fiction_detail_get_offset = R"doc(Utility function to calculate the offset that has to be subtracted from any x-coordinate on the hexagonal layout. @@ -8131,13 +8181,6 @@ Parameter ``bdl``: Returns: `true` if `0` is encoded, `false` otherwise.)doc"; -static const char *__doc_fiction_detail_is_operational_impl_get_operational_status_assessment_stats = -R"doc(Returns auxiliary results from the operational status assessment, -including the number of simulator invocations. - -Returns: - Auxiliary results from the operational status assessment.)doc"; - static const char *__doc_fiction_detail_is_operational_impl_input_bdl_wires = R"doc(Input BDL wires.)doc"; static const char *__doc_fiction_detail_is_operational_impl_is_io_signal_unstable = @@ -8189,7 +8232,7 @@ R"doc(Constructor to initialize the algorithm with a layout and parameters. Parameter ``lyt``: The SiDB cell-level layout to be checked. -Parameter ``spec``: +Parameter ``tt``: Expected Boolean function of the layout given as a multi-output truth table. @@ -8228,7 +8271,7 @@ input and output wires, and a canvas layout. Parameter ``lyt``: The SiDB cell-level layout to be checked. -Parameter ``spec``: +Parameter ``tt``: Expected Boolean function of the layout given as a multi-output truth table. @@ -8329,10 +8372,6 @@ Parameter ``output_wire_index``: The index representing the current input pattern of the output wire.)doc"; -static const char *__doc_fiction_detail_is_operational_impl_stats = -R"doc(Auxiliary results from the operational status assessment, including -the number of simulator invocations.)doc"; - static const char *__doc_fiction_detail_is_operational_impl_truth_table = R"doc(The specification of the layout.)doc"; static const char *__doc_fiction_detail_is_operational_impl_verify_logic_match_of_cds = @@ -15602,6 +15641,21 @@ static const char *__doc_fiction_is_operational_params_strategy_to_analyze_opera R"doc(Strategy to determine whether a layout is operational or non- operational.)doc"; +static const char *__doc_fiction_is_operational_params_termination_cond = +R"doc(Condition to decide when to terminate the assessment of the +operational status of the given layout.)doc"; + +static const char *__doc_fiction_is_operational_params_termination_condition = +R"doc(The termination condition for assessment of the operational status of +the given layout.)doc"; + +static const char *__doc_fiction_is_operational_params_termination_condition_ALL_INPUT_COMBINATIONS_ASSESSED = R"doc(The operational status is assessed for all input combinations.)doc"; + +static const char *__doc_fiction_is_operational_params_termination_condition_ON_FIRST_NON_OPERATIONAL = +R"doc(The assessment for the given layout terminates either when it is found +to be operational for all input combinations, or an input combination +is found for which the layout is not operational.)doc"; + static const char *__doc_fiction_is_positively_charged_defect = R"doc(Checks whether the given defect has a positive charge value assigned to it. This function is irrespective of the associated defect type. @@ -16423,6 +16477,42 @@ Parameter ``n``: Returns: Irregular clocking scheme.)doc"; +static const char *__doc_fiction_operational_assessment = +R"doc(This struct is used to collect results from the operational status +assessment. + +Template parameter ``Lyt``: + SiDB cell-level layout type.)doc"; + +static const char *__doc_fiction_operational_assessment_assessment_per_input = +R"doc(When the termination condition is set to +`ALL_INPUT_COMBINATIONS_ASSESSED`, the operational status for each +respective input combination is stored here, sorted by their binary +representation.)doc"; + +static const char *__doc_fiction_operational_assessment_operational_assessment = R"doc(Standard constructor that only sets the operational status.)doc"; + +static const char *__doc_fiction_operational_assessment_operational_assessment_for_input = +R"doc(This struct collects the information for a specific input combination +that was obtained during the assessment.)doc"; + +static const char *__doc_fiction_operational_assessment_operational_assessment_for_input_operational_assessment_for_input = R"doc(Standard constructor that only sets the operational status.)doc"; + +static const char *__doc_fiction_operational_assessment_operational_assessment_for_input_simulation_results = +R"doc(The charge distributions obtained for one input combination that was +tested.)doc"; + +static const char *__doc_fiction_operational_assessment_operational_assessment_for_input_status = +R"doc(The assessed operational status of the given layout under one input +combination.)doc"; + +static const char *__doc_fiction_operational_assessment_simulator_invocations = R"doc(The number of input combinations tested.)doc"; + +static const char *__doc_fiction_operational_assessment_status = +R"doc(The assessed operational status of the given layout. The status +`OPERATIONAL` is given if and only the layout is operational under all +input combinations.)doc"; + static const char *__doc_fiction_operational_domain = R"doc(An operational domain is a set of simulation parameter values for which a given SiDB layout is logically operational. This means that a @@ -16791,7 +16881,7 @@ Parameter ``spec``: Vector of truth table specifications. Parameter ``params``: - Parameters to simulate if a input combination is operational. + Parameters to simulate if an input combination is operational. Returns: The count of operational input combinations.)doc"; @@ -16833,19 +16923,7 @@ static const char *__doc_fiction_operational_status_NON_OPERATIONAL = R"doc(The static const char *__doc_fiction_operational_status_OPERATIONAL = R"doc(The layout is operational.)doc"; -static const char *__doc_fiction_operational_status_assessment_stats = -R"doc(This struct is used to collect auxiliary results from the operational -status assessment. - -Template parameter ``Lyt``: - SiDB cell-level layout type.)doc"; - -static const char *__doc_fiction_operational_status_assessment_stats_simulation_results = -R"doc(The charge distributions obtained for each input combination tested, -sorted by the binary representation of the respectively associated -input combinations.)doc"; - -static const char *__doc_fiction_operational_status_assessment_stats_simulator_invocations = R"doc(The number of input combinations tested.)doc"; +static const char *__doc_fiction_order_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_orthogonal = R"doc(A scalable placement & routing approach based on orthogonal graph From dd4b476075941a7994623648afe899527a6e4e96 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Fri, 7 Feb 2025 14:17:14 +0000 Subject: [PATCH 048/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../compare_designed_sidb_gates.hpp | 2 +- .../sidb/compare_by_ground_state_isolation.hpp | 18 ++++++++++-------- .../simulation/sidb/is_operational.hpp | 6 ++++-- 3 files changed, 15 insertions(+), 11 deletions(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index 6ba5bd1fa..587d1551f 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -38,7 +38,7 @@ class designed_sidb_gates_comparator typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; }; - designed_sidb_gates_comparator() = delete; + designed_sidb_gates_comparator() = delete; virtual ~designed_sidb_gates_comparator() = default; designed_sidb_gates_comparator& operator=(const designed_sidb_gates_comparator& other) noexcept = default; diff --git a/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp b/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp index 4733ce047..e1cce1442 100644 --- a/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp +++ b/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp @@ -49,8 +49,8 @@ class compare_by_minimum_ground_state_isolation final : public designed_sidb_gat public: using typename designed_sidb_gates_comparator::sidb_gate_design; - explicit - compare_by_minimum_ground_state_isolation(const double sens = std::numeric_limits::epsilon()) noexcept : + explicit compare_by_minimum_ground_state_isolation( + const double sens = std::numeric_limits::epsilon()) noexcept : designed_sidb_gates_comparator{sens} {} @@ -67,14 +67,15 @@ class compare_by_minimum_ground_state_isolation final : public designed_sidb_gat } private: - [[nodiscard]] double minimum_ground_state_isolation_over_all_inputs(const sidb_gate_design& gate_design) const noexcept + [[nodiscard]] double + minimum_ground_state_isolation_over_all_inputs(const sidb_gate_design& gate_design) const noexcept { std::vector ground_state_isolations{}; ground_state_isolations.reserve(gate_design.simulation_results_per_input.size()); std::transform(gate_design.simulation_results_per_input.cbegin(), gate_design.simulation_results_per_input.cend(), std::back_inserter(ground_state_isolations), - [](const auto& sim_res) { return detail::get_ground_state_isolation(sim_res);}); + [](const auto& sim_res) { return detail::get_ground_state_isolation(sim_res); }); return *std::min_element(ground_state_isolations.cbegin(), ground_state_isolations.cend()); } @@ -86,8 +87,8 @@ class compare_by_average_ground_state_isolation final : public designed_sidb_gat public: using typename designed_sidb_gates_comparator::sidb_gate_design; - explicit - compare_by_average_ground_state_isolation(const double sens = std::numeric_limits::epsilon()) noexcept : + explicit compare_by_average_ground_state_isolation( + const double sens = std::numeric_limits::epsilon()) noexcept : designed_sidb_gates_comparator{sens} {} @@ -104,7 +105,8 @@ class compare_by_average_ground_state_isolation final : public designed_sidb_gat } private: - [[nodiscard]] double average_ground_state_isolation_over_all_inputs(const sidb_gate_design& gate_design) const noexcept + [[nodiscard]] double + average_ground_state_isolation_over_all_inputs(const sidb_gate_design& gate_design) const noexcept { uint64_t count = 0; @@ -232,4 +234,4 @@ class compare_by_average_ground_state_isolation final : public designed_sidb_gat // { // designed_gate_layouts.emplace_back(pair.first); // } -// } \ No newline at end of file +// } diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 8463f4640..3b9289457 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -479,7 +479,8 @@ class is_operational_impl for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { typename operational_assessment::operational_assessment_for_input - assessment_results_for_this_input_combination{operational_status::OPERATIONAL};; + assessment_results_for_this_input_combination{operational_status::OPERATIONAL}; + ; // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) @@ -769,7 +770,8 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) { + [&cds_layout, &cds_canvas_copy](const auto& c) + { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); From 9b8abbbc485f6654e922b7630d6c752203881e61 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 10:11:14 +0100 Subject: [PATCH 049/138] :bug: Simulation results can now be retained for operational gates without necessarily assessing all input combinations for non-operational gates --- .../simulation/sidb/is_operational.hpp | 20 ++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 3b9289457..f3c6b1c98 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -155,7 +155,8 @@ struct is_operational_params /** * Simulation results that are used to certify the status `OPERATIONAL` are not kept by default. */ - simulation_results_mode simulation_results_retention = simulation_results_mode::DISCARD_SIMULATION_RESULTS; + simulation_results_mode simulation_results_retention = + simulation_results_mode::DISCARD_SIMULATION_RESULTS; // TODO retain + term early }; /** @@ -565,9 +566,12 @@ class is_operational_impl } // store the assessment results for this input combination when the termination condition is set to - // `termination_condition::ALL_INPUT_COMBINATION_ASSESSED` + // `termination_condition::ALL_INPUT_COMBINATION_ASSESSED` or the simulation result retention is set to + // `simulation_results_mode::KEEP_SIMULATION_RESULTS` if (parameters.termination_cond == - is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED) + is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED || + parameters.simulation_results_retention == + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) { // save simulation results when the simulation result retention is set to // `simulation_results_mode::KEEP_SIMULATION_RESULTS` @@ -583,9 +587,12 @@ class is_operational_impl } // store the assessment results for all input combinations when the termination condition is set to - // `termination_condition::ALL_INPUT_COMBINATION_ASSESSED` + // `termination_condition::ALL_INPUT_COMBINATION_ASSESSED` or the simulation result retention is set to + // `simulation_results_mode::KEEP_SIMULATION_RESULTS` if (parameters.termination_cond == - is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED) + is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED || + parameters.simulation_results_retention == + is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS) { assessment_results.assessment_per_input = std::move(assessment_results_per_input); } @@ -770,8 +777,7 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) - { + [&cds_layout, &cds_canvas_copy](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); From f28ffbf640c29359f8b4be48498155b78b906060 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 10:37:12 +0100 Subject: [PATCH 050/138] :art: Updated `design_sidb_gates` to work with the new changes to `is_operational` --- .../physical_design/design_sidb_gates.hpp | 18 ++++++------- .../simulation/sidb/is_operational.hpp | 25 ++++++++++++++++++- .../physical_design/design_sidb_gates.cpp | 10 ++++---- 3 files changed, 38 insertions(+), 15 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 96f0d6036..7bb09ef16 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -337,9 +337,9 @@ class design_sidb_gates_impl }); } - if (const auto [status, aux_stats] = is_operational( + if (const operational_assessment& assessment_results = is_operational( result_lyt, truth_table, params.operational_params, input_bdl_wires, output_bdl_wires); - status == operational_status::OPERATIONAL) + assessment_results.status == operational_status::OPERATIONAL) { const std::lock_guard lock{mutex_to_protect_designed_gate_layouts}; if constexpr (has_get_sidb_defect_v) @@ -453,9 +453,9 @@ class design_sidb_gates_impl &designed_gate_layouts, &solution_found](const auto& candidate) noexcept { - if (const auto [status, aux_stats] = is_operational(candidate, truth_table, params.operational_params, - input_bdl_wires, output_bdl_wires); - status == operational_status::OPERATIONAL) + if (const operational_assessment& assessment_results = is_operational( + candidate, truth_table, params.operational_params, input_bdl_wires, output_bdl_wires); + assessment_results.status == operational_status::OPERATIONAL) { { const std::lock_guard lock_vector{mutex_to_protect_designed_gate_layouts}; @@ -464,8 +464,8 @@ class design_sidb_gates_impl if (designed_gate_layouts.simulation_results.has_value()) { - designed_gate_layouts.simulation_results.value().emplace_back( - std::move(aux_stats.simulation_results.value())); + designed_gate_layouts.simulation_results.value().push_back( + assessment_results.extract_simulation_results_per_input()); } } @@ -690,8 +690,8 @@ class design_sidb_gates_impl return lyt; } /** - * This function makes sure that the underlying parameters for `is_operational` allow simulation results to be used - * when the given parameter set indicates the use for it. TODO + * This function makes sure that underlying parameters for `is_operational` are set according to the given + * parameters for `design_sidb_gates`. */ void set_operational_params_accordingly() noexcept { diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index f3c6b1c98..e3e11a545 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -196,13 +196,36 @@ struct operational_assessment operational_status status; /** * When the termination condition is set to `ALL_INPUT_COMBINATIONS_ASSESSED`, the operational status for each - * respective input combination is stored here, sorted by their binary representation. + * respective input combination is stored here, sorted by their binary representation. When the simulation retention + * is set to `KEEP_SIMULATION_RESULTS`, this optional structure is also populated. */ std::optional> assessment_per_input{}; /** * The number of input combinations tested. */ std::size_t simulator_invocations{0}; + /** + * Extracts the simulation results contained in this operational assessment through moves. + * + * @return A vector containing the simulation results for each respective input that was assessed. + */ + std::vector>> extract_simulation_results_per_input() const noexcept + { + assert(assessment_per_input.has_value() && "Assessment results per input are not present."); + assert(!assessment_per_input.value().empty() && "No input combinations were assessed."); + assert(assessment_per_input.value().front().simulation_results.has_value() && + "Simulation results were not retained during assessment."); + + std::vector>> simulation_results_per_input{}; + simulation_results_per_input.reserve(assessment_per_input.value().size()); + + for (operational_assessment_for_input assessment : assessment_per_input.value()) + { + simulation_results_per_input.push_back(std::move(assessment.simulation_results.value())); + } + + return simulation_results_per_input; + } }; namespace detail diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 0fcfb4b61..84ba04067 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -50,7 +50,7 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats); REQUIRE(found_gate_layouts.size() == 10); const auto& first_gate = found_gate_layouts.front(); - CHECK(is_operational(first_gate, std::vector{create_and_tt()}, params.operational_params).first == + CHECK(is_operational(first_gate, std::vector{create_and_tt()}, params.operational_params).status == operational_status::OPERATIONAL); CHECK(design_gates_stats.number_of_layouts == 1140); @@ -68,7 +68,7 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); REQUIRE(found_gate_layouts.size() == 10); const auto& first_gate = found_gate_layouts.front(); - CHECK(is_operational(first_gate, std::vector{create_and_tt()}, params.operational_params).first == + CHECK(is_operational(first_gate, std::vector{create_and_tt()}, params.operational_params).status == operational_status::OPERATIONAL); } } @@ -320,7 +320,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ REQUIRE(found_gate_layouts_exhaustive.size() == 1); const auto& first_gate_exhaustive = found_gate_layouts_exhaustive.front(); CHECK( - is_operational(first_gate_exhaustive, std::vector{create_and_tt()}, params.operational_params).first == + is_operational(first_gate_exhaustive, std::vector{create_and_tt()}, params.operational_params).status == operational_status::OPERATIONAL); CHECK(design_gates_stats_exhaustive.number_of_layouts == 1); @@ -330,7 +330,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats_quickcell); REQUIRE(found_gate_layouts_quickcell.size() == 1); const auto& first_gate_quickcell = found_gate_layouts_exhaustive.front(); - CHECK(is_operational(first_gate_quickcell, std::vector{create_and_tt()}, params.operational_params).first == + CHECK(is_operational(first_gate_quickcell, std::vector{create_and_tt()}, params.operational_params).status == operational_status::OPERATIONAL); CHECK(design_gates_stats_quickcell.number_of_layouts == 1); } @@ -667,7 +667,7 @@ TEST_CASE("Design AND gate with input left and output top-right with QuickCell ( const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); REQUIRE(found_gate_layouts.size() == 234); const auto& first_gate = found_gate_layouts.front(); - CHECK(is_operational(first_gate, std::vector{create_and_tt()}, params.operational_params).first == + CHECK(is_operational(first_gate, std::vector{create_and_tt()}, params.operational_params).status == operational_status::OPERATIONAL); } } From 7b3125f2c01b15e9ba53ab91f61eda55d32a8559 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 10:53:04 +0100 Subject: [PATCH 051/138] :art: Format --- test/algorithms/physical_design/design_sidb_gates.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 84ba04067..1d2dbdd05 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -330,8 +330,9 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats_quickcell); REQUIRE(found_gate_layouts_quickcell.size() == 1); const auto& first_gate_quickcell = found_gate_layouts_exhaustive.front(); - CHECK(is_operational(first_gate_quickcell, std::vector{create_and_tt()}, params.operational_params).status == - operational_status::OPERATIONAL); + CHECK( + is_operational(first_gate_quickcell, std::vector{create_and_tt()}, params.operational_params).status == + operational_status::OPERATIONAL); CHECK(design_gates_stats_quickcell.number_of_layouts == 1); } From 1a31304d11f02ca06be3d8598081269559bd3e63 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 11:27:19 +0100 Subject: [PATCH 052/138] :rotating_light: Fixed some compiler warnings and one-click Clang-Tidy suggestions --- .../fiction/algorithms/physical_design/exact.hpp | 2 +- .../fiction/technology/sidb_cluster_hierarchy.hpp | 5 +++-- include/fiction/utils/layout_utils.hpp | 14 ++++++-------- 3 files changed, 10 insertions(+), 11 deletions(-) diff --git a/include/fiction/algorithms/physical_design/exact.hpp b/include/fiction/algorithms/physical_design/exact.hpp index 12f5eb7dd..50dce2fb9 100644 --- a/include/fiction/algorithms/physical_design/exact.hpp +++ b/include/fiction/algorithms/physical_design/exact.hpp @@ -852,7 +852,7 @@ class exact_impl z3::expr_vector eq{*ctx}; for (int i = 1; static_cast(i) < v.size(); ++i) { - eq.push_back(v[static_cast(i - 1)] == v[static_cast(i)]); + eq.push_back(v[i - 1] == v[i]); } return z3::mk_and(eq); diff --git a/include/fiction/technology/sidb_cluster_hierarchy.hpp b/include/fiction/technology/sidb_cluster_hierarchy.hpp index 7b0cc6d70..64c22e19e 100644 --- a/include/fiction/technology/sidb_cluster_hierarchy.hpp +++ b/include/fiction/technology/sidb_cluster_hierarchy.hpp @@ -1155,7 +1155,7 @@ struct sidb_cluster * @param pst Projector state of which the corresponding compositions are requested. * @return The compositions associated with the multiset charge configuration of the projecting cluster. */ -[[nodiscard]] static const std::vector& +[[nodiscard]] static inline const std::vector& get_projector_state_compositions(const sidb_cluster_projector_state& pst) noexcept { return std::ref(pst.cluster->charge_space.find(sidb_cluster_charge_state{pst.multiset_conf})->compositions); @@ -1219,7 +1219,8 @@ to_unique_sidb_cluster(const uint64_t total_sidbs, const sidb_binary_cluster_hie * @param n A node from a binary cluster hierarchy, as for instance returned by parsing ALGLIB's result. * @return A uniquely identified node in a decorated cluster hierarchy that follows the "general tree" structure. */ -[[nodiscard]] static sidb_cluster_ptr to_sidb_cluster(const sidb_binary_cluster_hierarchy_node& n) noexcept +[[nodiscard]] [[maybe_unused]] static sidb_cluster_ptr +to_sidb_cluster(const sidb_binary_cluster_hierarchy_node& n) noexcept { uint64_t uid = n.c.size(); diff --git a/include/fiction/utils/layout_utils.hpp b/include/fiction/utils/layout_utils.hpp index 647ec6d8b..f2fa991e7 100644 --- a/include/fiction/utils/layout_utils.hpp +++ b/include/fiction/utils/layout_utils.hpp @@ -348,8 +348,7 @@ auto convert_layout_to_siqad_coordinates(const Lyt& lyt) noexcept { sidb_defect_surface lyt_surface{lyt_new}; lyt_orig.foreach_sidb_defect( - [&lyt_surface, &lyt_orig](const auto& cd) - { + [&lyt_surface, &lyt_orig](const auto& cd) { lyt_surface.assign_sidb_defect(siqad::to_siqad_coord(cd.first), lyt_orig.get_sidb_defect(cd.first)); }); return lyt_surface; @@ -457,8 +456,7 @@ template auto lyt_defect = sidb_defect_surface{lyt_new}; lyt.foreach_sidb_defect( - [&lyt_defect](const auto& cd) - { + [&lyt_defect](const auto& cd) { lyt_defect.assign_sidb_defect(siqad::to_fiction_coord>(cd.first), cd.second); }); @@ -632,10 +630,10 @@ all_coordinates_in_spanned_area(const CoordinateType& cell_first_corner, auto cell_first_corner_cube = siqad::to_fiction_coord(cell_first_corner); auto cell_second_corner_cube = siqad::to_fiction_coord(cell_second_corner); - cube::coord_t nw_cell{std::min(cell_first_corner_cube.x, cell_second_corner_cube.x), - std::min(cell_first_corner_cube.y, cell_second_corner_cube.y)}; - cube::coord_t se_cell{std::max(cell_first_corner_cube.x, cell_second_corner_cube.x), - std::max(cell_first_corner_cube.y, cell_second_corner_cube.y)}; + const cube::coord_t nw_cell{std::min(cell_first_corner_cube.x, cell_second_corner_cube.x), + std::min(cell_first_corner_cube.y, cell_second_corner_cube.y)}; + const cube::coord_t se_cell{std::max(cell_first_corner_cube.x, cell_second_corner_cube.x), + std::max(cell_first_corner_cube.y, cell_second_corner_cube.y)}; const auto total_cell_count = static_cast(std::abs(nw_cell.x - se_cell.x) + 1) * static_cast(std::abs(nw_cell.y - se_cell.y) + 1); From 7db9661a4eee4e2d74415a1946192f1128056463 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 11:29:50 +0100 Subject: [PATCH 053/138] :adhesive_bandage: Compatibility fixes w.r.t. the changes to `design_sidb_gates` and `is_operational` --- .../simulation/sidb/is_operational.hpp | 2 +- experiments/quickcell/quickcell_3_input.cpp | 4 ++-- .../quickcell_rectangular_gate_library.cpp | 4 ++-- ...ckcell_vs_automatic_exhaustive_2_input.cpp | 24 +++++++++---------- .../quicktrace_vs_grid_search_new_gates.cpp | 10 ++++---- .../critical_temperature_simulation_siqad.cpp | 4 ++-- .../simulation/sidb/defect_influence.hpp | 4 ++-- .../sidb/displacement_robustness_domain.hpp | 2 +- .../simulation/sidb/operational_domain.hpp | 8 +++---- 9 files changed, 31 insertions(+), 31 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index 67fa2d0cc..3215bffc4 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -96,7 +96,7 @@ void operational_status_assessment_stats(pybind11::module& m, const std::string& inline void is_operational(pybind11::module& m) { - namespace py = pybind11; + namespace py = pybind11; // TODO py::enum_(m, "operational_status", DOC(fiction_operational_status)) .value("OPERATIONAL", fiction::operational_status::OPERATIONAL, DOC(fiction_operational_status_OPERATIONAL)) diff --git a/experiments/quickcell/quickcell_3_input.cpp b/experiments/quickcell/quickcell_3_input.cpp index 971f66bc4..1ced1d203 100644 --- a/experiments/quickcell/quickcell_3_input.cpp +++ b/experiments/quickcell/quickcell_3_input.cpp @@ -70,11 +70,11 @@ int main() // NOLINT const auto skeleton_two = read_sqd_layout(fmt::format("{}/{}", folder, "3_in_1_out_skeleton_two.sqd")); - const design_sidb_gates_params> params{ + const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.31}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{detect_bdl_wires_params{3.0}}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{22, 6, 0}, {32, 12, 0}}, 4}; diff --git a/experiments/quickcell/quickcell_rectangular_gate_library.cpp b/experiments/quickcell/quickcell_rectangular_gate_library.cpp index fdba10261..f4697fab2 100644 --- a/experiments/quickcell/quickcell_rectangular_gate_library.cpp +++ b/experiments/quickcell/quickcell_rectangular_gate_library.cpp @@ -92,11 +92,11 @@ int main() // NOLINT constexpr auto num_canvas_sidbs = 3u; constexpr auto num_canvas_sidbs_2_input_2_output = 4u; - design_sidb_gates_params> params{ + design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{{3}}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{18, 9, 0}, {26, 13, 0}}, num_canvas_sidbs}; diff --git a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp index 12893f92b..748581023 100644 --- a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp +++ b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp @@ -77,27 +77,27 @@ int main() // NOLINT const auto skeleton_two_input_two_output = read_sqd_layout(fmt::format("{}/{}", folder, "skeleton_hex_inputsdbp_2i2o.sqd")); - design_sidb_gates_params> params_1_in_1_out_straight{ + design_sidb_gates_params params_1_in_1_out_straight{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - fiction::cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{9, 6, 0}, {21, 14, 0}}, 3}; - design_sidb_gates_params> params_2_in_1_out{ + design_sidb_gates_params params_2_in_1_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - fiction::cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 10, 0}}, 3}; - design_sidb_gates_params> params_2_in_2_out{ + design_sidb_gates_params params_2_in_2_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - fiction::cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 14, 0}}, 3}; @@ -111,14 +111,14 @@ int main() // NOLINT std::vector automatic_exhaustive_design{}; params_2_in_1_out.design_mode = design_sidb_gates_params< - fiction::cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; params_2_in_1_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; params_2_in_2_out.design_mode = design_sidb_gates_params< - fiction::cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; params_2_in_2_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; params_1_in_1_out_straight.design_mode = design_sidb_gates_params< - fiction::cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; params_1_in_1_out_straight.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; @@ -143,13 +143,13 @@ int main() // NOLINT design_sidb_gates_stats stats_quickcell{}; params_2_in_1_out.design_mode = - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL; + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL; params_2_in_2_out.design_mode = - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL; + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL; params_1_in_1_out_straight.design_mode = - design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL; + design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL; if (gate_name == "cx" || gate_name == "ha" || gate_name == "hourglass") { diff --git a/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp b/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp index 9a2571daf..110f2a9dd 100644 --- a/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp +++ b/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp @@ -42,10 +42,10 @@ int main() // NOLINT auto lyt = read_sqd_layout( fmt::format("{}/gate_skeletons/skeleton_bestagons_with_tags/skeleton_hex_inputsdbp_2i1o.sqd", folder)); - const design_sidb_gates_params> params_2_in_1_out{ + const design_sidb_gates_params params_2_in_1_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}}, design_sidb_gates_params< - cell>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_cube>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, {{14, 12, 0}, {24, 23, 0}}, 3}; @@ -53,10 +53,10 @@ int main() // NOLINT const is_operational_params is_op_params{sidb_sim}; // for this experiment, we use a stray SiDB defect - const auto stray_db = fiction::sidb_defect{fiction::sidb_defect_type::DB, -1, 4.1, 1.8}; - // const auto si_vacancy = fiction::sidb_defect{fiction::sidb_defect_type::SI_VACANCY, -1, 10.6, 5.9}; + const auto stray_db = sidb_defect{sidb_defect_type::DB, -1, 4.1, 1.8}; + // const auto si_vacancy = sidb_defect{sidb_defect_type::SI_VACANCY, -1, 10.6, 5.9}; - defect_influence_params> params{}; + defect_influence_params> params{}; params.additional_scanning_area = {100, 1000}; params.defect = stray_db; params.operational_params = is_op_params; diff --git a/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp b/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp index 560ec7502..2ff57d243 100644 --- a/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp +++ b/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp @@ -38,8 +38,8 @@ int main() // NOLINT std::make_pair("xnor", std::vector{create_xnor_tt()}), std::make_pair("xor", std::vector{create_xor_tt()}), std::make_pair("or", std::vector{create_or_tt()})}; - const sidb_simulation_parameters sim_params{2, -0.28}; - critical_temperature_params ct_params{sim_params}; + constexpr sidb_simulation_parameters sim_params{2, -0.28}; + critical_temperature_params ct_params{{sim_params}}; // this is how the gates are presented and simulated in "SiQAD: A Design and Simulation Tool for Atomic Silicon // Quantum Dot Circuits\" by Samuel Sze Hang Ng, Jacob Retallick, Hsi Nien Chiu, Robert Lupoiu, Lucian Livadaru, diff --git a/include/fiction/algorithms/simulation/sidb/defect_influence.hpp b/include/fiction/algorithms/simulation/sidb/defect_influence.hpp index c453287a5..6b81a9b01 100644 --- a/include/fiction/algorithms/simulation/sidb/defect_influence.hpp +++ b/include/fiction/algorithms/simulation/sidb/defect_influence.hpp @@ -573,8 +573,8 @@ class defect_influence_impl { if (params.influence_def == defect_influence_params>::influence_definition::OPERATIONALITY_CHANGE) { - const auto [status, result] = is_operational(lyt_copy, spec.value(), params.operational_params); - if (status == operational_status::OPERATIONAL) + if (const auto& assessment_results = is_operational(lyt_copy, spec.value(), params.operational_params); + assessment_results.status == operational_status::OPERATIONAL) { lyt_copy.assign_sidb_defect(defect_cell, sidb_defect{sidb_defect_type::NONE}); return non_influential(); diff --git a/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp b/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp index 3d19ae0a9..5a1650bc7 100644 --- a/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp +++ b/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp @@ -204,7 +204,7 @@ class displacement_robustness_domain_impl const auto op_status = is_operational(lyt, truth_table, params.operational_params); { const std::lock_guard lock_domain{mutex_to_protect_displacement_robustness_domain}; - update_displacement_robustness_domain(domain, lyt, op_status.first); + update_displacement_robustness_domain(domain, lyt, op_status.status); } }; diff --git a/include/fiction/algorithms/simulation/sidb/operational_domain.hpp b/include/fiction/algorithms/simulation/sidb/operational_domain.hpp index ee789f842..a18a2435c 100644 --- a/include/fiction/algorithms/simulation/sidb/operational_domain.hpp +++ b/include/fiction/algorithms/simulation/sidb/operational_domain.hpp @@ -1108,12 +1108,12 @@ class operational_domain_impl auto op_params_set_dimension_values = params.operational_params; op_params_set_dimension_values.simulation_parameters = sim_params; - const auto& [status, aux_stats] = is_operational(layout, truth_table, op_params_set_dimension_values, - input_bdl_wires, output_bdl_wires, std::optional{canvas_lyt}); + const auto& assessment_results = is_operational(layout, truth_table, op_params_set_dimension_values, + input_bdl_wires, output_bdl_wires, std::optional{canvas_lyt}); - num_simulator_invocations += aux_stats.simulator_invocations; + num_simulator_invocations += assessment_results.simulator_invocations; - if (status == operational_status::NON_OPERATIONAL) + if (assessment_results.status == operational_status::NON_OPERATIONAL) { return non_operational(); } From ac9663ae1568358038f2f37337debaf3f7278601 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 12:08:56 +0100 Subject: [PATCH 054/138] :snake: Adjusted Python bindings for `is_operational` --- bindings/mnt/pyfiction/__init__.py | 20 +++++--- .../physical_design/design_sidb_gates.hpp | 3 +- .../simulation/sidb/is_operational.hpp | 51 ++++++++++++++----- .../simulation/sidb/is_operational.hpp | 3 +- 4 files changed, 54 insertions(+), 23 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index ecafe9e75..f5c8a7865 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -202,6 +202,10 @@ offset_coordinate, offset_volume, operational_analysis_strategy, + operational_assessment_100, + operational_assessment_111, + operational_assessment_for_input_100, + operational_assessment_for_input_111, operational_condition, operational_domain, operational_domain_contour_tracing, @@ -215,8 +219,6 @@ operational_domain_value_range, operational_input_patterns, operational_status, - operational_status_assessment_stats_100, - operational_status_assessment_stats_111, orthogonal, orthogonal_params, orthogonal_stats, @@ -292,7 +294,8 @@ technology_mapping_stats, # Networks technology_network, - termination_condition, + termination_condition_design_sidb_gates_params, + termination_condition_is_operational_params, time_to_solution, time_to_solution_for_given_simulation_results, time_to_solution_params, @@ -514,7 +517,11 @@ "offset_area", "offset_coordinate", "offset_volume", - "operational_analysis_strategy", + "operational_analysis_strategy" + "operational_assessment_100", + "operational_assessment_111", + "operational_assessment_for_input_100", + "operational_assessment_for_input_111", "operational_condition", "operational_domain", "operational_domain_contour_tracing", @@ -528,8 +535,6 @@ "operational_domain_value_range", "operational_input_patterns", "operational_status", - "operational_status_assessment_stats_100", - "operational_status_assessment_stats_111", "orthogonal", "orthogonal_params", "orthogonal_stats", @@ -605,7 +610,8 @@ "technology_mapping_stats", # Networks "technology_network", - "termination_condition", + "termination_condition_design_sidb_gates_params", + "termination_condition_is_operational_params", "time_to_solution", "time_to_solution_for_given_simulation_results", "time_to_solution_params", diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 5f248c67d..5a2e0f0ac 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -44,7 +44,8 @@ void design_sidb_gates(pybind11::module& m) * Termination condition selector type. */ py::enum_::termination_condition>( - m, "termination_condition", DOC(fiction_design_sidb_gates_params_termination_condition)) + m, "termination_condition_design_sidb_gates_params", + DOC(fiction_design_sidb_gates_params_termination_condition)) .value("AFTER_FIRST_SOLUTION", fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index 3215bffc4..47e8fc2da 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -77,26 +77,40 @@ void is_operational(pybind11::module& m) } template -void operational_status_assessment_stats(pybind11::module& m, const std::string& lattice = "") +void operational_assessment(pybind11::module& m, const std::string& lattice = "") { namespace py = pybind11; - py::class_>( - m, fmt::format("operational_status_assessment_stats{}", lattice).c_str(), - DOC(fiction_operational_status_assessment_stats)) - .def(py::init<>()) - .def_readwrite("simulation_results", &fiction::operational_status_assessment_stats::simulation_results, - DOC(fiction_operational_status_assessment_stats_simulation_results)) - .def_readwrite("simulator_invocations", - &fiction::operational_status_assessment_stats::simulator_invocations, - DOC(fiction_operational_status_assessment_stats_simulator_invocations)); + // operational assessments are defined to be read-only + + py::class_::operational_assessment_for_input>( + m, fmt::format("operational_assessment_for_input{}", lattice).c_str(), + DOC(fiction_operational_assessment_operational_assessment_for_input)) + .def(py::init(), py::arg(" op_status"), + DOC(fiction_operational_assessment_operational_assessment_for_input_operational_assessment_for_input)) + .def_readonly("status", &fiction::operational_assessment::operational_assessment_for_input::status, + DOC(fiction_operational_assessment_operational_assessment_for_input_status)) + .def_readonly("simulation_results", + &fiction::operational_assessment::operational_assessment_for_input::simulation_results, + DOC(fiction_operational_assessment_operational_assessment_for_input_simulation_results)); + + py::class_>(m, fmt::format("operational_assessment{}", lattice).c_str(), + DOC(fiction_operational_assessment)) + .def(py::init(), py::arg("op_status"), + DOC(fiction_operational_assessment_operational_assessment)) + .def_readonly("status", &fiction::operational_assessment::status, + DOC(fiction_operational_assessment_status)) + .def_readonly("assessment_per_input", &fiction::operational_assessment::assessment_per_input, + DOC(fiction_operational_assessment_assessment_per_input)) + .def_readonly("simulator_invocations", &fiction::operational_assessment::simulator_invocations, + DOC(fiction_operational_assessment_simulator_invocations)); } } // namespace detail inline void is_operational(pybind11::module& m) { - namespace py = pybind11; // TODO + namespace py = pybind11; py::enum_(m, "operational_status", DOC(fiction_operational_status)) .value("OPERATIONAL", fiction::operational_status::OPERATIONAL, DOC(fiction_operational_status_OPERATIONAL)) @@ -120,6 +134,15 @@ inline void is_operational(pybind11::module& m) fiction::is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION, DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_THEN_SIMULATION)); + py::enum_( + m, "termination_condition_is_operational_params", DOC(fiction_is_operational_params_termination_condition)) + .value("ON_FIRST_NON_OPERATIONAL", + fiction::is_operational_params::termination_condition::ON_FIRST_NON_OPERATIONAL, + DOC(fiction_is_operational_params_termination_condition_ON_FIRST_NON_OPERATIONAL)) + .value("ALL_INPUT_COMBINATIONS_ASSESSED", + fiction::is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED, + DOC(fiction_is_operational_params_termination_condition_ALL_INPUT_COMBINATIONS_ASSESSED)); + py::enum_( m, "simulation_results_mode", DOC(fiction_is_operational_params_simulation_results_mode)) .value("KEEP_SIMULATION_RESULTS", @@ -142,12 +165,14 @@ inline void is_operational(pybind11::module& m) .def_readwrite("strategy_to_analyze_operational_status", &fiction::is_operational_params::strategy_to_analyze_operational_status, DOC(fiction_is_operational_params_strategy_to_analyze_operational_status)) + .def_readwrite("termination_condition", &fiction::is_operational_params::termination_cond, + DOC(fiction_is_operational_params_termination_condition)) .def_readwrite("simulation_results_retention", &fiction::is_operational_params::simulation_results_retention, DOC(fiction_is_operational_params_simulation_results_retention)); // NOTE be careful with the order of the following calls! Python will resolve the first matching overload! - detail::operational_status_assessment_stats(m, "_100"); - detail::operational_status_assessment_stats(m, "_111"); + detail::operational_assessment(m, "_100"); + detail::operational_assessment(m, "_111"); detail::is_operational(m); detail::is_operational(m); diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index e3e11a545..adac86329 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -155,8 +155,7 @@ struct is_operational_params /** * Simulation results that are used to certify the status `OPERATIONAL` are not kept by default. */ - simulation_results_mode simulation_results_retention = - simulation_results_mode::DISCARD_SIMULATION_RESULTS; // TODO retain + term early + simulation_results_mode simulation_results_retention = simulation_results_mode::DISCARD_SIMULATION_RESULTS; }; /** From 46e86a9e7460ccfd69f613ef35f7ce8c033df1c8 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 12:21:15 +0100 Subject: [PATCH 055/138] :truck: Shortened `automatic_exhaustive_gate_designer` to `exhaustive_gate_designer` --- .../physical_design/design_sidb_gates.hpp | 12 +++++- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 4 +- .../physical_design/test_design_sidb_gates.py | 6 +-- ...ckcell_vs_automatic_exhaustive_2_input.cpp | 40 +++++++++---------- .../quicktrace_vs_grid_search_new_gates.cpp | 2 +- .../physical_design/design_sidb_gates.hpp | 10 ++--- .../physical_design/design_sidb_gates.cpp | 34 ++++++++-------- 7 files changed, 57 insertions(+), 51 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 5a2e0f0ac..7b5b1ac65 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -12,6 +12,8 @@ #include +#include + namespace pyfiction { @@ -34,8 +36,8 @@ void design_sidb_gates(pybind11::module& m) m, "design_sidb_gates_mode", DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) - .value("AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER", - fiction::design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + .value("EXHAUSTIVE_GATE_DESIGNER", + fiction::design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_RANDOM)); @@ -85,6 +87,12 @@ void design_sidb_gates(pybind11::module& m) DOC(fiction_design_sidb_gates_params_post_design_process)); } +template +void design_sidb_gates_params(pybind11::module& m, const std::string& lattice = "") +{ + namespace py = pybind11; +} + } // namespace detail inline void design_sidb_gates(pybind11::module& m) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 5fdcd4549..067031774 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4328,7 +4328,7 @@ static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Ga static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; -static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode_AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER = R"doc(Gates are designed by using the *Automatic Exhaustive Gate Designer*.)doc"; +static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode_EXHAUSTIVE_GATE_DESIGNER = R"doc(Gates are designed by using the *Automatic Exhaustive Gate Designer*.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL = R"doc(Gates are designed by using *QuickCell*.)doc"; @@ -5748,7 +5748,7 @@ static const char *__doc_fiction_detail_design_sidb_gates_impl_output_bdl_wires static const char *__doc_fiction_detail_design_sidb_gates_impl_params = R"doc(Parameters for the *SiDB Gate Designer*.)doc"; -static const char *__doc_fiction_detail_design_sidb_gates_impl_run_automatic_exhaustive_gate_designer = +static const char *__doc_fiction_detail_design_sidb_gates_impl_run_exhaustive_gate_designer = R"doc(Design gates by using the *Automatic Exhaustive Gate Designer*. This algorithm was proposed in \"Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds\" by J. Drewniok, diff --git a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py index 9e525d7c5..fbfcd038f 100644 --- a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py +++ b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py @@ -38,7 +38,7 @@ def test_siqad_and_gate_skeleton_100(self): params = design_sidb_gates_params() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.28 - params.design_mode = design_sidb_gates_mode.AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER + params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER params.canvas = [(4, 8), (14, 11)] params.number_of_sidbs = 1 params.operational_params.sim_engine = sidb_simulation_engine.QUICKEXACT @@ -84,7 +84,7 @@ def test_nor_gate_111(self): params = design_sidb_gates_params() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.32 - params.design_mode = design_sidb_gates_mode.AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER + params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER params.canvas = [(10, 22), (14, 34)] params.number_of_sidbs = 3 params.operational_params.sim_engine = sidb_simulation_engine.QUICKEXACT @@ -135,7 +135,7 @@ def test_nor_gate_111_quickcell(self): params = design_sidb_gates_params() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.32 - params.design_mode = design_sidb_gates_mode.AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER + params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER params.canvas = [(10, 26), (14, 34)] params.number_of_sidbs = 3 diff --git a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp index 748581023..6ad9a8f91 100644 --- a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp +++ b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp @@ -81,7 +81,7 @@ int main() // NOLINT is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{9, 6, 0}, {21, 14, 0}}, 3}; @@ -89,7 +89,7 @@ int main() // NOLINT is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 10, 0}}, 3}; @@ -97,7 +97,7 @@ int main() // NOLINT is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 14, 0}}, 3}; @@ -106,37 +106,37 @@ int main() // NOLINT for (const auto& [truth_table, gate_name] : truth_tables_and_names) { - design_sidb_gates_stats stats_automatic_exhaustive_design{}; + design_sidb_gates_stats stats_exhaustive_design{}; - std::vector automatic_exhaustive_design{}; + std::vector exhaustive_design{}; params_2_in_1_out.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; params_2_in_1_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; params_2_in_2_out.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; params_2_in_2_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; params_1_in_1_out_straight.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; params_1_in_1_out_straight.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; if (gate_name == "cx" || gate_name == "ha" || gate_name == "hourglass") { - automatic_exhaustive_design = design_sidb_gates(skeleton_two_input_two_output, truth_table, - params_2_in_2_out, &stats_automatic_exhaustive_design); + exhaustive_design = design_sidb_gates(skeleton_two_input_two_output, truth_table, + params_2_in_2_out, &stats_exhaustive_design); } else if (gate_name == "wire" || gate_name == "inv") { - automatic_exhaustive_design = + exhaustive_design = design_sidb_gates(skeleton_one_input_one_output_straight, truth_table, params_1_in_1_out_straight, - &stats_automatic_exhaustive_design); + &stats_exhaustive_design); } else { - automatic_exhaustive_design = design_sidb_gates(skeleton_one_input_two_output, truth_table, - params_2_in_1_out, &stats_automatic_exhaustive_design); + exhaustive_design = design_sidb_gates(skeleton_one_input_two_output, truth_table, + params_2_in_1_out, &stats_exhaustive_design); } std::vector quickcell_design{}; @@ -167,19 +167,19 @@ int main() // NOLINT design_sidb_gates(skeleton_one_input_two_output, truth_table, params_2_in_1_out, &stats_quickcell); } - const auto runtime_automatic_exhaustive_design = - mockturtle::to_seconds(stats_automatic_exhaustive_design.time_total); + const auto runtime_exhaustive_design = + mockturtle::to_seconds(stats_exhaustive_design.time_total); const auto runtime_quickcell = mockturtle::to_seconds(stats_quickcell.time_total); - sum_exhaustive_runtime += runtime_automatic_exhaustive_design; + sum_exhaustive_runtime += runtime_exhaustive_design; sum_quickcell_runtime += runtime_quickcell; - const auto time_reduction = runtime_automatic_exhaustive_design / runtime_quickcell; + const auto time_reduction = runtime_exhaustive_design / runtime_quickcell; const auto total_number_of_layout = stats_quickcell.number_of_layouts; - simulation_exp(gate_name, total_number_of_layout, runtime_automatic_exhaustive_design, - automatic_exhaustive_design.size(), quickcell_design.size(), runtime_quickcell, time_reduction, + simulation_exp(gate_name, total_number_of_layout, runtime_exhaustive_design, + exhaustive_design.size(), quickcell_design.size(), runtime_quickcell, time_reduction, stats_quickcell.number_of_layouts_after_first_pruning, static_cast(stats_quickcell.number_of_layouts_after_first_pruning) / static_cast(total_number_of_layout) * 100, diff --git a/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp b/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp index 110f2a9dd..2c2f96417 100644 --- a/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp +++ b/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp @@ -45,7 +45,7 @@ int main() // NOLINT const design_sidb_gates_params params_2_in_1_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}}, design_sidb_gates_params< - sidb_100_cell_clk_lyt_cube>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_cube>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 12, 0}, {24, 23, 0}}, 3}; diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 7bb09ef16..993fbf160 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -60,7 +60,7 @@ struct design_sidb_gates_params /** * Gates are designed by using the *Automatic Exhaustive Gate Designer*. */ - AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + EXHAUSTIVE_GATE_DESIGNER, /** * Gate layouts are designed randomly. */ @@ -87,7 +87,7 @@ struct design_sidb_gates_params /** * Gate design mode. */ - design_sidb_gates_mode design_mode = design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + design_sidb_gates_mode design_mode = design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; /** * Canvas spanned by the northwest and southeast cell. */ @@ -202,7 +202,7 @@ class design_sidb_gates_impl * * @return A vector of designed SiDB gate layouts. */ - [[nodiscard]] std::vector run_automatic_exhaustive_gate_designer() const noexcept + [[nodiscard]] std::vector run_exhaustive_gate_designer() const noexcept { if (stats.number_of_layouts == 0) { @@ -763,9 +763,9 @@ template std::vector result{}; - if (params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER) + if (params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER) { - result = p.run_automatic_exhaustive_gate_designer(); + result = p.run_exhaustive_gate_designer(); } else if (params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 1d2dbdd05..9cce57627 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -62,8 +62,7 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi SECTION("Automatic Exhaustive Gate Designer") { - params.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); REQUIRE(found_gate_layouts.size() == 10); @@ -107,7 +106,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ { const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {10, 4, 0}}, 1}; @@ -121,7 +120,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ const auto lyt_in_cube_coord = convert_layout_to_fiction_coordinates(lyt); const design_sidb_gates_params params_cube{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {siqad::to_fiction_coord(siqad::coord_t{10, 4, 0}), siqad::to_fiction_coord(siqad::coord_t{10, 4, 0})}, 1}; @@ -138,7 +137,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ const auto lyt_in_offset_coord = convert_layout_to_fiction_coordinates(lyt); const design_sidb_gates_params params_offset{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {siqad::to_fiction_coord(siqad::coord_t{10, 4, 0}), siqad::to_fiction_coord(siqad::coord_t{10, 4, 0})}, 1}; @@ -155,7 +154,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ { const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {13, 4, 0}}, 1}; @@ -168,7 +167,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ { const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {10, 4, 0}}, 1, design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION}; @@ -188,7 +187,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ { const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKSIM}, - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {10, 4, 0}}, 1, design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION}; @@ -208,7 +207,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ { const auto params = design_sidb_gates_params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 4, 0}, {13, 4, 0}}, 1, design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, @@ -249,8 +248,7 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ design_sidb_gates_stats design_gates_stats_exhaustive{}; params.canvas = {{10, 4, 0}, {10, 4, 0}}; params.number_of_sidbs = 0; - params.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params, &design_gates_stats_exhaustive); CHECK(found_gate_layouts_exhaustive.empty()); @@ -291,7 +289,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ sidb_simulation_engine::EXGS, {detect_bdl_wires_params{2.0}}}, design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{4, 4, 0}, {14, 5, 1}}, 1}; @@ -314,7 +312,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ params.canvas = {{4, 4, 0}, {4, 4, 0}}; params.number_of_sidbs = 0; params.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats_exhaustive); REQUIRE(found_gate_layouts_exhaustive.size() == 1); @@ -342,7 +340,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ params.canvas = {{4, 4, 0}, {4, 4, 0}}; params.number_of_sidbs = 2; params.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER; + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats); CHECK(found_gate_layouts_exhaustive.empty()); @@ -394,7 +392,7 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{17, 11, 0}, {17, 11, 0}}, 1}; @@ -413,7 +411,7 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin design_sidb_gates_params> params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, design_sidb_gates_params>::design_sidb_gates_mode:: - AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + EXHAUSTIVE_GATE_DESIGNER, {{17, 11, 0}, {17, 11, 0}}, 1}; @@ -539,7 +537,7 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, design_sidb_gates_params< - sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {14, 17, 0}}, 3}; // to save runtime in the CI, this test is only run in RELEASE mode @@ -571,7 +569,7 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, design_sidb_gates_params< - sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::AUTOMATIC_EXHAUSTIVE_GATE_DESIGNER, + sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {15, 17, 0}}, 3}; From 4f7c1fefca90098bf18126a2eddee8b7893930fe Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 12:29:26 +0100 Subject: [PATCH 056/138] :snake: Added read-only access to member variables of `design_sidb_gates_stats` --- .../physical_design/design_sidb_gates.hpp | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 7b5b1ac65..27b277988 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -99,8 +99,27 @@ inline void design_sidb_gates(pybind11::module& m) { namespace py = pybind11; + // stats are defined to be read-only + py::class_(m, "design_sidb_gates_stats", DOC(fiction_design_sidb_gates_stats)) .def(py::init<>()) + .def_readonly("time_total", &fiction::design_sidb_gates_stats::time_total, + DOC(fiction_design_sidb_gates_stats_time_total)) + .def_readonly("pruning_total", &fiction::design_sidb_gates_stats::pruning_total, + DOC(fiction_design_sidb_gates_stats_pruning_total)) + .def_readonly("sim_engine", &fiction::design_sidb_gates_stats::sim_engine, + DOC(fiction_design_sidb_gates_stats_sim_engine)) + .def_readonly("number_of_layouts", &fiction::design_sidb_gates_stats::number_of_layouts, + DOC(fiction_design_sidb_gates_stats_number_of_layouts)) + .def_readonly("number_of_layouts_after_first_pruning", + &fiction::design_sidb_gates_stats::number_of_layouts_after_first_pruning, + DOC(fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning)) + .def_readonly("number_of_layouts_after_second_pruning", + &fiction::design_sidb_gates_stats::number_of_layouts_after_second_pruning, + DOC(fiction_design_sidb_gates_stats_number_of_layouts_after_second_pruning)) + .def_readonly("number_of_layouts_after_third_pruning", + &fiction::design_sidb_gates_stats::number_of_layouts_after_third_pruning, + DOC(fiction_design_sidb_gates_stats_number_of_layouts_after_third_pruning)) .def("__repr__", [](const fiction::design_sidb_gates_stats& stats) { From 063d7a6d727a952445f7638a0b758e6e6e12be36 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 13:30:47 +0100 Subject: [PATCH 057/138] :bug: Fixed wrong CMake message --- libs/CMakeLists.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libs/CMakeLists.txt b/libs/CMakeLists.txt index 2a87f6dd6..55ae33adb 100644 --- a/libs/CMakeLists.txt +++ b/libs/CMakeLists.txt @@ -125,7 +125,7 @@ endif () # Enable the usage of ALGLIB by the ALGLIB Project option(FICTION_ALGLIB "Automatically download, include, and utilize ALGLIB by the ALGLIB project.") if (FICTION_ALGLIB) - message(STATUS "Usage of the Z3 solver was enabled.") + message(STATUS "Usage of ALGLIB was enabled.") # Compile definition to guard include files target_compile_definitions(libfiction INTERFACE FICTION_ALGLIB_ENABLED) From d002690843d74b8d070cd73e666b968fccd338a4 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 13:40:57 +0100 Subject: [PATCH 058/138] :snake: Adjusted bindings for `design_sidb_gates` --- bindings/mnt/pyfiction/__init__.py | 6 ++-- .../physical_design/design_sidb_gates.hpp | 28 +++++++------------ 2 files changed, 14 insertions(+), 20 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index f5c8a7865..4609cb8a4 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -112,7 +112,8 @@ dependent_cell_mode, design_sidb_gates, design_sidb_gates_mode, - design_sidb_gates_params, + design_sidb_gates_params_100, + design_sidb_gates_params_111, detect_bdl_pairs, detect_bdl_pairs_params, detect_bdl_wires_100, @@ -428,7 +429,8 @@ "dependent_cell_mode", "design_sidb_gates", "design_sidb_gates_mode", - "design_sidb_gates_params", + "design_sidb_gates_params_100", + "design_sidb_gates_params_111", "detect_bdl_pairs", "detect_bdl_pairs_params", "detect_bdl_wires_100", diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 27b277988..20d055ed5 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -10,6 +10,7 @@ #include #include +#include #include #include @@ -54,23 +55,17 @@ void design_sidb_gates(pybind11::module& m) .value("ALL_COMBINATIONS_ENUMERATED", fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); +} - /** - * Post-design processes selector type. - */ - py::enum_::post_design_mode>( - m, "post_design_mode", DOC(fiction_design_sidb_gates_params_post_design_mode)) - .value("DO_NOTHING", fiction::design_sidb_gates_params::post_design_mode::DO_NOTHING, - DOC(fiction_design_sidb_gates_params_post_design_mode_DO_NOTHING)) - .value("PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES", - fiction::design_sidb_gates_params< - fiction::offset::ucoord_t>::post_design_mode::PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES, - DOC(fiction_design_sidb_gates_params_post_design_mode_PREFER_ENERGETICALLY_ISOLATED_GROUND_STATES)); +template +void design_sidb_gates_params(pybind11::module& m, const std::string& lattice = "") +{ + namespace py = pybind11; /** * Parameters. */ - py::class_>(m, "design_sidb_gates_params", + py::class_>(m, fmt::format("design_sidb_gates_params{}", lattice).c_str(), DOC(fiction_design_sidb_gates_params)) .def(py::init<>()) .def_readwrite("operational_params", &fiction::design_sidb_gates_params::operational_params, @@ -87,12 +82,6 @@ void design_sidb_gates(pybind11::module& m) DOC(fiction_design_sidb_gates_params_post_design_process)); } -template -void design_sidb_gates_params(pybind11::module& m, const std::string& lattice = "") -{ - namespace py = pybind11; -} - } // namespace detail inline void design_sidb_gates(pybind11::module& m) @@ -128,6 +117,9 @@ inline void design_sidb_gates(pybind11::module& m) return stream.str(); }); + detail::design_sidb_gates_params(m, "_100"); + detail::design_sidb_gates_params(m, "_111"); + detail::design_sidb_gates(m); detail::design_sidb_gates(m); } From 9192c83acb4cfa17c6529e0a40bd988543a8a8b2 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:11:07 +0100 Subject: [PATCH 059/138] :art: Missing import --- .../pyfiction/algorithms/simulation/sidb/is_operational.hpp | 1 + 1 file changed, 1 insertion(+) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index 47e8fc2da..e4b48f574 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -11,6 +11,7 @@ #include #include +#include #include #include From 37484b0f71692b1d9bfe59481a1835e83bfce6dd Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:15:31 +0100 Subject: [PATCH 060/138] :art: Change nested enum naming scheme to option (2) --- bindings/mnt/pyfiction/__init__.py | 8 ++++---- .../algorithms/physical_design/design_sidb_gates.hpp | 2 +- .../algorithms/simulation/sidb/is_operational.hpp | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index 4609cb8a4..1441402f3 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -114,6 +114,7 @@ design_sidb_gates_mode, design_sidb_gates_params_100, design_sidb_gates_params_111, + design_sidb_gates_params_termination_condition, detect_bdl_pairs, detect_bdl_pairs_params, detect_bdl_wires_100, @@ -186,6 +187,7 @@ is_neutrally_charged_defect, is_operational, is_operational_params, + is_operational_params_termination_condition, is_positively_charged_defect, kink_induced_non_operational_input_patterns, manhattan_distance, @@ -295,8 +297,6 @@ technology_mapping_stats, # Networks technology_network, - termination_condition_design_sidb_gates_params, - termination_condition_is_operational_params, time_to_solution, time_to_solution_for_given_simulation_results, time_to_solution_params, @@ -431,6 +431,7 @@ "design_sidb_gates_mode", "design_sidb_gates_params_100", "design_sidb_gates_params_111", + "design_sidb_gates_params_termination_condition", "detect_bdl_pairs", "detect_bdl_pairs_params", "detect_bdl_wires_100", @@ -503,6 +504,7 @@ "is_neutrally_charged_defect", "is_operational", "is_operational_params", + "is_operational_params_termination_condition", "is_positively_charged_defect", "kink_induced_non_operational_input_patterns", "manhattan_distance", @@ -612,8 +614,6 @@ "technology_mapping_stats", # Networks "technology_network", - "termination_condition_design_sidb_gates_params", - "termination_condition_is_operational_params", "time_to_solution", "time_to_solution_for_given_simulation_results", "time_to_solution_params", diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 20d055ed5..465e3c806 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -47,7 +47,7 @@ void design_sidb_gates(pybind11::module& m) * Termination condition selector type. */ py::enum_::termination_condition>( - m, "termination_condition_design_sidb_gates_params", + m, "design_sidb_gates_params_termination_condition", DOC(fiction_design_sidb_gates_params_termination_condition)) .value("AFTER_FIRST_SOLUTION", fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index e4b48f574..8fd13b273 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -136,7 +136,7 @@ inline void is_operational(pybind11::module& m) DOC(fiction_is_operational_params_operational_analysis_strategy_FILTER_THEN_SIMULATION)); py::enum_( - m, "termination_condition_is_operational_params", DOC(fiction_is_operational_params_termination_condition)) + m, "is_operational_params_termination_condition", DOC(fiction_is_operational_params_termination_condition)) .value("ON_FIRST_NON_OPERATIONAL", fiction::is_operational_params::termination_condition::ON_FIRST_NON_OPERATIONAL, DOC(fiction_is_operational_params_termination_condition_ON_FIRST_NON_OPERATIONAL)) From 3527432944bade9b3bb1a690a827d2e89111fd10 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:21:12 +0100 Subject: [PATCH 061/138] :snake: Adjusted Python bindings test for `is_operational` --- .../simulation/sidb/test_is_operational.py | 32 +++++++++---------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py index 4f0795342..62ce66fa7 100644 --- a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py +++ b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py @@ -47,28 +47,28 @@ def test_is_operational(self): params = is_operational_params() params.simulation_parameters = sidb_simulation_parameters(2, -0.28) - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) + assessment_results = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.OPERATIONAL) + self.assertEqual(assessment_results.status, operational_status.OPERATIONAL) params.simulation_parameters = sidb_simulation_parameters(2, -0.1) - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) + assessment_results = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.NON_OPERATIONAL) + self.assertEqual(assessment_results.status, operational_status.NON_OPERATIONAL) # pre-determined I/O pins output_bdl_wires = detect_bdl_wires_100(lyt, detect_bdl_wires_params(), bdl_wire_selection.OUTPUT) input_bdl_wires = detect_bdl_wires_100(lyt, detect_bdl_wires_params(), bdl_wire_selection.INPUT) - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires) - self.assertEqual(op_status, operational_status.NON_OPERATIONAL) + assessment_results = is_operational(lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires) + self.assertEqual(assessment_results.status, operational_status.NON_OPERATIONAL) # pre-determined I/O pins and canvas layout canvas_lyt = sidb_100_lattice() canvas_lyt.assign_cell_type((4, 5), sidb_technology.cell_type.LOGIC) canvas_lyt.assign_cell_type((6, 7), sidb_technology.cell_type.LOGIC) - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires) - self.assertEqual(op_status, operational_status.NON_OPERATIONAL) + assessment_results = is_operational(lyt, [create_and_tt()], params, input_bdl_wires, output_bdl_wires) + self.assertEqual(assessment_results.status, operational_status.NON_OPERATIONAL) def test_and_gate_kinks(self): lyt = read_sqd_layout_100(dir_path + "/../../../resources/AND_mu_032_kinks.sqd") @@ -76,15 +76,15 @@ def test_and_gate_kinks(self): params = is_operational_params() params.simulation_parameters = sidb_simulation_parameters(2, -0.32) - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) + assessment_results = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.OPERATIONAL) + self.assertEqual(assessment_results.status, operational_status.OPERATIONAL) params.op_condition = operational_condition.REJECT_KINKS - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) + assessment_results = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.NON_OPERATIONAL) + self.assertEqual(assessment_results.status, operational_status.NON_OPERATIONAL) def test_and_gate_non_operational_due_to_kinks(self): lyt = read_sqd_layout_100(dir_path + "/../../../resources/AND_mu_032_kinks.sqd") @@ -112,17 +112,17 @@ def test_and_gate_111_lattice_11_input_pattern(self): params = is_operational_params() params.simulation_parameters = sidb_simulation_parameters(2, -0.32) - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) + assessment_results = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.OPERATIONAL) + self.assertEqual(assessment_results.status, operational_status.OPERATIONAL) params.simulation_parameters = sidb_simulation_parameters(2, -0.1) self.assertEqual(params.simulation_parameters.mu_minus, -0.1) - [op_status, _aux_stats] = is_operational(lyt, [create_and_tt()], params) + assessment_results = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.NON_OPERATIONAL) + self.assertEqual(assessment_results.status, operational_status.NON_OPERATIONAL) def test_and_gate_111_lattice_operational_input_pattern(self): lyt = read_sqd_layout_111(dir_path + "/../../../resources/AND_mu_032_111_surface.sqd") From 8d53a92f48a4573622394aca0fdd2fe55e49a1fd Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Mon, 10 Feb 2025 13:22:11 +0000 Subject: [PATCH 062/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bindings/mnt/pyfiction/__init__.py | 5 ++- ...ckcell_vs_automatic_exhaustive_2_input.cpp | 43 ++++++++----------- .../quicktrace_vs_grid_search_new_gates.cpp | 3 +- .../critical_temperature_simulation_siqad.cpp | 2 +- .../simulation/sidb/is_operational.hpp | 3 +- include/fiction/utils/layout_utils.hpp | 6 ++- .../physical_design/design_sidb_gates.cpp | 30 ++++++------- 7 files changed, 44 insertions(+), 48 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index 1441402f3..8b46b8408 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -521,8 +521,7 @@ "offset_area", "offset_coordinate", "offset_volume", - "operational_analysis_strategy" - "operational_assessment_100", + "operational_analysis_strategyoperational_assessment_100", "operational_assessment_111", "operational_assessment_for_input_100", "operational_assessment_for_input_111", @@ -651,4 +650,6 @@ "write_sqd_sim_result", "yen_k_shortest_paths", "yen_k_shortest_paths_params", + "operational_analysis_strategy", + "operational_assessment_100", ] diff --git a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp index 6ad9a8f91..1a6b1bd57 100644 --- a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp +++ b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp @@ -80,24 +80,21 @@ int main() // NOLINT design_sidb_gates_params params_1_in_1_out_straight{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{9, 6, 0}, {21, 14, 0}}, 3}; design_sidb_gates_params params_2_in_1_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 10, 0}}, 3}; design_sidb_gates_params params_2_in_2_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 14, 0}}, 3}; @@ -110,33 +107,32 @@ int main() // NOLINT std::vector exhaustive_design{}; - params_2_in_1_out.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; + params_2_in_1_out.design_mode = + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; params_2_in_1_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; - params_2_in_2_out.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; + params_2_in_2_out.design_mode = + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; params_2_in_2_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; - params_1_in_1_out_straight.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; + params_1_in_1_out_straight.design_mode = + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; params_1_in_1_out_straight.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; if (gate_name == "cx" || gate_name == "ha" || gate_name == "hourglass") { - exhaustive_design = design_sidb_gates(skeleton_two_input_two_output, truth_table, - params_2_in_2_out, &stats_exhaustive_design); + exhaustive_design = design_sidb_gates(skeleton_two_input_two_output, truth_table, params_2_in_2_out, + &stats_exhaustive_design); } else if (gate_name == "wire" || gate_name == "inv") { - exhaustive_design = - design_sidb_gates(skeleton_one_input_one_output_straight, truth_table, params_1_in_1_out_straight, - &stats_exhaustive_design); + exhaustive_design = design_sidb_gates(skeleton_one_input_one_output_straight, truth_table, + params_1_in_1_out_straight, &stats_exhaustive_design); } else { - exhaustive_design = design_sidb_gates(skeleton_one_input_two_output, truth_table, - params_2_in_1_out, &stats_exhaustive_design); + exhaustive_design = design_sidb_gates(skeleton_one_input_two_output, truth_table, params_2_in_1_out, + &stats_exhaustive_design); } std::vector quickcell_design{}; @@ -167,9 +163,8 @@ int main() // NOLINT design_sidb_gates(skeleton_one_input_two_output, truth_table, params_2_in_1_out, &stats_quickcell); } - const auto runtime_exhaustive_design = - mockturtle::to_seconds(stats_exhaustive_design.time_total); - const auto runtime_quickcell = mockturtle::to_seconds(stats_quickcell.time_total); + const auto runtime_exhaustive_design = mockturtle::to_seconds(stats_exhaustive_design.time_total); + const auto runtime_quickcell = mockturtle::to_seconds(stats_quickcell.time_total); sum_exhaustive_runtime += runtime_exhaustive_design; sum_quickcell_runtime += runtime_quickcell; @@ -178,8 +173,8 @@ int main() // NOLINT const auto total_number_of_layout = stats_quickcell.number_of_layouts; - simulation_exp(gate_name, total_number_of_layout, runtime_exhaustive_design, - exhaustive_design.size(), quickcell_design.size(), runtime_quickcell, time_reduction, + simulation_exp(gate_name, total_number_of_layout, runtime_exhaustive_design, exhaustive_design.size(), + quickcell_design.size(), runtime_quickcell, time_reduction, stats_quickcell.number_of_layouts_after_first_pruning, static_cast(stats_quickcell.number_of_layouts_after_first_pruning) / static_cast(total_number_of_layout) * 100, diff --git a/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp b/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp index 2c2f96417..579221b88 100644 --- a/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp +++ b/experiments/quicktrace/quicktrace_vs_grid_search_new_gates.cpp @@ -44,8 +44,7 @@ int main() // NOLINT const design_sidb_gates_params params_2_in_1_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}}, - design_sidb_gates_params< - sidb_100_cell_clk_lyt_cube>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 12, 0}, {24, 23, 0}}, 3}; diff --git a/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp b/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp index 2ff57d243..583b73601 100644 --- a/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp +++ b/experiments/sidb_simulation/temperature/critical_temperature_simulation_siqad.cpp @@ -39,7 +39,7 @@ int main() // NOLINT std::make_pair("xor", std::vector{create_xor_tt()}), std::make_pair("or", std::vector{create_or_tt()})}; constexpr sidb_simulation_parameters sim_params{2, -0.28}; - critical_temperature_params ct_params{{sim_params}}; + critical_temperature_params ct_params{{sim_params}}; // this is how the gates are presented and simulated in "SiQAD: A Design and Simulation Tool for Atomic Silicon // Quantum Dot Circuits\" by Samuel Sze Hang Ng, Jacob Retallick, Hsi Nien Chiu, Robert Lupoiu, Lucian Livadaru, diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index adac86329..37da7ffba 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -799,7 +799,8 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) { + [&cds_layout, &cds_canvas_copy](const auto& c) + { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); diff --git a/include/fiction/utils/layout_utils.hpp b/include/fiction/utils/layout_utils.hpp index f2fa991e7..99d429b0e 100644 --- a/include/fiction/utils/layout_utils.hpp +++ b/include/fiction/utils/layout_utils.hpp @@ -348,7 +348,8 @@ auto convert_layout_to_siqad_coordinates(const Lyt& lyt) noexcept { sidb_defect_surface lyt_surface{lyt_new}; lyt_orig.foreach_sidb_defect( - [&lyt_surface, &lyt_orig](const auto& cd) { + [&lyt_surface, &lyt_orig](const auto& cd) + { lyt_surface.assign_sidb_defect(siqad::to_siqad_coord(cd.first), lyt_orig.get_sidb_defect(cd.first)); }); return lyt_surface; @@ -456,7 +457,8 @@ template auto lyt_defect = sidb_defect_surface{lyt_new}; lyt.foreach_sidb_defect( - [&lyt_defect](const auto& cd) { + [&lyt_defect](const auto& cd) + { lyt_defect.assign_sidb_defect(siqad::to_fiction_coord>(cd.first), cd.second); }); diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 9cce57627..ff7850dc8 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -62,7 +62,8 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi SECTION("Automatic Exhaustive Gate Designer") { - params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; + params.design_mode = + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts = design_sidb_gates(lyt, std::vector{create_and_tt()}, params); REQUIRE(found_gate_layouts.size() == 10); @@ -248,7 +249,8 @@ TEST_CASE("Use SiQAD XNOR skeleton and generate SiQAD XNOR gate, exhaustive", "[ design_sidb_gates_stats design_gates_stats_exhaustive{}; params.canvas = {{10, 4, 0}, {10, 4, 0}}; params.number_of_sidbs = 0; - params.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; + params.design_mode = + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_xnor_tt()}, params, &design_gates_stats_exhaustive); CHECK(found_gate_layouts_exhaustive.empty()); @@ -288,8 +290,7 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::EXGS, {detect_bdl_wires_params{2.0}}}, - design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{4, 4, 0}, {14, 5, 1}}, 1}; @@ -311,8 +312,8 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ design_sidb_gates_stats design_gates_stats_exhaustive{}; params.canvas = {{4, 4, 0}, {4, 4, 0}}; params.number_of_sidbs = 0; - params.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; + params.design_mode = + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats_exhaustive); REQUIRE(found_gate_layouts_exhaustive.size() == 1); @@ -339,8 +340,8 @@ TEST_CASE("Use SiQAD's AND gate skeleton to generate all possible AND gates", "[ design_sidb_gates_stats design_gates_stats{}; params.canvas = {{4, 4, 0}, {4, 4, 0}}; params.number_of_sidbs = 2; - params.design_mode = design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; + params.design_mode = + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; const auto found_gate_layouts_exhaustive = design_sidb_gates(lyt, std::vector{create_and_tt()}, params, &design_gates_stats); CHECK(found_gate_layouts_exhaustive.empty()); @@ -391,8 +392,7 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin { const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params< - sidb_100_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{17, 11, 0}, {17, 11, 0}}, 1}; @@ -410,8 +410,8 @@ TEST_CASE("Use FO2 Bestagon gate without SiDB at {17, 11, 0} and generate origin { design_sidb_gates_params> params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params>::design_sidb_gates_mode:: - EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params< + sidb_defect_surface>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{17, 11, 0}, {17, 11, 0}}, 1}; @@ -536,8 +536,7 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") { design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, - design_sidb_gates_params< - sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {14, 17, 0}}, 3}; // to save runtime in the CI, this test is only run in RELEASE mode @@ -568,8 +567,7 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, - design_sidb_gates_params< - sidb_111_cell_clk_lyt_siqad>::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {15, 17, 0}}, 3}; From 8dbf31326c0477b020a1fc227459d4d74231518c Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Mon, 10 Feb 2025 13:22:57 +0000 Subject: [PATCH 063/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 067031774..152760312 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -5790,9 +5790,9 @@ parameters. The design process is parallelized to improve performance. A vector of designed SiDB gate layouts.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_set_operational_params_accordingly = -R"doc(This function makes sure that the underlying parameters for -`is_operational` allow simulation results to be used when the given -parameter set indicates the use for it. TODO)doc"; +R"doc(This function makes sure that underlying parameters for +`is_operational` are set according to the given parameters for +`design_sidb_gates`.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_skeleton_layout = R"doc(The skeleton layout serves as a starting layout to which SiDBs are @@ -16488,7 +16488,16 @@ static const char *__doc_fiction_operational_assessment_assessment_per_input = R"doc(When the termination condition is set to `ALL_INPUT_COMBINATIONS_ASSESSED`, the operational status for each respective input combination is stored here, sorted by their binary -representation.)doc"; +representation. When the simulation retention is set to +`KEEP_SIMULATION_RESULTS`, this optional structure is also populated.)doc"; + +static const char *__doc_fiction_operational_assessment_extract_simulation_results_per_input = +R"doc(Extracts the simulation results contained in this operational +assessment through moves. + +Returns: + A vector containing the simulation results for each respective + input that was assessed.)doc"; static const char *__doc_fiction_operational_assessment_operational_assessment = R"doc(Standard constructor that only sets the operational status.)doc"; From 50337f950094a415ae9dd4bce7b0b4b531e5299e Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:33:33 +0100 Subject: [PATCH 064/138] :rotating_light: Fixed compiler warning --- .../temperature/critical_temperature_simulation_bestagon.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/experiments/sidb_simulation/temperature/critical_temperature_simulation_bestagon.cpp b/experiments/sidb_simulation/temperature/critical_temperature_simulation_bestagon.cpp index f6136dfac..c7d985859 100644 --- a/experiments/sidb_simulation/temperature/critical_temperature_simulation_bestagon.cpp +++ b/experiments/sidb_simulation/temperature/critical_temperature_simulation_bestagon.cpp @@ -47,7 +47,7 @@ int main() // NOLINT std::make_pair("wire", std::vector{create_id_tt()})}; const sidb_simulation_parameters sim_params{2, -0.32}; - const critical_temperature_params ct_params{sim_params}; + const critical_temperature_params ct_params{{sim_params}}; for (const auto& [gate, truth_table] : gates) { From bb3c5123d5487ff022a00386b92e6fdbaee67778 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:35:35 +0100 Subject: [PATCH 065/138] :art: Adjust template argument that is passed to `design_sidb_gates_params` --- .../physical_design_with_on_the_fly_gate_design.cpp | 4 ++-- include/fiction/technology/sidb_on_the_fly_gate_library.hpp | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp b/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp index 065d5371e..66ff4ad91 100644 --- a/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp +++ b/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp @@ -48,7 +48,7 @@ int main() // NOLINT using gate_lyt = fiction::hex_even_row_gate_clk_lyt; using cell_lyt = fiction::sidb_cell_clk_lyt_cube; - fiction::design_sidb_gates_params> design_gate_params{}; + fiction::design_sidb_gates_params design_gate_params{}; design_gate_params.operational_params.simulation_parameters = fiction::sidb_simulation_parameters{2, -0.32}; // needs to be changed if a different skeleton is used. design_gate_params.canvas = {{24, 17}, {34, 28}}; @@ -56,7 +56,7 @@ int main() // NOLINT design_gate_params.number_of_sidbs = 3; design_gate_params.operational_params.sim_engine = fiction::sidb_simulation_engine::QUICKEXACT; design_gate_params.termination_cond = - fiction::design_sidb_gates_params>::termination_condition::AFTER_FIRST_SOLUTION; + fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION; // save atomic defects which their respective physical parameters as experimentally determined by T. R. Huff, T. // Dienel, M. Rashidi, R. Achal, L. Livadaru, J. Croshaw, and R. A. Wolkow, "Electrostatic landscape of a diff --git a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp index 091dd1d8c..fa9dd455b 100644 --- a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp +++ b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp @@ -109,7 +109,7 @@ struct sidb_on_the_fly_gate_library_params /** * This struct holds parameters to design SiDB gates. */ - design_sidb_gates_params> design_gate_params{}; + design_sidb_gates_params design_gate_params{}; /** * This variable defines the number of canvas SiDBs dedicated to complex gates, such as crossing, double wire, * and half-adder. From d37aa97504185dd7d40345416959668a282259b2 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:36:49 +0100 Subject: [PATCH 066/138] :art: Removed unused imports --- .../fiction/algorithms/physical_design/design_sidb_gates.hpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 993fbf160..828bad341 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -12,8 +12,6 @@ #include "fiction/algorithms/simulation/sidb/random_sidb_layout_generator.hpp" #include "fiction/algorithms/simulation/sidb/sidb_simulation_engine.hpp" #include "fiction/technology/cell_technologies.hpp" -#include "fiction/technology/charge_distribution_surface.hpp" -#include "fiction/technology/sidb_charge_state.hpp" #include "fiction/technology/sidb_defects.hpp" #include "fiction/traits.hpp" #include "fiction/utils/layout_utils.hpp" From a87c6c5a1d712bea7cbe2d767afc06d996caf7f0 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:40:39 +0100 Subject: [PATCH 067/138] :memo: Missing docstrings --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 8 ++++++-- .../algorithms/physical_design/design_sidb_gates.hpp | 2 +- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 152760312..ed4134dbd 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,6 +4324,8 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; +static const char *__doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4365,8 +4367,6 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of SiDB gate design process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,6 +4381,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4393,6 +4395,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_time_total = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 828bad341..0df62b0c2 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -113,7 +113,7 @@ struct design_sidb_gates_params struct design_sidb_gates_stats { /** - * The total runtime of SiDB gate design process. + * The total runtime of the SiDB gate design process. */ mockturtle::stopwatch<>::duration time_total{0}; /** From 65d113aa3c370166670f122cb5eaf8709f1209e6 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Mon, 10 Feb 2025 13:41:31 +0000 Subject: [PATCH 068/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bindings/mnt/pyfiction/__init__.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index 8b46b8408..f7364b22e 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -521,7 +521,9 @@ "offset_area", "offset_coordinate", "offset_volume", + "operational_analysis_strategy", "operational_analysis_strategyoperational_assessment_100", + "operational_assessment_100", "operational_assessment_111", "operational_assessment_for_input_100", "operational_assessment_for_input_111", @@ -650,6 +652,4 @@ "write_sqd_sim_result", "yen_k_shortest_paths", "yen_k_shortest_paths_params", - "operational_analysis_strategy", - "operational_assessment_100", ] From 528d79e2f9415fc4552adec3612bab271e25eabc Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 14:40:39 +0100 Subject: [PATCH 069/138] :memo: Missing docstrings --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 10 ++++++++-- .../algorithms/physical_design/design_sidb_gates.hpp | 2 +- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 152760312..b3272ac54 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,6 +4324,9 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; +static const char* __doc_fiction_design_sidb_gates_params_canvas = + R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4365,8 +4368,6 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of SiDB gate design process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,6 +4382,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4393,6 +4396,9 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_time_total = + R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 828bad341..0df62b0c2 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -113,7 +113,7 @@ struct design_sidb_gates_params struct design_sidb_gates_stats { /** - * The total runtime of SiDB gate design process. + * The total runtime of the SiDB gate design process. */ mockturtle::stopwatch<>::duration time_total{0}; /** From 1dd2771667c68204bbff6fd31ea737c53af2aa20 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 15:17:52 +0100 Subject: [PATCH 070/138] :bug: Fixed a mistake in `__init__.py` --- bindings/mnt/pyfiction/__init__.py | 1 - 1 file changed, 1 deletion(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index f7364b22e..4d29bed98 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -522,7 +522,6 @@ "offset_coordinate", "offset_volume", "operational_analysis_strategy", - "operational_analysis_strategyoperational_assessment_100", "operational_assessment_100", "operational_assessment_111", "operational_assessment_for_input_100", From 87e670b31a81f88db1ac4885a36382219bb8c998 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Mon, 10 Feb 2025 15:24:54 +0100 Subject: [PATCH 071/138] :adhesive_bandage: Adjusted the usage of the return type of a `is_operational` call --- .../simulation/sidb/displacement_robustness_domain.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp b/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp index 5a1650bc7..b54535394 100644 --- a/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp +++ b/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp @@ -160,7 +160,7 @@ class displacement_robustness_domain_impl generator(rd()) { assert( - (is_operational(layout, truth_table, params.operational_params).first == operational_status::OPERATIONAL) && + (is_operational(layout, truth_table, params.operational_params).status == operational_status::OPERATIONAL) && "The given layout is not a valid SiDB layout for the given Boolean function"); if (params.analysis_mode == From 11719661be4c8127171ef901163ac94747ac8cef Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 13:33:38 +0100 Subject: [PATCH 072/138] :art: Reformat --- .../simulation/sidb/displacement_robustness_domain.hpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp b/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp index b54535394..da24d221a 100644 --- a/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp +++ b/include/fiction/algorithms/simulation/sidb/displacement_robustness_domain.hpp @@ -159,9 +159,9 @@ class displacement_robustness_domain_impl truth_table{spec}, generator(rd()) { - assert( - (is_operational(layout, truth_table, params.operational_params).status == operational_status::OPERATIONAL) && - "The given layout is not a valid SiDB layout for the given Boolean function"); + assert((is_operational(layout, truth_table, params.operational_params).status == + operational_status::OPERATIONAL) && + "The given layout is not a valid SiDB layout for the given Boolean function"); if (params.analysis_mode == displacement_robustness_domain_params>::displacement_analysis_mode::RANDOM) From 247e5db42e22cc7dfac62baf0a8f405db3fd4392 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 13:56:11 +0100 Subject: [PATCH 073/138] :pencil2: Fixed typo --- include/fiction/technology/sidb_on_the_fly_gate_library.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp index fa9dd455b..b025c24ab 100644 --- a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp +++ b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp @@ -601,7 +601,7 @@ class sidb_on_the_fly_gate_library : public fcn_gate_library Date: Wed, 12 Feb 2025 15:00:09 +0100 Subject: [PATCH 074/138] :adhesive_bandage: Fixed template errors --- .../physical_design_with_on_the_fly_gate_design.cpp | 6 +++--- include/fiction/technology/sidb_on_the_fly_gate_library.hpp | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp b/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp index 66ff4ad91..f86e83cc1 100644 --- a/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp +++ b/experiments/physical_design_with_on_the_fly_gate_design/physical_design_with_on_the_fly_gate_design.cpp @@ -48,15 +48,15 @@ int main() // NOLINT using gate_lyt = fiction::hex_even_row_gate_clk_lyt; using cell_lyt = fiction::sidb_cell_clk_lyt_cube; - fiction::design_sidb_gates_params design_gate_params{}; + fiction::design_sidb_gates_params> design_gate_params{}; design_gate_params.operational_params.simulation_parameters = fiction::sidb_simulation_parameters{2, -0.32}; // needs to be changed if a different skeleton is used. design_gate_params.canvas = {{24, 17}, {34, 28}}; design_gate_params.number_of_sidbs = 3; design_gate_params.operational_params.sim_engine = fiction::sidb_simulation_engine::QUICKEXACT; - design_gate_params.termination_cond = - fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION; + design_gate_params.termination_cond = fiction::design_sidb_gates_params< + fiction::sidb_defect_surface>::termination_condition::AFTER_FIRST_SOLUTION; // save atomic defects which their respective physical parameters as experimentally determined by T. R. Huff, T. // Dienel, M. Rashidi, R. Achal, L. Livadaru, J. Croshaw, and R. A. Wolkow, "Electrostatic landscape of a diff --git a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp index b025c24ab..cc8bf233b 100644 --- a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp +++ b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp @@ -109,7 +109,7 @@ struct sidb_on_the_fly_gate_library_params /** * This struct holds parameters to design SiDB gates. */ - design_sidb_gates_params design_gate_params{}; + design_sidb_gates_params> design_gate_params{}; /** * This variable defines the number of canvas SiDBs dedicated to complex gates, such as crossing, double wire, * and half-adder. @@ -435,7 +435,7 @@ class sidb_on_the_fly_gate_library : public fcn_gate_library(status == operational_status::OPERATIONAL); } /** From 131487963e4f2dbfeb61c7d749a9d5affa9ddc2a Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 12 Feb 2025 14:51:22 +0000 Subject: [PATCH 075/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index ed4134dbd..9e66183ff 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,8 +4324,6 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; -static const char *__doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; - static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4367,6 +4365,8 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,8 +4381,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4395,8 +4393,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_time_total = R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; @@ -19681,9 +19677,9 @@ skeleton (i.e., the pre-defined input and output wires) are hexagonal in shape.)doc"; static const char *__doc_fiction_sidb_on_the_fly_gate_library_add_defect_to_skeleton = -R"doc(This function takes a defect surface and a skeleton skeleton and adds -defects from the surrounding area to the skeleton. The defects within -a specified distance from the center cell are taken into account. The +R"doc(This function takes a defect surface and a skeleton and adds defects +from the surrounding area to the skeleton. The defects within a +specified distance from the center cell are taken into account. The resulting skeleton with added defects is returned. Template parameter ``CellLyt``: From 479ab7c5180cc02c13443c9dcc118bbccf1040da Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 16:07:07 +0100 Subject: [PATCH 076/138] :snake: Fixed missing lattice postfix --- .../algorithms/physical_design/test_design_sidb_gates.py | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py index fbfcd038f..1a3ffe68e 100644 --- a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py +++ b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py @@ -5,7 +5,8 @@ create_nor_tt, design_sidb_gates, design_sidb_gates_mode, - design_sidb_gates_params, + design_sidb_gates_params_100, + design_sidb_gates_params_111, operational_condition, sidb_100_lattice, sidb_111_lattice, @@ -35,7 +36,7 @@ def test_siqad_and_gate_skeleton_100(self): layout.assign_cell_type((10, 19), sidb_technology.cell_type.NORMAL) - params = design_sidb_gates_params() + params = design_sidb_gates_params_100() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.28 params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER @@ -81,7 +82,7 @@ def test_nor_gate_111(self): layout.assign_cell_type((23, 59), sidb_technology.cell_type.NORMAL) - params = design_sidb_gates_params() + params = design_sidb_gates_params_111() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.32 params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER @@ -132,7 +133,7 @@ def test_nor_gate_111_quickcell(self): layout.assign_cell_type((23, 59), sidb_technology.cell_type.NORMAL) - params = design_sidb_gates_params() + params = design_sidb_gates_params_111() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.32 params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER From 94a7f18beb4e26326482b9f379882cd5c337d656 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 16:13:20 +0100 Subject: [PATCH 077/138] :memo: Fixed python docstrings --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 9e66183ff..0b94d9931 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,6 +4324,8 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; +static const char *__doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4365,8 +4367,6 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,6 +4381,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4393,6 +4395,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_time_total = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From 9328c154596c1a354a18b77d506b0f4ce177126f Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 12 Feb 2025 15:14:15 +0000 Subject: [PATCH 078/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 0b94d9931..9e66183ff 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,8 +4324,6 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; -static const char *__doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; - static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4367,6 +4365,8 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,8 +4381,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4395,8 +4393,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_time_total = R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From d091501a2d8353f3740f63109dd3abee2948aec0 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 16:26:21 +0100 Subject: [PATCH 079/138] :memo: Fixed python docstrings --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 9e66183ff..7c1f085c8 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,6 +4324,8 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; +static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4365,8 +4367,6 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,6 +4381,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4393,6 +4395,9 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_time_total = + R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From 6aab3f7b462ef2485d1b2102aa7c8af0e1e3f1dc Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 12 Feb 2025 15:27:33 +0000 Subject: [PATCH 080/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 7c1f085c8..9e66183ff 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,8 +4324,6 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; -static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; - static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4367,6 +4365,8 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,8 +4381,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4395,9 +4393,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_time_total = - R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From 1905e6602fa6726ca5dc756919ba0f5a78a39e20 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 16:34:28 +0100 Subject: [PATCH 081/138] :green_heart: Do not run pyfiction docstring generator upon edits to only `pybind11_mkdoc_docstrings.hpp` --- .github/workflows/pyfiction-docstring-generator.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/pyfiction-docstring-generator.yml b/.github/workflows/pyfiction-docstring-generator.yml index c6a015b48..cbf8e767a 100644 --- a/.github/workflows/pyfiction-docstring-generator.yml +++ b/.github/workflows/pyfiction-docstring-generator.yml @@ -4,6 +4,7 @@ on: push: paths: - "**/*.hpp" + - "!**/pybind11_mkdoc_docstrings.hpp" - ".github/workflows/pyfiction-docstring-generator.yml" workflow_dispatch: From 4e3c86e78dc4ed7631f12e6f71b6f19e1452a208 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 16:57:50 +0100 Subject: [PATCH 082/138] :memo: Fixed pyfiction docstrings --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 9e66183ff..7c1f085c8 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,6 +4324,8 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; +static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4365,8 +4367,6 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,6 +4381,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4393,6 +4395,9 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_time_total = + R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From 17c7f9f35a996472f6af12613ad9212756f72e8f Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 16:58:25 +0100 Subject: [PATCH 083/138] :art: Clang-Tidy suggestions --- .../physical_design/design_sidb_gates.hpp | 25 +++++++++---------- .../sidb_on_the_fly_gate_library.hpp | 3 +-- 2 files changed, 13 insertions(+), 15 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 0df62b0c2..4122515e9 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -380,7 +380,7 @@ class design_sidb_gates_impl /** * Truth table of the given gate. */ - const std::vector truth_table; + const std::vector truth_table{}; /** * Parameters for the *SiDB Gate Designer*. */ @@ -388,7 +388,7 @@ class design_sidb_gates_impl /** * All cells within the canvas. */ - std::vector all_sidbs_in_canvas; + const std::vector all_sidbs_in_canvas{}; /** * The statistics of the gate design. */ @@ -396,19 +396,19 @@ class design_sidb_gates_impl /** * Input BDL wires. */ - const std::vector> input_bdl_wires; + const std::vector> input_bdl_wires{}; /** * Output BDL wires. */ - const std::vector> output_bdl_wires; + const std::vector> output_bdl_wires{}; /** * Number of input BDL wires. */ - const std::size_t number_of_input_wires; + const std::size_t number_of_input_wires{}; /** * Number of output BDL wires. */ - const std::size_t number_of_output_wires; + const std::size_t number_of_output_wires{}; /** * Number of discarded layouts at first pruning. */ @@ -426,7 +426,7 @@ class design_sidb_gates_impl */ std::size_t number_of_threads{std::thread::hardware_concurrency()}; - [[nodiscard]] std::vector extract_gate_designs(const std::vector& gate_candidates) const noexcept + [[nodiscard]] std::vector extract_gate_designs(std::vector& gate_candidates) const noexcept { mockturtle::stopwatch stop{stats.time_total}; @@ -449,7 +449,7 @@ class design_sidb_gates_impl const auto add_combination_to_layout_and_check_operation = [this, &mutex_to_protect_designed_gate_layouts, &designed_gate_layouts, - &solution_found](const auto& candidate) noexcept + &solution_found](Lyt&& candidate) noexcept { if (const operational_assessment& assessment_results = is_operational( candidate, truth_table, params.operational_params, input_bdl_wires, output_bdl_wires); @@ -496,7 +496,7 @@ class design_sidb_gates_impl return; } - add_combination_to_layout_and_check_operation(gate_candidates.at(j)); + add_combination_to_layout_and_check_operation(std::move(gate_candidates[j])); } }); } @@ -645,8 +645,7 @@ class design_sidb_gates_impl } // Shuffle all canvas layouts to distribute thread load when extracting gate layouts later - std::shuffle(all_canvas_layouts.begin(), all_canvas_layouts.end(), - std::default_random_engine(std::random_device{}())); + std::shuffle(all_canvas_layouts.begin(), all_canvas_layouts.end(), std::mt19937_64{std::random_device{}()}); return all_canvas_layouts; } @@ -667,12 +666,12 @@ class design_sidb_gates_impl // SiDBs cannot be placed on positions which are already occupied by atomic defects. if constexpr (is_sidb_defect_surface_v) { - if (skeleton_layout.get_sidb_defect(all_sidbs_in_canvas[i]).type != sidb_defect_type::NONE) + if (skeleton_layout.get_sidb_defect(all_sidbs_in_canvas.at(i)).type != sidb_defect_type::NONE) { continue; } } - lyt.assign_cell_type(all_sidbs_in_canvas[i], sidb_technology::cell_type::LOGIC); + lyt.assign_cell_type(all_sidbs_in_canvas.at(i), sidb_technology::cell_type::LOGIC); } // the skeleton can already exhibit some canvas SiDBs (partially filled canvas) diff --git a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp index cc8bf233b..905ff682b 100644 --- a/include/fiction/technology/sidb_on_the_fly_gate_library.hpp +++ b/include/fiction/technology/sidb_on_the_fly_gate_library.hpp @@ -416,12 +416,11 @@ class sidb_on_the_fly_gate_library : public fcn_gate_library Date: Wed, 12 Feb 2025 15:59:31 +0000 Subject: [PATCH 084/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 7c1f085c8..9e66183ff 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,8 +4324,6 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; -static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; - static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4367,6 +4365,8 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,8 +4381,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4395,9 +4393,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_time_total = - R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From 30e4b7c19793aeef7b936ee47ec9aa6ff5db6f51 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:04:00 +0100 Subject: [PATCH 085/138] :memo: Fixed pyfiction docstrings --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 9e66183ff..7c1f085c8 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,6 +4324,8 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; +static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4365,8 +4367,6 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,6 +4381,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4393,6 +4395,9 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_time_total = + R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From 155ab73eaf8b9ba35bf4abd8dc4587f2c51157d1 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:17:29 +0100 Subject: [PATCH 086/138] :memo: Added a docstring to `order_designed_sidb_gates` --- .../compare_designed_sidb_gates.hpp | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index 587d1551f..980b70522 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -38,7 +38,7 @@ class designed_sidb_gates_comparator typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; }; - designed_sidb_gates_comparator() = delete; + designed_sidb_gates_comparator() = delete; virtual ~designed_sidb_gates_comparator() = default; designed_sidb_gates_comparator& operator=(const designed_sidb_gates_comparator& other) noexcept = default; @@ -57,6 +57,18 @@ class designed_sidb_gates_comparator template using designed_sidb_gates_ordering_recipe = std::vector>>; +/** + * The designed SiDB gates are ordered inplace according to the given ordering recipe. Comparators that occur earlier in + * the recipe have a higher precedence. Two designed gates are compared using the recipe as follows: iterating through + * the comparators in the order of precedence, the `equals` function is invoked. When the current comparator judges the + * two gate implementations to be equal, we move on to the next comparator. This proceeds until one comparator judges + * non-equality, in which case `operator()` is invoked, which implements `<`. If all comparators judge the two gate + * implementations to be equal, `operator()` is invoked on the last in the recipe. + * + * @tparam Lyt SiDB cell-level layout. + * @param recipe A list of comparators that compose a recipe for determining an ordering of the designed SiDB gates. + * @param designed_gates The gates that were designed that are to be ordered by the given ordering recipe. + */ template void order_designed_sidb_gates(const designed_sidb_gates_ordering_recipe& recipe, designed_sidb_gates& designed_gates) noexcept From 9dcfd48c914ab4a7c31e4aea38db78dd95557526 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:18:09 +0100 Subject: [PATCH 087/138] :snake: Fixed duplicate definition of nested enum definitions --- .../physical_design/design_sidb_gates.hpp | 53 ++++++++++--------- 1 file changed, 27 insertions(+), 26 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 465e3c806..1709b82ae 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -29,32 +29,6 @@ void design_sidb_gates(pybind11::module& m) m.def("design_sidb_gates", &fiction::design_sidb_gates, py::arg("skeleton"), py::arg("spec"), py::arg("params") = fiction::design_sidb_gates_params{}, py::arg("stats") = nullptr, DOC(fiction_design_sidb_gates)); - - /** - * Design approach selector type. - */ - py::enum_::design_sidb_gates_mode>( - m, "design_sidb_gates_mode", DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) - .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, - DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) - .value("EXHAUSTIVE_GATE_DESIGNER", - fiction::design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, - DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) - .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, - DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_RANDOM)); - - /** - * Termination condition selector type. - */ - py::enum_::termination_condition>( - m, "design_sidb_gates_params_termination_condition", - DOC(fiction_design_sidb_gates_params_termination_condition)) - .value("AFTER_FIRST_SOLUTION", - fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, - DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) - .value("ALL_COMBINATIONS_ENUMERATED", - fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, - DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); } template @@ -88,6 +62,33 @@ inline void design_sidb_gates(pybind11::module& m) { namespace py = pybind11; + /** + * Design approach selector type. + */ + py::enum_::design_sidb_gates_mode>( + m, "design_sidb_gates_mode", DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) + .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, + DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) + .value("EXHAUSTIVE_GATE_DESIGNER", + fiction::design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) + .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, + DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_RANDOM)); + + /** + * Termination condition selector type. + */ + py::enum_::termination_condition>( + m, "design_sidb_gates_params_termination_condition", + DOC(fiction_design_sidb_gates_params_termination_condition)) + .value("AFTER_FIRST_SOLUTION", + fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, + DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) + .value( + "ALL_COMBINATIONS_ENUMERATED", + fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, + DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); + // stats are defined to be read-only py::class_(m, "design_sidb_gates_stats", DOC(fiction_design_sidb_gates_stats)) From 414dfd6f7411d2c51ed80d4226e559eec27dbcc5 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Wed, 12 Feb 2025 16:19:03 +0000 Subject: [PATCH 088/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../algorithms/physical_design/compare_designed_sidb_gates.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index 980b70522..97ba69851 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -38,7 +38,7 @@ class designed_sidb_gates_comparator typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; }; - designed_sidb_gates_comparator() = delete; + designed_sidb_gates_comparator() = delete; virtual ~designed_sidb_gates_comparator() = default; designed_sidb_gates_comparator& operator=(const designed_sidb_gates_comparator& other) noexcept = default; From 3f3fa8413a414872588c71ed703412288cdfcc5b Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 12 Feb 2025 16:20:03 +0000 Subject: [PATCH 089/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 32 ++++++++++++++----- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 7c1f085c8..745e6c152 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,8 +4324,6 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; -static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; - static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4367,6 +4365,8 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,8 +4381,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4395,9 +4393,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_time_total = - R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; @@ -16937,7 +16932,28 @@ static const char *__doc_fiction_operational_status_NON_OPERATIONAL = R"doc(The static const char *__doc_fiction_operational_status_OPERATIONAL = R"doc(The layout is operational.)doc"; -static const char *__doc_fiction_order_designed_sidb_gates = R"doc()doc"; +static const char *__doc_fiction_order_designed_sidb_gates = +R"doc(The designed SiDB gates are ordered inplace according to the given +ordering recipe. Comparators that occur earlier in the recipe have a +higher precedence. Two designed gates are compared using the recipe as +follows: iterating through the comparators in the order of precedence, +the `equals` function is invoked. When the current comparator judges +the two gate implementations to be equal, we move on to the next +comparator. This proceeds until one comparator judges non-equality, in +which case `operator()` is invoked, which implements `<`. If all +comparators judge the two gate implementations to be equal, +`operator()` is invoked on the last in the recipe. + +Template parameter ``Lyt``: + SiDB cell-level layout. + +Parameter ``recipe``: + A list of comparators that compose a recipe for determining an + ordering of the designed SiDB gates. + +Parameter ``designed_gates``: + The gates that were designed that are to be ordered by the given + ordering recipe.)doc"; static const char *__doc_fiction_orthogonal = R"doc(A scalable placement & routing approach based on orthogonal graph From 145084bb3d364981332566fa9aaf20977815efe4 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:21:56 +0100 Subject: [PATCH 090/138] :memo: Fixed pyfiction docstrings --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 745e6c152..1f774d385 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,6 +4324,8 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; +static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4365,8 +4367,6 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; -static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,6 +4381,8 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4393,6 +4395,9 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; +static const char* __doc_fiction_design_sidb_gates_stats_time_total = + R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; From c4de4d8a340dc4811e549ede74b529ad0bf98d1e Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:28:27 +0100 Subject: [PATCH 091/138] :art: Renamed to `designed_sidb_gate_comparator` --- .../compare_designed_sidb_gates.hpp | 23 +++++++++++-------- .../compare_by_ground_state_isolation.hpp | 12 +++++----- 2 files changed, 20 insertions(+), 15 deletions(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index 97ba69851..deb509c7f 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -29,7 +29,7 @@ struct designed_sidb_gates // every instance of a designed_sidb_gates_comparator should implement operator<, operator==, and have a sensitivity // parameter template -class designed_sidb_gates_comparator +class designed_sidb_gate_comparator { public: struct sidb_gate_design @@ -38,13 +38,13 @@ class designed_sidb_gates_comparator typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; }; - designed_sidb_gates_comparator() = delete; - virtual ~designed_sidb_gates_comparator() = default; + designed_sidb_gate_comparator() = delete; + virtual ~designed_sidb_gate_comparator() = default; - designed_sidb_gates_comparator& operator=(const designed_sidb_gates_comparator& other) noexcept = default; - designed_sidb_gates_comparator& operator=(designed_sidb_gates_comparator&& other) noexcept = default; + designed_sidb_gate_comparator& operator=(const designed_sidb_gate_comparator& other) noexcept = default; + designed_sidb_gate_comparator& operator=(designed_sidb_gate_comparator&& other) noexcept = default; - explicit designed_sidb_gates_comparator(const double sens) noexcept : sensitivity{sens} {} + explicit designed_sidb_gate_comparator(const double sens) noexcept : sensitivity{sens} {} [[nodiscard]] virtual bool operator()(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept = 0; [[nodiscard]] virtual bool equals(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept = 0; @@ -54,8 +54,13 @@ class designed_sidb_gates_comparator }; // use pointers to prevent slicing +/** + * A ordering recipe for designed SiDB gates is a vector of pointers to designed SiDB gate + * + * @tparam Lyt SiDB cell-level layout. + */ template -using designed_sidb_gates_ordering_recipe = std::vector>>; +using designed_sidb_gates_ordering_recipe = std::vector>>; /** * The designed SiDB gates are ordered inplace according to the given ordering recipe. Comparators that occur earlier in @@ -76,13 +81,13 @@ void order_designed_sidb_gates(const designed_sidb_gates_ordering_recipe& r assert(designed_gates.simulation_results.has_value() && "Simulation results must be available for gate design ordering"); - std::vector::sidb_gate_design> gate_designs_for_assessment{}; + std::vector::sidb_gate_design> gate_designs_for_assessment{}; gate_designs_for_assessment.reserve(designed_gates.gate_layouts.size()); // pair the gate layouts with the associated simulation results using move for (uint64_t i = 0; i < designed_gates.gate_layouts.size(); ++i) { - gate_designs_for_assessment.emplace_back(typename designed_sidb_gates_comparator::sidb_gate_design{ + gate_designs_for_assessment.emplace_back(typename designed_sidb_gate_comparator::sidb_gate_design{ std::move(designed_gates.gate_layouts.at(i)), std::move(designed_gates.simulation_results.value().at(i))}); } diff --git a/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp b/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp index e1cce1442..21e3c1580 100644 --- a/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp +++ b/include/fiction/algorithms/simulation/sidb/compare_by_ground_state_isolation.hpp @@ -44,14 +44,14 @@ template } // namespace detail template -class compare_by_minimum_ground_state_isolation final : public designed_sidb_gates_comparator +class compare_by_minimum_ground_state_isolation final : public designed_sidb_gate_comparator { public: - using typename designed_sidb_gates_comparator::sidb_gate_design; + using typename designed_sidb_gate_comparator::sidb_gate_design; explicit compare_by_minimum_ground_state_isolation( const double sens = std::numeric_limits::epsilon()) noexcept : - designed_sidb_gates_comparator{sens} + designed_sidb_gate_comparator{sens} {} [[nodiscard]] bool operator()(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept override @@ -82,14 +82,14 @@ class compare_by_minimum_ground_state_isolation final : public designed_sidb_gat }; template -class compare_by_average_ground_state_isolation final : public designed_sidb_gates_comparator +class compare_by_average_ground_state_isolation final : public designed_sidb_gate_comparator { public: - using typename designed_sidb_gates_comparator::sidb_gate_design; + using typename designed_sidb_gate_comparator::sidb_gate_design; explicit compare_by_average_ground_state_isolation( const double sens = std::numeric_limits::epsilon()) noexcept : - designed_sidb_gates_comparator{sens} + designed_sidb_gate_comparator{sens} {} [[nodiscard]] bool operator()(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept override From 495beb61c800fc5068a6a37342bb98b400c2df72 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:35:45 +0100 Subject: [PATCH 092/138] :memo: Added some docstrings --- .../compare_designed_sidb_gates.hpp | 24 +++++++++++++++---- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index deb509c7f..fa017fc71 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -16,13 +16,27 @@ namespace fiction { +/** + * This struct is used to store designed gate layouts, optionally along with their respective simulation results for + * each input. + * + * @tparam Lyt SiDB cell-level layout + */ template struct designed_sidb_gates { + /** + * Simulation results per input is a vector of simulation results (which is a vector of charge distribution + * surfaces) that occur in the order of the bit representation of the respectively associated inputs. + */ using simulation_results_per_input = std::vector>>; - + /** + * The designed SiDB gate layouts are stored here. + */ std::vector gate_layouts; - + /** + * Optionally, the respectively associated simulation results for each input are stored here. + */ std::optional> simulation_results; }; @@ -38,7 +52,7 @@ class designed_sidb_gate_comparator typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; }; - designed_sidb_gate_comparator() = delete; + designed_sidb_gate_comparator() = delete; virtual ~designed_sidb_gate_comparator() = default; designed_sidb_gate_comparator& operator=(const designed_sidb_gate_comparator& other) noexcept = default; @@ -53,9 +67,9 @@ class designed_sidb_gate_comparator double sensitivity; }; -// use pointers to prevent slicing /** - * A ordering recipe for designed SiDB gates is a vector of pointers to designed SiDB gate + * An ordering recipe for designed SiDB gates is a vector of pointers to designed SiDB gate comparators. Pointers are + * used to prevent slicing. * * @tparam Lyt SiDB cell-level layout. */ From 4f27b5942d096379bfc564cddfd919e82c03b73e Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:39:52 +0100 Subject: [PATCH 093/138] :snake: Dangling identifier in `__init__.py` --- bindings/mnt/pyfiction/__init__.py | 2 -- 1 file changed, 2 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index 4d29bed98..736e30e35 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -236,7 +236,6 @@ population_stability_information_100, population_stability_information_111, positive_charges, - post_design_mode, post_layout_optimization, post_layout_optimization_params, post_layout_optimization_stats, @@ -553,7 +552,6 @@ "population_stability_information_100", "population_stability_information_111", "positive_charges", - "post_design_mode", "post_layout_optimization", "post_layout_optimization_params", "post_layout_optimization_stats", From 7ba74b1a935a188e6dba0831947b2d9d15c1af51 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:41:41 +0100 Subject: [PATCH 094/138] Revert ":green_heart: Do not run pyfiction docstring generator upon edits to only `pybind11_mkdoc_docstrings.hpp`" This reverts commit 1905e6602fa6726ca5dc756919ba0f5a78a39e20. --- .github/workflows/pyfiction-docstring-generator.yml | 1 - 1 file changed, 1 deletion(-) diff --git a/.github/workflows/pyfiction-docstring-generator.yml b/.github/workflows/pyfiction-docstring-generator.yml index cbf8e767a..c6a015b48 100644 --- a/.github/workflows/pyfiction-docstring-generator.yml +++ b/.github/workflows/pyfiction-docstring-generator.yml @@ -4,7 +4,6 @@ on: push: paths: - "**/*.hpp" - - "!**/pybind11_mkdoc_docstrings.hpp" - ".github/workflows/pyfiction-docstring-generator.yml" workflow_dispatch: From dab05b8aeddabde78cc0a4d1c7311c4694e2b782 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 17:48:14 +0100 Subject: [PATCH 095/138] :memo: Added `_overridden` pyfiction docstrings --- .../algorithms/physical_design/design_sidb_gates.hpp | 6 +++--- .../mnt/pyfiction/include/pyfiction/documentation.hpp | 9 +++++++++ 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 1709b82ae..692494263 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -47,7 +47,7 @@ void design_sidb_gates_params(pybind11::module& m, const std::string& lattice = .def_readwrite("design_mode", &fiction::design_sidb_gates_params::design_mode, DOC(fiction_design_sidb_gates_params_design_mode)) .def_readwrite("canvas", &fiction::design_sidb_gates_params::canvas, - DOC(fiction_design_sidb_gates_params_canvas)) + DOC(fiction_design_sidb_gates_params_canvas_overridden)) .def_readwrite("number_of_sidbs", &fiction::design_sidb_gates_params::number_of_sidbs, DOC(fiction_design_sidb_gates_params_number_of_sidbs)) .def_readwrite("termination_cond", &fiction::design_sidb_gates_params::termination_cond, @@ -94,9 +94,9 @@ inline void design_sidb_gates(pybind11::module& m) py::class_(m, "design_sidb_gates_stats", DOC(fiction_design_sidb_gates_stats)) .def(py::init<>()) .def_readonly("time_total", &fiction::design_sidb_gates_stats::time_total, - DOC(fiction_design_sidb_gates_stats_time_total)) + DOC(fiction_design_sidb_gates_stats_time_total_overridden)) .def_readonly("pruning_total", &fiction::design_sidb_gates_stats::pruning_total, - DOC(fiction_design_sidb_gates_stats_pruning_total)) + DOC(fiction_design_sidb_gates_stats_pruning_total_overridden)) .def_readonly("sim_engine", &fiction::design_sidb_gates_stats::sim_engine, DOC(fiction_design_sidb_gates_stats_sim_engine)) .def_readonly("number_of_layouts", &fiction::design_sidb_gates_stats::number_of_layouts, diff --git a/bindings/mnt/pyfiction/include/pyfiction/documentation.hpp b/bindings/mnt/pyfiction/include/pyfiction/documentation.hpp index 821faa4cb..debe1c0d6 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/documentation.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/documentation.hpp @@ -92,4 +92,13 @@ empty layout coordinates. Returns: The minimum and maximum enclosing coordinate in the associated layout.)doc"; +static const char* __doc_fiction_design_sidb_gates_params_canvas_overridden = + R"doc(Canvas spanned by the northwest and southeast cell.)doc"; + +static const char* __doc_fiction_design_sidb_gates_stats_pruning_total_overridden = + R"doc(The total runtime of the process.)doc"; + +static const char* __doc_fiction_design_sidb_gates_stats_time_total_overridden = + R"doc(The total runtime of the SiDB gate design process.)doc"; + #endif // FICTION_DOCSTRINGS_HPP From 8ee0c69e93d31dd44b3533a49ad872a92383b9d2 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Wed, 12 Feb 2025 16:48:47 +0000 Subject: [PATCH 096/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../algorithms/physical_design/compare_designed_sidb_gates.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index fa017fc71..459a9e774 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -52,7 +52,7 @@ class designed_sidb_gate_comparator typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; }; - designed_sidb_gate_comparator() = delete; + designed_sidb_gate_comparator() = delete; virtual ~designed_sidb_gate_comparator() = default; designed_sidb_gate_comparator& operator=(const designed_sidb_gate_comparator& other) noexcept = default; From 7361029c9d061468deb14e0008c3e87c667c510c Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 12 Feb 2025 16:49:36 +0000 Subject: [PATCH 097/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 42 ++++++++++--------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index 1f774d385..b708a7815 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4324,8 +4324,6 @@ R"doc(This struct contains parameters and settings to design SiDB gates. Template parameter ``Lyt``: SiDB cell-level layout type.)doc"; -static const char* __doc_fiction_design_sidb_gates_params_canvas = R"doc(Canvas spanned by the northwest and southeast cell.)doc"; - static const char *__doc_fiction_design_sidb_gates_params_design_mode = R"doc(Gate design mode.)doc"; static const char *__doc_fiction_design_sidb_gates_params_design_sidb_gates_mode = R"doc(Selector for the available design approaches.)doc"; @@ -4367,6 +4365,8 @@ within the canvas are enumerated.)doc"; static const char *__doc_fiction_design_sidb_gates_stats = R"doc(Statistics for the design of SiDB gates.)doc"; +static const char *__doc_fiction_design_sidb_gates_stats_duration = R"doc(The total runtime of the SiDB gate design process.)doc"; + static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts = R"doc(The number of all possible layouts.)doc"; static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after_first_pruning = @@ -4381,8 +4381,6 @@ static const char *__doc_fiction_design_sidb_gates_stats_number_of_layouts_after R"doc(The number of layouts that remain after third pruning (discarding layouts with unstable I/O signals).)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_pruning_total = R"doc(The total runtime of the process.)doc"; - static const char *__doc_fiction_design_sidb_gates_stats_report = R"doc(This function outputs the total time taken for the SiDB gate design process to the provided output stream. If no output stream is @@ -4395,36 +4393,40 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; -static const char* __doc_fiction_design_sidb_gates_stats_time_total = - R"doc(The total runtime of the SiDB gate design process.)doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator_2 = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_designed_sidb_gates_comparator = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_equals = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_designed_sidb_gates_comparator_2 = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_operator_assign = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_equals = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_operator_assign_2 = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_operator_assign = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_operator_call = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_operator_assign_2 = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sensitivity = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_operator_call = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_sensitivity = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design_gate_design = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_sidb_gate_design = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design_simulation_results_per_input = R"doc()doc"; -static const char *__doc_fiction_designed_sidb_gates_comparator_sidb_gate_design_gate_design = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gates = +R"doc(This struct is used to store designed gate layouts, optionally along +with their respective simulation results for each input. -static const char *__doc_fiction_designed_sidb_gates_comparator_sidb_gate_design_simulation_results_per_input = R"doc()doc"; +Template parameter ``Lyt``: + SiDB cell-level layout)doc"; -static const char *__doc_fiction_designed_sidb_gates_gate_layouts = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gates_gate_layouts = R"doc(The designed SiDB gate layouts are stored here.)doc"; -static const char *__doc_fiction_designed_sidb_gates_simulation_results = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gates_simulation_results = +R"doc(Optionally, the respectively associated simulation results for each +input are stored here.)doc"; static const char *__doc_fiction_detail_a_star_impl = R"doc()doc"; From 6b52427b615a0f89ddb910cc126ed1408845d885 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 18:19:05 +0100 Subject: [PATCH 098/138] :memo: Finished the docstrings for `compare_designed_sidb_gates.hpp` --- .../compare_designed_sidb_gates.hpp | 91 ++++++++++++++++--- 1 file changed, 77 insertions(+), 14 deletions(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index 459a9e774..6f043c9b9 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -39,34 +39,98 @@ struct designed_sidb_gates */ std::optional> simulation_results; }; - -// every instance of a designed_sidb_gates_comparator should implement operator<, operator==, and have a sensitivity -// parameter +/** + * A designed SiDB gate comparator is used to compare two designed SiDB gates. It offers an equality comparison, of + * which the sensitivity depends on the `sensitivity` parameter given to the comparator, and a strict comparator. These + * ingredients allow a chaining of comparators, in which the result of the strict comparison is returned of the first + * comparator in the chain that judges that the two designed SiDB gates to compare are not equal, as determined by its + * respective sensitivity parameter. + * + * @tparam Lyt SiDB cell-level layout. + */ template class designed_sidb_gate_comparator { public: + /** + * This struct is used to pair a gate design with its respective simulation results per input. + */ struct sidb_gate_design { - Lyt gate_design; + /** + * The designed SiDB gate layout. + */ + Lyt gate_design; + /** + * The respectively associated simulation results per input. + */ typename designed_sidb_gates::simulation_results_per_input simulation_results_per_input; }; - - designed_sidb_gate_comparator() = delete; + /** + * The default no-arguments constructor is deleted. + */ + explicit designed_sidb_gate_comparator() = delete; + /** + * Destructor. + */ virtual ~designed_sidb_gate_comparator() = default; - + /** + * Standard constructor. + * + * @param sens Determines the sensitivity of the equality comparison. + */ + explicit designed_sidb_gate_comparator(const double sens) noexcept : sensitivity{sens} + { + assert(sensitivity >= 0.0 && "The given sensitivity is negative."); + } + /** + * Copy constructor. + * + * @param other Other comparator to copy. + */ + designed_sidb_gate_comparator(const designed_sidb_gate_comparator& other) noexcept = default; + /** + * Move constructor. + * + * @param other Other comparator to move to this one. + */ + designed_sidb_gate_comparator(designed_sidb_gate_comparator&& other) noexcept = default; + /** + * Copy assignment operator. + * + * @param other Other comparator to copy. + */ designed_sidb_gate_comparator& operator=(const designed_sidb_gate_comparator& other) noexcept = default; - designed_sidb_gate_comparator& operator=(designed_sidb_gate_comparator&& other) noexcept = default; - - explicit designed_sidb_gate_comparator(const double sens) noexcept : sensitivity{sens} {} - + /** + * Move assignment operator. + * + * @param other Other comparator to move to this one. + */ + designed_sidb_gate_comparator& operator=(designed_sidb_gate_comparator&& other) noexcept = default; + /** + * Each designed SiDB gate comparator must implement a strict comparator. + * + * @param lhs Left hand side argument. + * @param rhs Right hand side argument. + * @return `lhs < rhs` + */ [[nodiscard]] virtual bool operator()(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept = 0; - [[nodiscard]] virtual bool equals(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept = 0; + /** + * Each designed SiDB gate comparator must implement an equality comparison. + * + * @param lhs Left hand side argument. + * @param rhs Right hand side argument. + * @return `lhs = rhs` + */ + [[nodiscard]] virtual bool equals(const sidb_gate_design& lhs, const sidb_gate_design& rhs) const noexcept = 0; protected: + /** + * Each designed SiDB gate comparator depends on a sensitivity parameter, which determines the sensitivity of the + * equality comparison. + */ double sensitivity; }; - /** * An ordering recipe for designed SiDB gates is a vector of pointers to designed SiDB gate comparators. Pointers are * used to prevent slicing. @@ -75,7 +139,6 @@ class designed_sidb_gate_comparator */ template using designed_sidb_gates_ordering_recipe = std::vector>>; - /** * The designed SiDB gates are ordered inplace according to the given ordering recipe. Comparators that occur earlier in * the recipe have a higher precedence. Two designed gates are compared using the recipe as follows: iterating through From 9ae9997f1f6bf2cf0d6583125429c34f5d8c0668 Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Wed, 12 Feb 2025 17:20:07 +0000 Subject: [PATCH 099/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 82 ++++++++++++++++--- 1 file changed, 71 insertions(+), 11 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index b708a7815..22056ee6e 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -4393,27 +4393,87 @@ static const char *__doc_fiction_design_sidb_gates_stats_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; -static const char *__doc_fiction_designed_sidb_gate_comparator = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator = +R"doc(A designed SiDB gate comparator is used to compare two designed SiDB +gates. It offers an equality comparison, of which the sensitivity +depends on the `sensitivity` parameter given to the comparator, and a +strict comparator. These ingredients allow a chaining of comparators, +in which the result of the strict comparison is returned of the first +comparator in the chain that judges that the two designed SiDB gates +to compare are not equal, as determined by its respective sensitivity +parameter. -static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator = R"doc()doc"; +Template parameter ``Lyt``: + SiDB cell-level layout.)doc"; + +static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator = R"doc(The default no-arguments constructor is deleted.)doc"; + +static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator_2 = +R"doc(Standard constructor. + +Parameter ``sens``: + Determines the sensitivity of the equality comparison.)doc"; + +static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator_3 = +R"doc(Copy constructor. + +Parameter ``other``: + Other comparator to copy.)doc"; + +static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator_4 = +R"doc(Move constructor. + +Parameter ``other``: + Other comparator to move to this one.)doc"; + +static const char *__doc_fiction_designed_sidb_gate_comparator_equals = +R"doc(Each designed SiDB gate comparator must implement an equality +comparison. -static const char *__doc_fiction_designed_sidb_gate_comparator_designed_sidb_gate_comparator_2 = R"doc()doc"; +Parameter ``lhs``: + Left hand side argument. -static const char *__doc_fiction_designed_sidb_gate_comparator_equals = R"doc()doc"; +Parameter ``rhs``: + Right hand side argument. + +Returns: + `lhs = rhs`)doc"; + +static const char *__doc_fiction_designed_sidb_gate_comparator_operator_assign = +R"doc(Copy assignment operator. + +Parameter ``other``: + Other comparator to copy.)doc"; -static const char *__doc_fiction_designed_sidb_gate_comparator_operator_assign = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_operator_assign_2 = +R"doc(Move assignment operator. + +Parameter ``other``: + Other comparator to move to this one.)doc"; + +static const char *__doc_fiction_designed_sidb_gate_comparator_operator_call = +R"doc(Each designed SiDB gate comparator must implement a strict comparator. -static const char *__doc_fiction_designed_sidb_gate_comparator_operator_assign_2 = R"doc()doc"; +Parameter ``lhs``: + Left hand side argument. -static const char *__doc_fiction_designed_sidb_gate_comparator_operator_call = R"doc()doc"; +Parameter ``rhs``: + Right hand side argument. + +Returns: + `lhs < rhs`)doc"; -static const char *__doc_fiction_designed_sidb_gate_comparator_sensitivity = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sensitivity = +R"doc(Each designed SiDB gate comparator depends on a sensitivity parameter, +which determines the sensitivity of the equality comparison.)doc"; -static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design = +R"doc(This struct is used to pair a gate design with its respective +simulation results per input.)doc"; -static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design_gate_design = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design_gate_design = R"doc(The designed SiDB gate layout.)doc"; -static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design_simulation_results_per_input = R"doc()doc"; +static const char *__doc_fiction_designed_sidb_gate_comparator_sidb_gate_design_simulation_results_per_input = R"doc(The respectively associated simulation results per input.)doc"; static const char *__doc_fiction_designed_sidb_gates = R"doc(This struct is used to store designed gate layouts, optionally along From fe26104d4142bdf5b373848cccac3359e67bdc38 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 12 Feb 2025 18:21:55 +0100 Subject: [PATCH 100/138] :art: Added `noexcept` --- .../algorithms/physical_design/compare_designed_sidb_gates.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp index 6f043c9b9..8cde82822 100644 --- a/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/compare_designed_sidb_gates.hpp @@ -73,7 +73,7 @@ class designed_sidb_gate_comparator /** * Destructor. */ - virtual ~designed_sidb_gate_comparator() = default; + virtual ~designed_sidb_gate_comparator() noexcept = default; /** * Standard constructor. * From 1e81996a2ac9e804920ee39f4bee9c56692c0a4c Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 13:28:50 +0100 Subject: [PATCH 101/138] :snake: Made selector types lattice-specific. --- bindings/mnt/pyfiction/__init__.py | 12 ++-- .../physical_design/design_sidb_gates.hpp | 57 ++++++++++--------- .../physical_design/test_design_sidb_gates.py | 9 +-- 3 files changed, 43 insertions(+), 35 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index 736e30e35..a2adade08 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -111,10 +111,12 @@ defect_extent, dependent_cell_mode, design_sidb_gates, - design_sidb_gates_mode, + design_sidb_gates_mode_100, + design_sidb_gates_mode_111, design_sidb_gates_params_100, design_sidb_gates_params_111, - design_sidb_gates_params_termination_condition, + design_sidb_gates_params_termination_condition_100, + design_sidb_gates_params_termination_condition_111, detect_bdl_pairs, detect_bdl_pairs_params, detect_bdl_wires_100, @@ -427,10 +429,12 @@ "defect_extent", "dependent_cell_mode", "design_sidb_gates", - "design_sidb_gates_mode", + "design_sidb_gates_mode_100", + "design_sidb_gates_mode_111", "design_sidb_gates_params_100", "design_sidb_gates_params_111", - "design_sidb_gates_params_termination_condition", + "design_sidb_gates_params_termination_condition_100", + "design_sidb_gates_params_termination_condition_111", "detect_bdl_pairs", "detect_bdl_pairs_params", "detect_bdl_wires_100", diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index 692494263..a44a8676e 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -36,37 +36,14 @@ void design_sidb_gates_params(pybind11::module& m, const std::string& lattice = { namespace py = pybind11; - /** - * Parameters. - */ - py::class_>(m, fmt::format("design_sidb_gates_params{}", lattice).c_str(), - DOC(fiction_design_sidb_gates_params)) - .def(py::init<>()) - .def_readwrite("operational_params", &fiction::design_sidb_gates_params::operational_params, - DOC(fiction_design_sidb_gates_params_operational_params)) - .def_readwrite("design_mode", &fiction::design_sidb_gates_params::design_mode, - DOC(fiction_design_sidb_gates_params_design_mode)) - .def_readwrite("canvas", &fiction::design_sidb_gates_params::canvas, - DOC(fiction_design_sidb_gates_params_canvas_overridden)) - .def_readwrite("number_of_sidbs", &fiction::design_sidb_gates_params::number_of_sidbs, - DOC(fiction_design_sidb_gates_params_number_of_sidbs)) - .def_readwrite("termination_cond", &fiction::design_sidb_gates_params::termination_cond, - DOC(fiction_design_sidb_gates_params_termination_cond)) - .def_readwrite("post_design_process", &fiction::design_sidb_gates_params::post_design_process, - DOC(fiction_design_sidb_gates_params_post_design_process)); -} - -} // namespace detail - -inline void design_sidb_gates(pybind11::module& m) -{ - namespace py = pybind11; + // TODO: it seems unnecessary to define these selector types for each lattice /** * Design approach selector type. */ py::enum_::design_sidb_gates_mode>( - m, "design_sidb_gates_mode", DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) + m, fmt::format("design_sidb_gates_mode{}", lattice).c_str(), + DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) .value("EXHAUSTIVE_GATE_DESIGNER", @@ -79,7 +56,7 @@ inline void design_sidb_gates(pybind11::module& m) * Termination condition selector type. */ py::enum_::termination_condition>( - m, "design_sidb_gates_params_termination_condition", + m, fmt::format("design_sidb_gates_params_termination_condition{}", lattice).c_str(), DOC(fiction_design_sidb_gates_params_termination_condition)) .value("AFTER_FIRST_SOLUTION", fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, @@ -89,6 +66,32 @@ inline void design_sidb_gates(pybind11::module& m) fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); + /** + * Parameters. + */ + py::class_>(m, fmt::format("design_sidb_gates_params{}", lattice).c_str(), + DOC(fiction_design_sidb_gates_params)) + .def(py::init<>()) + .def_readwrite("operational_params", &fiction::design_sidb_gates_params::operational_params, + DOC(fiction_design_sidb_gates_params_operational_params)) + .def_readwrite("design_mode", &fiction::design_sidb_gates_params::design_mode, + DOC(fiction_design_sidb_gates_params_design_mode)) + .def_readwrite("canvas", &fiction::design_sidb_gates_params::canvas, + DOC(fiction_design_sidb_gates_params_canvas_overridden)) + .def_readwrite("number_of_sidbs", &fiction::design_sidb_gates_params::number_of_sidbs, + DOC(fiction_design_sidb_gates_params_number_of_sidbs)) + .def_readwrite("termination_cond", &fiction::design_sidb_gates_params::termination_cond, + DOC(fiction_design_sidb_gates_params_termination_cond)) + .def_readwrite("post_design_process", &fiction::design_sidb_gates_params::post_design_process, + DOC(fiction_design_sidb_gates_params_post_design_process)); +} + +} // namespace detail + +inline void design_sidb_gates(pybind11::module& m) +{ + namespace py = pybind11; + // stats are defined to be read-only py::class_(m, "design_sidb_gates_stats", DOC(fiction_design_sidb_gates_stats)) diff --git a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py index 1a3ffe68e..306dba8c3 100644 --- a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py +++ b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py @@ -4,7 +4,8 @@ create_and_tt, create_nor_tt, design_sidb_gates, - design_sidb_gates_mode, + design_sidb_gates_mode_100, + design_sidb_gates_mode_111, design_sidb_gates_params_100, design_sidb_gates_params_111, operational_condition, @@ -39,7 +40,7 @@ def test_siqad_and_gate_skeleton_100(self): params = design_sidb_gates_params_100() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.28 - params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER + params.design_mode = design_sidb_gates_mode_100.EXHAUSTIVE_GATE_DESIGNER params.canvas = [(4, 8), (14, 11)] params.number_of_sidbs = 1 params.operational_params.sim_engine = sidb_simulation_engine.QUICKEXACT @@ -85,7 +86,7 @@ def test_nor_gate_111(self): params = design_sidb_gates_params_111() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.32 - params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER + params.design_mode = design_sidb_gates_mode_111.EXHAUSTIVE_GATE_DESIGNER params.canvas = [(10, 22), (14, 34)] params.number_of_sidbs = 3 params.operational_params.sim_engine = sidb_simulation_engine.QUICKEXACT @@ -136,7 +137,7 @@ def test_nor_gate_111_quickcell(self): params = design_sidb_gates_params_111() params.operational_params.simulation_parameters.base = 2 params.operational_params.simulation_parameters.mu_minus = -0.32 - params.design_mode = design_sidb_gates_mode.EXHAUSTIVE_GATE_DESIGNER + params.design_mode = design_sidb_gates_mode_111.EXHAUSTIVE_GATE_DESIGNER params.canvas = [(10, 26), (14, 34)] params.number_of_sidbs = 3 From 77ee78d59ab72cd194d4579d815e59d7cc0fd7e1 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 14:28:26 +0100 Subject: [PATCH 102/138] :art: Make the `params` member variable `const` --- .../physical_design/design_sidb_gates.hpp | 26 ++++++++++++------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp index 4122515e9..36e82753b 100644 --- a/include/fiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/include/fiction/algorithms/physical_design/design_sidb_gates.hpp @@ -169,11 +169,11 @@ class design_sidb_gates_impl * @param ps Parameters and settings for the gate designer. * @param st Statistics for the gate design process. */ - design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, design_sidb_gates_params ps, + design_sidb_gates_impl(const Lyt& skeleton, const std::vector& spec, const design_sidb_gates_params& ps, design_sidb_gates_stats& st) : skeleton_layout{skeleton}, truth_table{spec}, - params{ps}, + params{set_operational_params_accordingly(ps)}, all_sidbs_in_canvas{all_coordinates_in_spanned_area(params.canvas.first, params.canvas.second)}, stats{st}, input_bdl_wires{detect_bdl_wires(skeleton_layout, @@ -187,8 +187,6 @@ class design_sidb_gates_impl { stats.number_of_layouts = binomial_coefficient(all_sidbs_in_canvas.size(), params.number_of_sidbs); stats.sim_engine = params.operational_params.sim_engine; - - set_operational_params_accordingly(); } /** * Design gates by using the *Automatic Exhaustive Gate Designer*. This algorithm was proposed in \"Minimal @@ -384,7 +382,7 @@ class design_sidb_gates_impl /** * Parameters for the *SiDB Gate Designer*. */ - design_sidb_gates_params params; + const design_sidb_gates_params params; /** * All cells within the canvas. */ @@ -689,20 +687,28 @@ class design_sidb_gates_impl /** * This function makes sure that underlying parameters for `is_operational` are set according to the given * parameters for `design_sidb_gates`. + * + * @param params The given parameters for `design_sidb_gates`. + * @return The same parameters, but now the underlying parameters for `is_operational` are adjusted accordingly. */ - void set_operational_params_accordingly() noexcept + static design_sidb_gates_params + set_operational_params_accordingly(const design_sidb_gates_params& params) noexcept { - if (!params.post_design_process.empty()) + design_sidb_gates_params new_params{params}; + + if (!new_params.post_design_process.empty()) { - params.operational_params.simulation_results_retention = + new_params.operational_params.simulation_results_retention = is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS; } - if (params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL) + if (new_params.design_mode == design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL) { - params.operational_params.strategy_to_analyze_operational_status = + new_params.operational_params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::SIMULATION_ONLY; } + + return new_params; } }; From 8aaf1d2ffc171a3d285c15f75368b3ce753e8e4a Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 14:32:24 +0100 Subject: [PATCH 103/138] :adhesive_bandage: Forgotten template argument adjustments --- .../physical_design/design_sidb_gates.hpp | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index a44a8676e..ed3241989 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -41,29 +41,29 @@ void design_sidb_gates_params(pybind11::module& m, const std::string& lattice = /** * Design approach selector type. */ - py::enum_::design_sidb_gates_mode>( + py::enum_::design_sidb_gates_mode>( m, fmt::format("design_sidb_gates_mode{}", lattice).c_str(), DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode)) - .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, + .value("QUICKCELL", fiction::design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) .value("EXHAUSTIVE_GATE_DESIGNER", - fiction::design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, + fiction::design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_QUICKCELL)) - .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, + .value("RANDOM", fiction::design_sidb_gates_params::design_sidb_gates_mode::RANDOM, DOC(fiction_design_sidb_gates_params_design_sidb_gates_mode_RANDOM)); /** * Termination condition selector type. */ - py::enum_::termination_condition>( + py::enum_::termination_condition>( m, fmt::format("design_sidb_gates_params_termination_condition{}", lattice).c_str(), DOC(fiction_design_sidb_gates_params_termination_condition)) .value("AFTER_FIRST_SOLUTION", - fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, + fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) .value( "ALL_COMBINATIONS_ENUMERATED", - fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, + fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); /** From a6889b40be7343512ca2f9d76cfd738ff347f203 Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Thu, 13 Feb 2025 13:33:18 +0000 Subject: [PATCH 104/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../include/pyfiction/pybind11_mkdoc_docstrings.hpp | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index bf32fb5de..ee7cf1a39 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -6072,7 +6072,14 @@ parameters. The design process is parallelized to improve performance. static const char *__doc_fiction_detail_design_sidb_gates_impl_set_operational_params_accordingly = R"doc(This function makes sure that underlying parameters for `is_operational` are set according to the given parameters for -`design_sidb_gates`.)doc"; +`design_sidb_gates`. + +Parameter ``params``: + The given parameters for `design_sidb_gates`. + +Returns: + The same parameters, but now the underlying parameters for + `is_operational` are adjusted accordingly.)doc"; static const char *__doc_fiction_detail_design_sidb_gates_impl_skeleton_layout = R"doc(The skeleton layout serves as a starting layout to which SiDBs are From 9e02436ca306a8a2b2d51ec14921f37521ad09c1 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 14:38:24 +0100 Subject: [PATCH 105/138] :art: reformat --- .../algorithms/physical_design/design_sidb_gates.hpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp index ed3241989..ec0df96a8 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/physical_design/design_sidb_gates.hpp @@ -61,10 +61,9 @@ void design_sidb_gates_params(pybind11::module& m, const std::string& lattice = .value("AFTER_FIRST_SOLUTION", fiction::design_sidb_gates_params::termination_condition::AFTER_FIRST_SOLUTION, DOC(fiction_design_sidb_gates_params_termination_condition_AFTER_FIRST_SOLUTION)) - .value( - "ALL_COMBINATIONS_ENUMERATED", - fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, - DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); + .value("ALL_COMBINATIONS_ENUMERATED", + fiction::design_sidb_gates_params::termination_condition::ALL_COMBINATIONS_ENUMERATED, + DOC(fiction_design_sidb_gates_params_termination_condition_ALL_COMBINATIONS_ENUMERATED)); /** * Parameters. From 377c5ffd4746c8f8275b097a021e82bb4b6aa65a Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 15:55:30 +0100 Subject: [PATCH 106/138] :snake: Forgot to adjust a test after changing the return type of `is_operational` --- .../algorithms/simulation/sidb/test_is_operational.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py index d710b3317..2c21745da 100644 --- a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py +++ b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py @@ -128,16 +128,16 @@ def test_and_gate_111_lattice_11_input_pattern(self): # filer only params.strategy_to_analyze_operational_status = operational_analysis_strategy.FILTER_ONLY self.assertEqual(params.strategy_to_analyze_operational_status, operational_analysis_strategy.FILTER_ONLY) - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.NON_OPERATIONAL) + assessment_results = is_operational(lyt, [create_and_tt()], params) + self.assertEqual(assessment_results.status, operational_status.NON_OPERATIONAL) # filer then simulation params.strategy_to_analyze_operational_status = operational_analysis_strategy.FILTER_THEN_SIMULATION self.assertEqual( params.strategy_to_analyze_operational_status, operational_analysis_strategy.FILTER_THEN_SIMULATION ) - [op_status, _evaluated_input_combinations] = is_operational(lyt, [create_and_tt()], params) - self.assertEqual(op_status, operational_status.NON_OPERATIONAL) + assessment_results = is_operational(lyt, [create_and_tt()], params) + self.assertEqual(assessment_results.status, operational_status.NON_OPERATIONAL) def test_and_gate_111_lattice_operational_input_pattern(self): lyt = read_sqd_layout_111(dir_path + "/../../../resources/AND_mu_032_111_surface.sqd") From 34323b5283596ed177c30c889cd694be98ef293a Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 16:12:12 +0100 Subject: [PATCH 107/138] :art: Removed extra semicolon --- include/fiction/algorithms/simulation/sidb/is_operational.hpp | 1 - 1 file changed, 1 deletion(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index bc8fbde1d..030d23175 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -503,7 +503,6 @@ class is_operational_impl { typename operational_assessment::operational_assessment_for_input assessment_results_for_this_input_combination{operational_status::OPERATIONAL}; - ; // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) From de6b4949ccaa6ec512ad33fe9bffc3a940918f6a Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 18:52:04 +0100 Subject: [PATCH 108/138] :sparkles: Added `operational_condition_positive_charges` --- bindings/mnt/pyfiction/__init__.py | 6 +- .../simulation/sidb/is_operational.hpp | 28 +++++-- .../physical_design/test_design_sidb_gates.py | 6 +- .../simulation/sidb/test_is_operational.py | 4 +- .../simulation/sidb/is_operational.hpp | 82 +++++++++++++------ .../simulation/sidb/is_operational.cpp | 73 ++++++++++++----- 6 files changed, 137 insertions(+), 62 deletions(-) diff --git a/bindings/mnt/pyfiction/__init__.py b/bindings/mnt/pyfiction/__init__.py index d7f570c75..84e55b95c 100644 --- a/bindings/mnt/pyfiction/__init__.py +++ b/bindings/mnt/pyfiction/__init__.py @@ -216,7 +216,8 @@ operational_assessment_111, operational_assessment_for_input_100, operational_assessment_for_input_111, - operational_condition, + operational_condition_kinks, + operational_condition_positive_charges, operational_domain, operational_domain_contour_tracing, operational_domain_flood_fill, @@ -542,7 +543,8 @@ "operational_assessment_111", "operational_assessment_for_input_100", "operational_assessment_for_input_111", - "operational_condition", + "operational_condition_kinks", + "operational_condition_positive_charges", "operational_domain", "operational_domain_contour_tracing", "operational_domain_flood_fill", diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index 6bf7c3d92..cfee5755a 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -126,12 +126,22 @@ inline void is_operational(pybind11::module& m) .value("NON_OPERATIONAL", fiction::operational_status::NON_OPERATIONAL, DOC(fiction_operational_status_NON_OPERATIONAL)); - py::enum_( - m, "operational_condition", DOC(fiction_is_operational_params_operational_condition)) - .value("TOLERATE_KINKS", fiction::is_operational_params::operational_condition::TOLERATE_KINKS, - DOC(fiction_is_operational_params_operational_condition_TOLERATE_KINKS)) - .value("REJECT_KINKS", fiction::is_operational_params::operational_condition::REJECT_KINKS, - DOC(fiction_is_operational_params_operational_condition_REJECT_KINKS)); + py::enum_( + m, "operational_condition_kinks", DOC(fiction_is_operational_params_operational_condition_kinks)) + .value("TOLERATE_KINKS", fiction::is_operational_params::operational_condition_kinks::TOLERATE_KINKS, + DOC(fiction_is_operational_params_operational_condition_kinks_TOLERATE_KINKS)) + .value("REJECT_KINKS", fiction::is_operational_params::operational_condition_kinks::REJECT_KINKS, + DOC(fiction_is_operational_params_operational_condition_kinks_REJECT_KINKS)); + + py::enum_( + m, "operational_condition_positive_charges", + DOC(fiction_is_operational_params_operational_condition_positive_charges)) + .value("REJECT_POSITIVE_CHARGES", + fiction::is_operational_params::operational_condition_positive_charges::REJECT_POSITIVE_CHARGES, + DOC(fiction_is_operational_params_operational_condition_positive_charges_REJECT_POSITIVE_CHARGES)) + .value("TOLERATE_POSITIVE_CHARGES", + fiction::is_operational_params::operational_condition_positive_charges::TOLERATE_POSITIVE_CHARGES, + DOC(fiction_is_operational_params_operational_condition_positive_charges_TOLERATE_POSITIVE_CHARGES)); py::enum_( m, "operational_analysis_strategy", DOC(fiction_is_operational_params_operational_analysis_strategy)) @@ -169,8 +179,10 @@ inline void is_operational(pybind11::module& m) DOC(fiction_is_operational_params_sim_engine)) .def_readwrite("input_bdl_iterator_params", &fiction::is_operational_params::input_bdl_iterator_params, DOC(fiction_is_operational_params_input_bdl_iterator_params)) - .def_readwrite("op_condition", &fiction::is_operational_params::op_condition, - DOC(fiction_is_operational_params_op_condition)) + .def_readwrite("op_condition", &fiction::is_operational_params::op_condition_kinks, + DOC(fiction_is_operational_params_op_condition_kinks)) + .def_readwrite("op_condition", &fiction::is_operational_params::op_condition_positive_charges, + DOC(fiction_is_operational_params_op_condition_positive_charges)) .def_readwrite("strategy_to_analyze_operational_status", &fiction::is_operational_params::strategy_to_analyze_operational_status, DOC(fiction_is_operational_params_strategy_to_analyze_operational_status)) diff --git a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py index 306dba8c3..6098aa29d 100644 --- a/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py +++ b/bindings/mnt/pyfiction/test/algorithms/physical_design/test_design_sidb_gates.py @@ -8,7 +8,7 @@ design_sidb_gates_mode_111, design_sidb_gates_params_100, design_sidb_gates_params_111, - operational_condition, + operational_condition_kinks, sidb_100_lattice, sidb_111_lattice, sidb_simulation_engine, @@ -90,7 +90,7 @@ def test_nor_gate_111(self): params.canvas = [(10, 22), (14, 34)] params.number_of_sidbs = 3 params.operational_params.sim_engine = sidb_simulation_engine.QUICKEXACT - params.operational_params.op_condition = operational_condition.REJECT_KINKS + params.operational_params.op_condition_kinks = operational_condition_kinks.REJECT_KINKS self.assertEqual(params.operational_params.simulation_parameters.mu_minus, -0.32) self.assertEqual(params.number_of_sidbs, 3) @@ -101,7 +101,7 @@ def test_nor_gate_111(self): self.assertEqual(len(designed_gates), 44) # tolerate kink states - params.operational_params.op_condition = operational_condition.TOLERATE_KINKS + params.operational_params.op_condition_kinks = operational_condition_kinks.TOLERATE_KINKS designed_gates = design_sidb_gates(layout, [create_nor_tt()], params) self.assertEqual(len(designed_gates), 175) diff --git a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py index 2c21745da..2a2671ad9 100644 --- a/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py +++ b/bindings/mnt/pyfiction/test/algorithms/simulation/sidb/test_is_operational.py @@ -11,7 +11,7 @@ is_operational_params, kink_induced_non_operational_input_patterns, operational_analysis_strategy, - operational_condition, + operational_condition_kinks, operational_input_patterns, operational_status, read_sqd_layout_100, @@ -81,7 +81,7 @@ def test_and_gate_kinks(self): self.assertEqual(assessment_results.status, operational_status.OPERATIONAL) - params.op_condition = operational_condition.REJECT_KINKS + params.op_condition_kinks = operational_condition_kinks.REJECT_KINKS assessment_results = is_operational(lyt, [create_and_tt()], params) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 030d23175..c0500b81f 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -62,9 +62,9 @@ enum class operational_status : uint8_t struct is_operational_params { /** - * Condition to decide whether a layout is operational or non-operational. + * Condition to decide whether a layout is operational or non-operational, relating to kinks. */ - enum class operational_condition : uint8_t + enum class operational_condition_kinks : uint8_t { /** * Even if the I/O pins show kinks, the layout is still considered as operational. @@ -75,6 +75,21 @@ struct is_operational_params */ REJECT_KINKS }; + /** + * Condition to decide whether a layout is operational or non-operational, relating to positive charges. + */ + enum class operational_condition_positive_charges : uint8_t + { + /** + * Positive charges may not be able to occur. In the case of the converse being true, the layout is considered + * as non-operational. + */ + REJECT_POSITIVE_CHARGES, + /** + * Even if positive charges can occur, the layout is still considered as operational. + */ + TOLERATE_POSITIVE_CHARGES, + }; /** * Simulation method to determine if the layout is operational or non-operational. */ @@ -140,9 +155,14 @@ struct is_operational_params */ bdl_input_iterator_params input_bdl_iterator_params{}; /** - * Condition to decide whether a layout is operational or non-operational. + * Condition to decide whether a layout is operational or non-operational, relating to kinks. */ - operational_condition op_condition = operational_condition::TOLERATE_KINKS; + operational_condition_kinks op_condition_kinks = operational_condition_kinks::TOLERATE_KINKS; + /** + * Condition to decide whether a layout is operational or non-operational, relating to kinks. + */ + operational_condition_positive_charges op_condition_positive_charges = + operational_condition_positive_charges::REJECT_POSITIVE_CHARGES; /** * Strategy to determine whether a layout is operational or non-operational. */ @@ -355,7 +375,7 @@ class is_operational_impl number_of_input_wires{input_bdl_wires.size()}, canvas_lyt{c_lyt} { - if (params.op_condition == is_operational_params::operational_condition::TOLERATE_KINKS) + if (params.op_condition_kinks == is_operational_params::operational_condition_kinks::TOLERATE_KINKS) { output_bdl_pairs = detect_bdl_pairs(layout, sidb_technology::cell_type::OUTPUT, params.input_bdl_iterator_params.bdl_wire_params.bdl_pairs_params); @@ -404,7 +424,9 @@ class is_operational_impl cds_layout.assign_all_charge_states(sidb_charge_state::NEGATIVE); cds_layout.assign_physical_parameters(parameters.simulation_parameters); - if (can_positive_charges_occur(cds_layout, parameters.simulation_parameters)) + if (parameters.op_condition_positive_charges == + is_operational_params::operational_condition_positive_charges::REJECT_POSITIVE_CHARGES && + can_positive_charges_occur(cds_layout, parameters.simulation_parameters)) { return layout_invalidity_reason::POTENTIAL_POSITIVE_CHARGES; } @@ -440,7 +462,7 @@ class is_operational_impl { if (!canvas_lyt.is_empty()) { - if ((parameters.op_condition == is_operational_params::operational_condition::REJECT_KINKS && + if ((parameters.op_condition_kinks == is_operational_params::operational_condition_kinks::REJECT_KINKS && parameters.strategy_to_analyze_operational_status == is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION) || parameters.strategy_to_analyze_operational_status == @@ -505,7 +527,9 @@ class is_operational_impl assessment_results_for_this_input_combination{operational_status::OPERATIONAL}; // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational - if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) + if (parameters.op_condition_positive_charges == + is_operational_params::operational_condition_positive_charges::REJECT_POSITIVE_CHARGES && + can_positive_charges_occur(*bii, parameters.simulation_parameters)) { assessment_results.status = operational_status::NON_OPERATIONAL; @@ -575,7 +599,8 @@ class is_operational_impl } if (non_op_reason == non_operationality_reason::KINKS && - parameters.op_condition == is_operational_params::operational_condition::REJECT_KINKS) + parameters.op_condition_kinks == + is_operational_params::operational_condition_kinks::REJECT_KINKS) { return {assessment_results, non_operationality_reason::KINKS}; } @@ -646,7 +671,9 @@ class is_operational_impl auto non_operational_reason = non_operationality_reason::LOGIC_MISMATCH; // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational - if (can_positive_charges_occur(given_cds, parameters.simulation_parameters)) + if (parameters.op_condition_positive_charges == + is_operational_params::operational_condition_positive_charges::REJECT_POSITIVE_CHARGES && + can_positive_charges_occur(given_cds, parameters.simulation_parameters)) { return {operational_status::NON_OPERATIONAL, non_operationality_reason::LOGIC_MISMATCH}; } @@ -683,7 +710,7 @@ class is_operational_impl } } - if (parameters.op_condition == is_operational_params::operational_condition::REJECT_KINKS) + if (parameters.op_condition_kinks == is_operational_params::operational_condition_kinks::REJECT_KINKS) { assert(!input_bdl_wires.empty() && "No input wires provided."); assert(!output_bdl_wires.empty() && "No output wires provided."); @@ -798,8 +825,7 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) - { + [&cds_layout, &cds_canvas_copy](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -1214,6 +1240,7 @@ class is_operational_impl * * @param ground_state The ground state charge distribution surface. * @param bdl BDL pair to be evaluated. + * @param port Port direction where the BDL pair to be evaluated is. * @return `true` if `0` is encoded, `false` otherwise. */ [[nodiscard]] bool encodes_bit_zero(const charge_distribution_surface& ground_state, @@ -1233,6 +1260,7 @@ class is_operational_impl * * @param ground_state The ground state charge distribution surface. * @param bdl BDL pair to be evaluated. + * @param port Port direction where the BDL pair to be evaluated is. * @return `true` if `1` is encoded, `false` otherwise. */ [[nodiscard]] bool encodes_bit_one(const charge_distribution_surface& ground_state, @@ -1267,8 +1295,9 @@ class is_operational_impl * with auxiliary statistics. */ template -[[nodiscard]] operational_assessment is_operational(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] operational_assessment +is_operational(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -1366,8 +1395,9 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational * @return The count of operational input combinations. */ template -[[nodiscard]] std::set operational_input_patterns(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] std::set +operational_input_patterns(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -1509,7 +1539,7 @@ kink_induced_non_operational_input_patterns(const Lyt& lyt, const std::vector p{lyt, spec, params_with_rejecting_kinks}; @@ -1565,7 +1595,7 @@ template is_operational_params params_with_rejecting_kinks = params; - params_with_rejecting_kinks.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params_with_rejecting_kinks.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; if (canvas_lyt.has_value()) { @@ -1621,8 +1651,9 @@ template * non-operational due to kinks, `false` otherwise. */ template -[[nodiscard]] bool is_kink_induced_non_operational(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] bool +is_kink_induced_non_operational(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -1637,7 +1668,7 @@ template { return a.num_vars() != b.num_vars(); }) == spec.cend()); is_operational_params params_with_rejecting_kinks = params; - params_with_rejecting_kinks.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params_with_rejecting_kinks.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; detail::is_operational_impl p{lyt, spec, params_with_rejecting_kinks}; @@ -1685,7 +1716,7 @@ template { return a.num_vars() != b.num_vars(); }) == spec.cend()); is_operational_params params_with_rejecting_kinks = params; - params_with_rejecting_kinks.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params_with_rejecting_kinks.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; if (canvas_lyt.has_value()) { @@ -1718,8 +1749,9 @@ template * */ template -[[nodiscard]] std::size_t number_of_operational_input_combinations(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] std::size_t +number_of_operational_input_combinations(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); diff --git a/test/algorithms/simulation/sidb/is_operational.cpp b/test/algorithms/simulation/sidb/is_operational.cpp index 3249c9f7d..de0bc9dce 100644 --- a/test/algorithms/simulation/sidb/is_operational.cpp +++ b/test/algorithms/simulation/sidb/is_operational.cpp @@ -36,7 +36,8 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{detect_bdl_wires_params{1.5}, bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, - is_operational_params::operational_condition::TOLERATE_KINKS, + is_operational_params::operational_condition_kinks::TOLERATE_KINKS, + {}, {}, is_operational_params::termination_condition::ALL_INPUT_COMBINATIONS_ASSESSED, is_operational_params::simulation_results_mode::KEEP_SIMULATION_RESULTS}; @@ -61,14 +62,11 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") CHECK(assessment_results.status == operational_status::OPERATIONAL); REQUIRE(assessment_results.assessment_per_input.has_value()); REQUIRE(assessment_results.assessment_per_input.value().size() == 4); - CHECK(assessment_results.assessment_per_input.value().at(0).status == operational_status::OPERATIONAL); - CHECK(!assessment_results.assessment_per_input.value().at(0).simulation_results.has_value()); - CHECK(assessment_results.assessment_per_input.value().at(1).status == operational_status::OPERATIONAL); - CHECK(!assessment_results.assessment_per_input.value().at(1).simulation_results.has_value()); - CHECK(assessment_results.assessment_per_input.value().at(2).status == operational_status::OPERATIONAL); - CHECK(!assessment_results.assessment_per_input.value().at(2).simulation_results.has_value()); - CHECK(assessment_results.assessment_per_input.value().at(3).status == operational_status::OPERATIONAL); - CHECK(!assessment_results.assessment_per_input.value().at(3).simulation_results.has_value()); + for (uint64_t i = 0; i < 4; ++i) + { + CHECK(assessment_results.assessment_per_input.value().at(i).status == operational_status::OPERATIONAL); + CHECK(!assessment_results.assessment_per_input.value().at(i).simulation_results.has_value()); + } const auto assessment_results_and = is_operational(lat, std::vector{create_and_tt()}, op_params); CHECK(assessment_results_and.status == operational_status::NON_OPERATIONAL); @@ -80,6 +78,33 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") CHECK(assessment_results_and.assessment_per_input.value().at(3).status == operational_status::OPERATIONAL); } + SECTION("determine if layout is operational under non-realistic physical parameters, assess all input combinations") + { + const auto check_for_non_operationality = [&lat, &op_params] + { + const auto assessment_results = is_operational(lat, std::vector{create_or_tt()}, op_params); + CHECK(assessment_results.status == operational_status::NON_OPERATIONAL); + REQUIRE(assessment_results.assessment_per_input.has_value()); + REQUIRE(assessment_results.assessment_per_input.value().size() == 4); + for (uint64_t i = 0; i < 4; ++i) + { + CHECK(assessment_results.assessment_per_input.value().at(i).status == operational_status::NON_OPERATIONAL); + } + }; + + op_params.simulation_parameters.epsilon_r = 1.0e-3; + check_for_non_operationality(); + + op_params.op_condition_positive_charges = + is_operational_params::operational_condition_positive_charges::TOLERATE_POSITIVE_CHARGES; + check_for_non_operationality(); + + op_params.op_condition_positive_charges = + is_operational_params::operational_condition_positive_charges::REJECT_POSITIVE_CHARGES; + op_params.simulation_parameters.epsilon_r = 5.6; + + } + // from now on, we will terminate when the first non-operational input combination is found op_params.termination_cond = is_operational_params::termination_condition::ON_FIRST_NON_OPERATIONAL; @@ -91,7 +116,7 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") } // from now on, we will reject kinks - op_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; SECTION("determine if layout is operational, reject kinks") { @@ -135,7 +160,7 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") CHECK(kink_induced_non_operational_input_pattern.size() == 1); - op_params.op_condition = is_operational_params::operational_condition::TOLERATE_KINKS; + op_params.op_condition_kinks = is_operational_params::operational_condition_kinks::TOLERATE_KINKS; CHECK(is_operational(lat, std::vector{create_or_tt()}, op_params).status == operational_status::OPERATIONAL); } @@ -148,11 +173,13 @@ TEST_CASE("SiQAD NAND gate", "[is-operational]") const sidb_100_cell_clk_lyt_siqad lat{nand_gate}; auto op_params = is_operational_params{ - sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT, + sidb_simulation_parameters{2, -0.28}, + sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{detect_bdl_wires_params{1.5}, bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, - is_operational_params::operational_condition::REJECT_KINKS, - is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION}; + is_operational_params::operational_condition_kinks::REJECT_KINKS, + {}, + is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION, {}, {}}; SECTION("Pruning and simulation") { @@ -422,7 +449,7 @@ TEST_CASE( CHECK(is_operational(lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::REJECT_KINKS}) + is_operational_params::operational_condition_kinks::REJECT_KINKS}) .status == operational_status::NON_OPERATIONAL); } SECTION("check if is_kink_induced_non_operational returns true") @@ -432,7 +459,7 @@ TEST_CASE( lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::TOLERATE_KINKS})); + is_operational_params::operational_condition_kinks::TOLERATE_KINKS})); } SECTION("check input patterns for which kinks induce the layout to become non-operational") @@ -441,7 +468,7 @@ TEST_CASE( lyt, std::vector{create_and_tt()}, is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::TOLERATE_KINKS}) == + is_operational_params::operational_condition_kinks::TOLERATE_KINKS}) == std::set{1, 2}); } } @@ -513,7 +540,7 @@ TEST_CASE("Special wire that cannot be pruned, but is non-operational when kinks SECTION("Rejecting Kinks") { - params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION; @@ -523,7 +550,7 @@ TEST_CASE("Special wire that cannot be pruned, but is non-operational when kinks SECTION("Only conducting pruning and tolerating kinks") { - params.op_condition = is_operational_params::operational_condition::TOLERATE_KINKS; + params.op_condition_kinks = is_operational_params::operational_condition_kinks::TOLERATE_KINKS; params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_ONLY; @@ -541,20 +568,22 @@ TEST_CASE("flipped CX bestagon gate", "[is-operational]") CHECK(is_operational(lyt, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::REJECT_KINKS}) + is_operational_params::operational_condition_kinks::REJECT_KINKS}) .status == operational_status::OPERATIONAL); const auto kink_induced_non_operational_input_pattern = kink_induced_non_operational_input_patterns( lyt, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}); + bdl_input_iterator_params{}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}); CHECK(kink_induced_non_operational_input_pattern.empty()); const auto kink_induced_non_operational = is_kink_induced_non_operational( lyt, create_crossing_wire_tt(), is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}); + bdl_input_iterator_params{}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}); CHECK(!kink_induced_non_operational); } From 8c4e2ec4d7d32ae3a8376f1c1ec3c6a7408b67c7 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 17:52:38 +0000 Subject: [PATCH 109/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../simulation/sidb/is_operational.hpp | 23 ++++++++----------- .../simulation/sidb/is_operational.cpp | 10 ++++---- 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index c0500b81f..1dda81172 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -825,7 +825,8 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) { + [&cds_layout, &cds_canvas_copy](const auto& c) + { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); @@ -1295,9 +1296,8 @@ class is_operational_impl * with auxiliary statistics. */ template -[[nodiscard]] operational_assessment -is_operational(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] operational_assessment is_operational(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -1395,9 +1395,8 @@ is_operational(const Lyt& lyt, const std::vector& spec, const is_operational * @return The count of operational input combinations. */ template -[[nodiscard]] std::set -operational_input_patterns(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] std::set operational_input_patterns(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -1651,9 +1650,8 @@ template * non-operational due to kinks, `false` otherwise. */ template -[[nodiscard]] bool -is_kink_induced_non_operational(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] bool is_kink_induced_non_operational(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); @@ -1749,9 +1747,8 @@ template * */ template -[[nodiscard]] std::size_t -number_of_operational_input_combinations(const Lyt& lyt, const std::vector& spec, - const is_operational_params& params = {}) noexcept +[[nodiscard]] std::size_t number_of_operational_input_combinations(const Lyt& lyt, const std::vector& spec, + const is_operational_params& params = {}) noexcept { static_assert(is_cell_level_layout_v, "Lyt is not a cell-level layout"); static_assert(has_sidb_technology_v, "Lyt is not an SiDB layout"); diff --git a/test/algorithms/simulation/sidb/is_operational.cpp b/test/algorithms/simulation/sidb/is_operational.cpp index de0bc9dce..1ce28426a 100644 --- a/test/algorithms/simulation/sidb/is_operational.cpp +++ b/test/algorithms/simulation/sidb/is_operational.cpp @@ -82,13 +82,14 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") { const auto check_for_non_operationality = [&lat, &op_params] { - const auto assessment_results = is_operational(lat, std::vector{create_or_tt()}, op_params); + const auto assessment_results = is_operational(lat, std::vector{create_or_tt()}, op_params); CHECK(assessment_results.status == operational_status::NON_OPERATIONAL); REQUIRE(assessment_results.assessment_per_input.has_value()); REQUIRE(assessment_results.assessment_per_input.value().size() == 4); for (uint64_t i = 0; i < 4; ++i) { - CHECK(assessment_results.assessment_per_input.value().at(i).status == operational_status::NON_OPERATIONAL); + CHECK(assessment_results.assessment_per_input.value().at(i).status == + operational_status::NON_OPERATIONAL); } }; @@ -102,7 +103,6 @@ TEST_CASE("SiQAD OR gate", "[is-operational]") op_params.op_condition_positive_charges = is_operational_params::operational_condition_positive_charges::REJECT_POSITIVE_CHARGES; op_params.simulation_parameters.epsilon_r = 5.6; - } // from now on, we will terminate when the first non-operational input combination is found @@ -179,7 +179,9 @@ TEST_CASE("SiQAD NAND gate", "[is-operational]") bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED}, is_operational_params::operational_condition_kinks::REJECT_KINKS, {}, - is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION, {}, {}}; + is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION, + {}, + {}}; SECTION("Pruning and simulation") { From 0ca35666eee17f6501a45c321ea443c23146db9d Mon Sep 17 00:00:00 2001 From: GitHub Actions Date: Thu, 13 Feb 2025 17:53:24 +0000 Subject: [PATCH 110/138] :memo: Update pyfiction docstrings Signed-off-by: GitHub Actions --- .../pyfiction/pybind11_mkdoc_docstrings.hpp | 34 +++++++++++++++---- 1 file changed, 28 insertions(+), 6 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp index ee7cf1a39..a6ef845f7 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/pybind11_mkdoc_docstrings.hpp @@ -8433,6 +8433,9 @@ Parameter ``ground_state``: Parameter ``bdl``: BDL pair to be evaluated. +Parameter ``port``: + Port direction where the BDL pair to be evaluated is. + Returns: `true` if `1` is encoded, `false` otherwise.)doc"; @@ -8446,6 +8449,9 @@ Parameter ``ground_state``: Parameter ``bdl``: BDL pair to be evaluated. +Parameter ``port``: + Port direction where the BDL pair to be evaluated is. + Returns: `true` if `0` is encoded, `false` otherwise.)doc"; @@ -15854,9 +15860,13 @@ static const char *__doc_fiction_is_operational_params = R"doc(Parameters for th static const char *__doc_fiction_is_operational_params_input_bdl_iterator_params = R"doc(Parameters for the BDL input iterator.)doc"; -static const char *__doc_fiction_is_operational_params_op_condition = +static const char *__doc_fiction_is_operational_params_op_condition_kinks = R"doc(Condition to decide whether a layout is operational or non- -operational.)doc"; +operational, relating to kinks.)doc"; + +static const char *__doc_fiction_is_operational_params_op_condition_positive_charges = +R"doc(Condition to decide whether a layout is operational or non- +operational, relating to kinks.)doc"; static const char *__doc_fiction_is_operational_params_operational_analysis_strategy = R"doc(Simulation method to determine if the layout is operational or non- @@ -15879,18 +15889,30 @@ static const char *__doc_fiction_is_operational_params_operational_analysis_stra R"doc(Do not apply filter strategies to determine whether the layout is operational. Instead, rely solely on physical simulation.)doc"; -static const char *__doc_fiction_is_operational_params_operational_condition = +static const char *__doc_fiction_is_operational_params_operational_condition_kinks = R"doc(Condition to decide whether a layout is operational or non- -operational.)doc"; +operational, relating to kinks.)doc"; -static const char *__doc_fiction_is_operational_params_operational_condition_REJECT_KINKS = +static const char *__doc_fiction_is_operational_params_operational_condition_kinks_REJECT_KINKS = R"doc(The I/O pins are not allowed to show kinks. If kinks exist, the layout is considered as non-operational.)doc"; -static const char *__doc_fiction_is_operational_params_operational_condition_TOLERATE_KINKS = +static const char *__doc_fiction_is_operational_params_operational_condition_kinks_TOLERATE_KINKS = R"doc(Even if the I/O pins show kinks, the layout is still considered as operational.)doc"; +static const char *__doc_fiction_is_operational_params_operational_condition_positive_charges = +R"doc(Condition to decide whether a layout is operational or non- +operational, relating to positive charges.)doc"; + +static const char *__doc_fiction_is_operational_params_operational_condition_positive_charges_REJECT_POSITIVE_CHARGES = +R"doc(Positive charges may not be able to occur. In the case of the converse +being true, the layout is considered as non-operational.)doc"; + +static const char *__doc_fiction_is_operational_params_operational_condition_positive_charges_TOLERATE_POSITIVE_CHARGES = +R"doc(Even if positive charges can occur, the layout is still considered as +operational.)doc"; + static const char *__doc_fiction_is_operational_params_sim_engine = R"doc(The simulation engine to be used for the operational domain computation.)doc"; From f916cefd597f91f3f697231088ddc0799b3e2fbd Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 18:58:03 +0100 Subject: [PATCH 111/138] :adhesive_bandage: Renaming artifacts --- .../simulation/sidb/calculate_energy_and_state_type.hpp | 2 +- .../algorithms/simulation/sidb/critical_temperature.hpp | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/calculate_energy_and_state_type.hpp b/include/fiction/algorithms/simulation/sidb/calculate_energy_and_state_type.hpp index 6b2ebcf6e..747e11729 100644 --- a/include/fiction/algorithms/simulation/sidb/calculate_energy_and_state_type.hpp +++ b/include/fiction/algorithms/simulation/sidb/calculate_energy_and_state_type.hpp @@ -137,7 +137,7 @@ template bool correct_output = true; is_operational_params params{}; - params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto operational_status = verify_logic_match(valid_layout, params, spec, input_index, input_bdl_wires, output_bdl_wires); diff --git a/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp b/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp index dfadf02ac..338c4680a 100644 --- a/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp +++ b/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp @@ -162,7 +162,7 @@ class critical_temperature_impl auto input_bdl_wires = std::vector>{}; auto output_bdl_wires = std::vector>{}; - if (params.operational_params.op_condition == is_operational_params::operational_condition::REJECT_KINKS) + if (params.operational_params.op_condition_kinks == is_operational_params::operational_condition_kinks::REJECT_KINKS) { input_bdl_wires = detect_bdl_wires(layout, params.operational_params.input_bdl_iterator_params.bdl_wire_params, @@ -197,8 +197,8 @@ class critical_temperature_impl sidb_energy_and_state_type energy_state_type{}; - if (params.operational_params.op_condition == - is_operational_params::operational_condition::REJECT_KINKS) + if (params.operational_params.op_condition_kinks == + is_operational_params::operational_condition_kinks::REJECT_KINKS) { energy_state_type = calculate_energy_and_state_type_with_kinks_rejected( distribution, sim_result.charge_distributions, spec, i, input_bdl_wires, output_bdl_wires); From 2c4469950588f9298dedb73122056ff7f585e2e6 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 17:58:31 +0000 Subject: [PATCH 112/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../algorithms/simulation/sidb/critical_temperature.hpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp b/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp index 338c4680a..c44bd5e4e 100644 --- a/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp +++ b/include/fiction/algorithms/simulation/sidb/critical_temperature.hpp @@ -162,7 +162,8 @@ class critical_temperature_impl auto input_bdl_wires = std::vector>{}; auto output_bdl_wires = std::vector>{}; - if (params.operational_params.op_condition_kinks == is_operational_params::operational_condition_kinks::REJECT_KINKS) + if (params.operational_params.op_condition_kinks == + is_operational_params::operational_condition_kinks::REJECT_KINKS) { input_bdl_wires = detect_bdl_wires(layout, params.operational_params.input_bdl_iterator_params.bdl_wire_params, From e6ad6a13d3422be212541dc84a94464886c64394 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Thu, 13 Feb 2025 19:45:09 +0100 Subject: [PATCH 113/138] :adhesive_bandage: Renaming artifacts --- .../operational_domain/operational_domain_bestagon.cpp | 2 +- .../operational_domain_bestagon_exact_vs_sketch.cpp | 2 +- .../quickcell_vs_automatic_exhaustive_2_input.cpp | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/experiments/operational_domain/operational_domain_bestagon.cpp b/experiments/operational_domain/operational_domain_bestagon.cpp index b2affe84d..ca18460dc 100644 --- a/experiments/operational_domain/operational_domain_bestagon.cpp +++ b/experiments/operational_domain/operational_domain_bestagon.cpp @@ -62,7 +62,7 @@ int main() // NOLINT op_domain_params.operational_params.simulation_parameters = sim_params; op_domain_params.operational_params.sim_engine = sidb_simulation_engine::QUICKEXACT; - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition::TOLERATE_KINKS; + op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::TOLERATE_KINKS; op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R}, {sweep_parameter::LAMBDA_TF}}; op_domain_params.sweep_dimensions[0].min = 1.0; diff --git a/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp b/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp index c00e68e9a..f7700d806 100644 --- a/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp +++ b/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp @@ -52,7 +52,7 @@ int main() // NOLINT op_domain_params.operational_params.simulation_parameters = sim_params; op_domain_params.operational_params.sim_engine = sidb_simulation_engine::QUICKEXACT; - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R}, {sweep_parameter::LAMBDA_TF}}; op_domain_params.sweep_dimensions[0].min = 1.0; diff --git a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp index 1a6b1bd57..870d6fef9 100644 --- a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp +++ b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp @@ -109,15 +109,15 @@ int main() // NOLINT params_2_in_1_out.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; - params_2_in_1_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params_2_in_1_out.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; params_2_in_2_out.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; - params_2_in_2_out.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params_2_in_2_out.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; params_1_in_1_out_straight.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; - params_1_in_1_out_straight.operational_params.op_condition = - is_operational_params::operational_condition::REJECT_KINKS; + params_1_in_1_out_straight.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; if (gate_name == "cx" || gate_name == "ha" || gate_name == "hourglass") { From f46772fc173668a15336608e7d4964e91629b039 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 18:45:38 +0000 Subject: [PATCH 114/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../operational_domain/operational_domain_bestagon.cpp | 3 ++- .../operational_domain_bestagon_exact_vs_sketch.cpp | 3 ++- .../quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp | 6 ++++-- 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/experiments/operational_domain/operational_domain_bestagon.cpp b/experiments/operational_domain/operational_domain_bestagon.cpp index ca18460dc..b2cc96bcd 100644 --- a/experiments/operational_domain/operational_domain_bestagon.cpp +++ b/experiments/operational_domain/operational_domain_bestagon.cpp @@ -62,7 +62,8 @@ int main() // NOLINT op_domain_params.operational_params.simulation_parameters = sim_params; op_domain_params.operational_params.sim_engine = sidb_simulation_engine::QUICKEXACT; - op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::TOLERATE_KINKS; + op_domain_params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::TOLERATE_KINKS; op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R}, {sweep_parameter::LAMBDA_TF}}; op_domain_params.sweep_dimensions[0].min = 1.0; diff --git a/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp b/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp index f7700d806..51010522b 100644 --- a/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp +++ b/experiments/operational_domain/operational_domain_bestagon_exact_vs_sketch.cpp @@ -52,7 +52,8 @@ int main() // NOLINT op_domain_params.operational_params.simulation_parameters = sim_params; op_domain_params.operational_params.sim_engine = sidb_simulation_engine::QUICKEXACT; - op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R}, {sweep_parameter::LAMBDA_TF}}; op_domain_params.sweep_dimensions[0].min = 1.0; diff --git a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp index 870d6fef9..847eab8c3 100644 --- a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp +++ b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp @@ -109,10 +109,12 @@ int main() // NOLINT params_2_in_1_out.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; - params_2_in_1_out.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params_2_in_1_out.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; params_2_in_2_out.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; - params_2_in_2_out.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params_2_in_2_out.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; params_1_in_1_out_straight.design_mode = design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER; From 693096d36242756ede56b60b00506d1213c7c8ef Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 20:34:35 +0100 Subject: [PATCH 115/138] :snake: Forgotton postfix --- .../pyfiction/algorithms/simulation/sidb/is_operational.hpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp index cfee5755a..d043c3c91 100644 --- a/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp +++ b/bindings/mnt/pyfiction/include/pyfiction/algorithms/simulation/sidb/is_operational.hpp @@ -179,9 +179,9 @@ inline void is_operational(pybind11::module& m) DOC(fiction_is_operational_params_sim_engine)) .def_readwrite("input_bdl_iterator_params", &fiction::is_operational_params::input_bdl_iterator_params, DOC(fiction_is_operational_params_input_bdl_iterator_params)) - .def_readwrite("op_condition", &fiction::is_operational_params::op_condition_kinks, + .def_readwrite("op_condition_kinks", &fiction::is_operational_params::op_condition_kinks, DOC(fiction_is_operational_params_op_condition_kinks)) - .def_readwrite("op_condition", &fiction::is_operational_params::op_condition_positive_charges, + .def_readwrite("op_condition_positive_charges", &fiction::is_operational_params::op_condition_positive_charges, DOC(fiction_is_operational_params_op_condition_positive_charges)) .def_readwrite("strategy_to_analyze_operational_status", &fiction::is_operational_params::strategy_to_analyze_operational_status, From 9dc00936fbd15443e58fe1284035bd6f056536a4 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 20:45:20 +0100 Subject: [PATCH 116/138] :adhesive_bandage: Renaming artifact --- test/algorithms/physical_design/design_sidb_gates.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index ff7850dc8..55c7d3115 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -38,7 +38,7 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.31}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, + bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{27, 6, 0}, {30, 8, 0}}, 3}; @@ -475,7 +475,7 @@ TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") design_sidb_gates_params> params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::REJECT_KINKS}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params>::design_sidb_gates_mode::RANDOM, {{18, 8, 1}, {22, 12, 0}}, 2}; @@ -566,7 +566,7 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::REJECT_KINKS}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {15, 17, 0}}, 3}; @@ -656,7 +656,7 @@ TEST_CASE("Design AND gate with input left and output top-right with QuickCell ( const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::REJECT_KINKS}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{17, 5, 0}, {24, 8, 0}}, 3}; From 1a5af50c1ed6d1c8a97f2dd28962ecd3fe85864c Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 19:46:24 +0000 Subject: [PATCH 117/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- test/algorithms/physical_design/design_sidb_gates.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 55c7d3115..30d4a6094 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -38,7 +38,8 @@ TEST_CASE("Design AND gate with skeleton, where one input wire and the output wi design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.31}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, + bdl_input_iterator_params{}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{27, 6, 0}, {30, 8, 0}}, 3}; @@ -566,7 +567,7 @@ TEST_CASE("Design NOR Bestagon shaped gate on H-Si 111", "[design-sidb-gates]") const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition_kinks::REJECT_KINKS}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{10, 13, 0}, {15, 17, 0}}, 3}; From 252a2b8135e62594240ff45c53487ac28fc0c497 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 21:20:59 +0100 Subject: [PATCH 118/138] :adhesive_bandage: Renaming artifact --- experiments/quickcell/quickcell_3_input.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/experiments/quickcell/quickcell_3_input.cpp b/experiments/quickcell/quickcell_3_input.cpp index 1ced1d203..f59f4cdfc 100644 --- a/experiments/quickcell/quickcell_3_input.cpp +++ b/experiments/quickcell/quickcell_3_input.cpp @@ -73,7 +73,7 @@ int main() // NOLINT const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.31}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{detect_bdl_wires_params{3.0}}, - is_operational_params::operational_condition::REJECT_KINKS}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{22, 6, 0}, {32, 12, 0}}, 4}; From 8a1e61b7653bb89873d18c1b15701d107260a0fc Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 21:58:58 +0100 Subject: [PATCH 119/138] :adhesive_bandage: Renaming artifact --- experiments/quickcell/quickcell_rectangular_gate_library.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/experiments/quickcell/quickcell_rectangular_gate_library.cpp b/experiments/quickcell/quickcell_rectangular_gate_library.cpp index f4697fab2..7f04748b5 100644 --- a/experiments/quickcell/quickcell_rectangular_gate_library.cpp +++ b/experiments/quickcell/quickcell_rectangular_gate_library.cpp @@ -95,7 +95,7 @@ int main() // NOLINT design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{{3}}, - is_operational_params::operational_condition::REJECT_KINKS}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::QUICKCELL, {{18, 9, 0}, {26, 13, 0}}, num_canvas_sidbs}; From d675a0d08bdee58ed7b52e1af0254e408444aec3 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 22:42:15 +0100 Subject: [PATCH 120/138] :adhesive_bandage: Renaming artifact --- .../quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp index 847eab8c3..f0a59f117 100644 --- a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp +++ b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp @@ -79,21 +79,21 @@ int main() // NOLINT design_sidb_gates_params params_1_in_1_out_straight{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, + bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{9, 6, 0}, {21, 14, 0}}, 3}; design_sidb_gates_params params_2_in_1_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, + bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 10, 0}}, 3}; design_sidb_gates_params params_2_in_2_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition::REJECT_KINKS}, + bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 14, 0}}, 3}; From dc6ff0419f97b99eddfa5fd1c8afa7802fda625c Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 21:42:38 +0000 Subject: [PATCH 121/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../quickcell_vs_automatic_exhaustive_2_input.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp index f0a59f117..4f09bb74a 100644 --- a/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp +++ b/experiments/quickcell/quickcell_vs_automatic_exhaustive_2_input.cpp @@ -79,21 +79,24 @@ int main() // NOLINT design_sidb_gates_params params_1_in_1_out_straight{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, + bdl_input_iterator_params{}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{9, 6, 0}, {21, 14, 0}}, 3}; design_sidb_gates_params params_2_in_1_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, + bdl_input_iterator_params{}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 10, 0}}, 3}; design_sidb_gates_params params_2_in_2_out{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, - bdl_input_iterator_params{}, is_operational_params::operational_condition_kinks::REJECT_KINKS}, + bdl_input_iterator_params{}, + is_operational_params::operational_condition_kinks::REJECT_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::EXHAUSTIVE_GATE_DESIGNER, {{14, 6, 0}, {24, 14, 0}}, 3}; From a34e29159fcc17fc7ccdf7e52fb46a92d6676faf Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 23:02:05 +0100 Subject: [PATCH 122/138] :adhesive_bandage: Renaming artifact --- test/algorithms/physical_design/design_sidb_gates.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/algorithms/physical_design/design_sidb_gates.cpp b/test/algorithms/physical_design/design_sidb_gates.cpp index 30d4a6094..158784251 100644 --- a/test/algorithms/physical_design/design_sidb_gates.cpp +++ b/test/algorithms/physical_design/design_sidb_gates.cpp @@ -459,7 +459,7 @@ TEST_CASE("Design AND Bestagon shaped gate", "[design-sidb-gates]") const design_sidb_gates_params params{ is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT, bdl_input_iterator_params{}, - is_operational_params::operational_condition::TOLERATE_KINKS}, + is_operational_params::operational_condition_kinks::TOLERATE_KINKS}, design_sidb_gates_params::design_sidb_gates_mode::RANDOM, {{14, 6, 0}, {24, 12, 0}}, 3}; From c448c4bb19ee11320df3ae7748e1014991a9d4ca Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 23:24:41 +0100 Subject: [PATCH 123/138] :adhesive_bandage: Renaming artifact --- .../simulation/sidb/critical_temperature.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/test/algorithms/simulation/sidb/critical_temperature.cpp b/test/algorithms/simulation/sidb/critical_temperature.cpp index ca43acd1f..aebaf7627 100644 --- a/test/algorithms/simulation/sidb/critical_temperature.cpp +++ b/test/algorithms/simulation/sidb/critical_temperature.cpp @@ -306,7 +306,7 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; params.operational_params.input_bdl_iterator_params.bdl_wire_params.threshold_bdl_interdistance = 2.5; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_and_tt()}, params, &critical_stats); @@ -446,7 +446,7 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_fan_out_tt()}, params, &critical_stats); @@ -553,7 +553,7 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_or_tt()}, params, &critical_stats); @@ -970,7 +970,7 @@ TEMPLATE_TEST_CASE("Critical temperature of Bestagon double wire, QuickExact", " } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt_double_wire_gate, create_double_wire_tt(), params, &critical_stats); @@ -1032,7 +1032,7 @@ TEMPLATE_TEST_CASE("Critical temperature of Bestagon half adder gate, QuickExact } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt_half_adder_gate, create_half_adder_tt(), params, &critical_stats); From c2d3c1555e3a6663e97be047c0e2dae427aaf1e4 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Thu, 13 Feb 2025 23:45:15 +0100 Subject: [PATCH 124/138] :adhesive_bandage: Renaming artifact --- .../simulation/sidb/critical_temperature.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/test/algorithms/simulation/sidb/critical_temperature.cpp b/test/algorithms/simulation/sidb/critical_temperature.cpp index aebaf7627..0814d6bc8 100644 --- a/test/algorithms/simulation/sidb/critical_temperature.cpp +++ b/test/algorithms/simulation/sidb/critical_temperature.cpp @@ -306,7 +306,7 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; params.operational_params.input_bdl_iterator_params.bdl_wire_params.threshold_bdl_interdistance = 2.5; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_and_tt()}, params, &critical_stats); @@ -446,7 +446,7 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_fan_out_tt()}, params, &critical_stats); @@ -553,7 +553,7 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_or_tt()}, params, &critical_stats); @@ -970,7 +970,7 @@ TEMPLATE_TEST_CASE("Critical temperature of Bestagon double wire, QuickExact", " } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt_double_wire_gate, create_double_wire_tt(), params, &critical_stats); @@ -1032,7 +1032,7 @@ TEMPLATE_TEST_CASE("Critical temperature of Bestagon half adder gate, QuickExact } SECTION("Kinks are not allowed") { - params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt_half_adder_gate, create_half_adder_tt(), params, &critical_stats); From dd2e28601204bc06233993b2ca47b448400cbfec Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 22:45:38 +0000 Subject: [PATCH 125/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- test/algorithms/simulation/sidb/critical_temperature.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/test/algorithms/simulation/sidb/critical_temperature.cpp b/test/algorithms/simulation/sidb/critical_temperature.cpp index 0814d6bc8..fc7867fc4 100644 --- a/test/algorithms/simulation/sidb/critical_temperature.cpp +++ b/test/algorithms/simulation/sidb/critical_temperature.cpp @@ -306,7 +306,8 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; params.operational_params.input_bdl_iterator_params.bdl_wire_params.threshold_bdl_interdistance = 2.5; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_and_tt()}, params, &critical_stats); @@ -446,7 +447,8 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_fan_out_tt()}, params, &critical_stats); @@ -553,7 +555,8 @@ TEMPLATE_TEST_CASE("Test critical_temperature function", "[critical-temperature] } SECTION("Kinks are not allowed") { - params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto ct_qe = critical_temperature_gate_based(lyt, std::vector{create_or_tt()}, params, &critical_stats); From 812f523d2875535f5bb7665bc9e78be279428f2a Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Fri, 14 Feb 2025 00:30:20 +0100 Subject: [PATCH 126/138] :adhesive_bandage: Renaming artifact --- test/algorithms/simulation/sidb/operational_domain_ratio.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp index 65c327b99..abd35680a 100644 --- a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp +++ b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp @@ -109,7 +109,7 @@ TEST_CASE("SiQAD NAND gate", "[compute-operational-ratio]") op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R}, {sweep_parameter::LAMBDA_TF}}; op_domain_params.operational_params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION; - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; op_domain_params.operational_params.input_bdl_iterator_params.bdl_wire_params.threshold_bdl_interdistance = 1.5; // set x-dimension @@ -182,7 +182,7 @@ TEST_CASE("Bestagon AND gate", "[compute-operational-ratio]") SECTION("semi-operational domain, reject kinks") { op_domain_params.sweep_dimensions.push_back(z_dimension); - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; const operational_domain_ratio_params op_ratio_params{op_domain_params}; From 81879acab2071cb6951a5bec86f42b9216ec19e3 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 23:31:44 +0000 Subject: [PATCH 127/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../algorithms/simulation/sidb/operational_domain_ratio.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp index abd35680a..2d41b505e 100644 --- a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp +++ b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp @@ -109,7 +109,8 @@ TEST_CASE("SiQAD NAND gate", "[compute-operational-ratio]") op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R}, {sweep_parameter::LAMBDA_TF}}; op_domain_params.operational_params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_THEN_SIMULATION; - op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; op_domain_params.operational_params.input_bdl_iterator_params.bdl_wire_params.threshold_bdl_interdistance = 1.5; // set x-dimension @@ -182,7 +183,8 @@ TEST_CASE("Bestagon AND gate", "[compute-operational-ratio]") SECTION("semi-operational domain, reject kinks") { op_domain_params.sweep_dimensions.push_back(z_dimension); - op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; const operational_domain_ratio_params op_ratio_params{op_domain_params}; From f5e3cacf370207241baae2bc0d1e39a0c3984fbb Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Fri, 14 Feb 2025 00:33:25 +0100 Subject: [PATCH 128/138] :adhesive_bandage: Renaming artifact --- test/algorithms/simulation/sidb/operational_domain_ratio.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp index 2d41b505e..499f585dc 100644 --- a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp +++ b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp @@ -199,7 +199,7 @@ TEST_CASE("Bestagon AND gate", "[compute-operational-ratio]") "semi-operational domain, reject kinks, only pruning is used to determine the operational status of the layout") { op_domain_params.sweep_dimensions.push_back(z_dimension); - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; op_domain_params.operational_params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_ONLY; From 6f6e59d69c4bdfe5aa534075e55543bc6684394d Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Thu, 13 Feb 2025 23:34:32 +0000 Subject: [PATCH 129/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- test/algorithms/simulation/sidb/operational_domain_ratio.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp index 499f585dc..69a965839 100644 --- a/test/algorithms/simulation/sidb/operational_domain_ratio.cpp +++ b/test/algorithms/simulation/sidb/operational_domain_ratio.cpp @@ -199,7 +199,8 @@ TEST_CASE("Bestagon AND gate", "[compute-operational-ratio]") "semi-operational domain, reject kinks, only pruning is used to determine the operational status of the layout") { op_domain_params.sweep_dimensions.push_back(z_dimension); - op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; op_domain_params.operational_params.strategy_to_analyze_operational_status = is_operational_params::operational_analysis_strategy::FILTER_ONLY; From d7c14bda09947e8dffe3454db506fcf9cedb612d Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Fri, 14 Feb 2025 01:16:13 +0100 Subject: [PATCH 130/138] :adhesive_bandage: Renaming artifact --- test/algorithms/simulation/sidb/operational_domain.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/algorithms/simulation/sidb/operational_domain.cpp b/test/algorithms/simulation/sidb/operational_domain.cpp index 39b32a9a5..42c0bc68f 100644 --- a/test/algorithms/simulation/sidb/operational_domain.cpp +++ b/test/algorithms/simulation/sidb/operational_domain.cpp @@ -1343,7 +1343,7 @@ TEMPLATE_TEST_CASE("AND gate with Bestagon shape and kink states at default phys SECTION("grid_search, reject kinks") { - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_domain_params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto op_domain = operational_domain_grid_search(layout, std::vector{create_and_tt()}, op_domain_params, &op_domain_stats); @@ -1372,7 +1372,7 @@ TEMPLATE_TEST_CASE("Grid search to determine the operational domain. The operati op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R, 4.0, 6.0, 0.4}, {sweep_parameter::LAMBDA_TF, 4.0, 6.0, 0.4}}; - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_domain_params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; operational_domain_stats op_domain_stats{}; From f04406082e7413c3fafb3fec8a2a1c6a38b8d6a6 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Fri, 14 Feb 2025 00:17:04 +0000 Subject: [PATCH 131/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- test/algorithms/simulation/sidb/operational_domain.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/test/algorithms/simulation/sidb/operational_domain.cpp b/test/algorithms/simulation/sidb/operational_domain.cpp index 42c0bc68f..47ae4d7dd 100644 --- a/test/algorithms/simulation/sidb/operational_domain.cpp +++ b/test/algorithms/simulation/sidb/operational_domain.cpp @@ -1343,7 +1343,8 @@ TEMPLATE_TEST_CASE("AND gate with Bestagon shape and kink states at default phys SECTION("grid_search, reject kinks") { - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; + op_domain_params.operational_params.op_condition = + is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto op_domain = operational_domain_grid_search(layout, std::vector{create_and_tt()}, op_domain_params, &op_domain_stats); From a553d916ca4810509cbfd2f82305513145e2f9a3 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Fri, 14 Feb 2025 01:40:52 +0100 Subject: [PATCH 132/138] :adhesive_bandage: Renaming artifact --- test/algorithms/simulation/sidb/operational_domain.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/algorithms/simulation/sidb/operational_domain.cpp b/test/algorithms/simulation/sidb/operational_domain.cpp index 47ae4d7dd..d59652a0f 100644 --- a/test/algorithms/simulation/sidb/operational_domain.cpp +++ b/test/algorithms/simulation/sidb/operational_domain.cpp @@ -1343,7 +1343,7 @@ TEMPLATE_TEST_CASE("AND gate with Bestagon shape and kink states at default phys SECTION("grid_search, reject kinks") { - op_domain_params.operational_params.op_condition = + op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; const auto op_domain = operational_domain_grid_search(layout, std::vector{create_and_tt()}, @@ -1373,7 +1373,7 @@ TEMPLATE_TEST_CASE("Grid search to determine the operational domain. The operati op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R, 4.0, 6.0, 0.4}, {sweep_parameter::LAMBDA_TF, 4.0, 6.0, 0.4}}; - op_domain_params.operational_params.op_condition = is_operational_params::operational_condition_kinks::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; operational_domain_stats op_domain_stats{}; From a785c364713b30a0192147c188fdc4caf1dd80d8 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Fri, 14 Feb 2025 00:41:13 +0000 Subject: [PATCH 133/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- test/algorithms/simulation/sidb/operational_domain.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/test/algorithms/simulation/sidb/operational_domain.cpp b/test/algorithms/simulation/sidb/operational_domain.cpp index d59652a0f..4505046bc 100644 --- a/test/algorithms/simulation/sidb/operational_domain.cpp +++ b/test/algorithms/simulation/sidb/operational_domain.cpp @@ -1373,7 +1373,8 @@ TEMPLATE_TEST_CASE("Grid search to determine the operational domain. The operati op_domain_params.sweep_dimensions = {{sweep_parameter::EPSILON_R, 4.0, 6.0, 0.4}, {sweep_parameter::LAMBDA_TF, 4.0, 6.0, 0.4}}; - op_domain_params.operational_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; + op_domain_params.operational_params.op_condition_kinks = + is_operational_params::operational_condition_kinks::REJECT_KINKS; operational_domain_stats op_domain_stats{}; From 8777bf1b4caf824538d6ea2300bf9a4987fdd697 Mon Sep 17 00:00:00 2001 From: Willem Lambooy <35612535+wlambooy@users.noreply.github.com> Date: Fri, 14 Feb 2025 01:58:50 +0100 Subject: [PATCH 134/138] :adhesive_bandage: Renaming artifact --- test/algorithms/simulation/sidb/verify_logic_match.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/algorithms/simulation/sidb/verify_logic_match.cpp b/test/algorithms/simulation/sidb/verify_logic_match.cpp index 4d942f6e0..ae6ac5c0a 100644 --- a/test/algorithms/simulation/sidb/verify_logic_match.cpp +++ b/test/algorithms/simulation/sidb/verify_logic_match.cpp @@ -110,7 +110,7 @@ TEST_CASE("AND gate mirrored on the x-axis on the H-Si 111 surface", REQUIRE(!gs.empty()); is_operational_params op_params{}; - op_params.op_condition = is_operational_params::operational_condition::REJECT_KINKS; + op_params.op_condition_kinks = is_operational_params::operational_condition_kinks::REJECT_KINKS; SECTION("Correct index") { From 9212f4c7b5120e2bca2de3590b3b6e9001ee1b38 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Fri, 14 Feb 2025 11:51:46 +0100 Subject: [PATCH 135/138] :adhesive_bandage: Forgot to put `op_condition_positive_charges` check --- .../fiction/algorithms/simulation/sidb/is_operational.hpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 1dda81172..53daebbd9 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -753,7 +753,9 @@ class is_operational_impl for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii) { // if positively charged SiDBs can occur, the SiDB layout is considered as non-operational - if (can_positive_charges_occur(*bii, parameters.simulation_parameters)) + if (parameters.op_condition_positive_charges == + is_operational_params::operational_condition_positive_charges::REJECT_POSITIVE_CHARGES && + can_positive_charges_occur(*bii, parameters.simulation_parameters)) { continue; } @@ -825,8 +827,7 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) - { + [&cds_layout, &cds_canvas_copy](const auto& c) { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); From a25ccf3c0ff8ea29316afa3fe0d7f6f5d649fda8 Mon Sep 17 00:00:00 2001 From: "pre-commit-ci[bot]" <66853113+pre-commit-ci[bot]@users.noreply.github.com> Date: Fri, 14 Feb 2025 10:52:17 +0000 Subject: [PATCH 136/138] =?UTF-8?q?=F0=9F=8E=A8=20Incorporated=20pre-commi?= =?UTF-8?q?t=20fixes?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- include/fiction/algorithms/simulation/sidb/is_operational.hpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/fiction/algorithms/simulation/sidb/is_operational.hpp b/include/fiction/algorithms/simulation/sidb/is_operational.hpp index 53daebbd9..a54c6f5cc 100644 --- a/include/fiction/algorithms/simulation/sidb/is_operational.hpp +++ b/include/fiction/algorithms/simulation/sidb/is_operational.hpp @@ -827,7 +827,8 @@ class is_operational_impl while (canvas_charge_index <= max_index) { cds_canvas_copy.foreach_cell( - [&cds_layout, &cds_canvas_copy](const auto& c) { + [&cds_layout, &cds_canvas_copy](const auto& c) + { cds_layout.assign_charge_state(c, cds_canvas_copy.get_charge_state(c), charge_index_mode::KEEP_CHARGE_INDEX); }); From a2dd43ea09490e8bdabdc47e43ed188cca97db31 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 19 Feb 2025 16:16:32 +0100 Subject: [PATCH 137/138] :alembic: Added benchmark for `is_operational` --- test/benchmark/sidb_logic.cpp | 76 +++++++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 test/benchmark/sidb_logic.cpp diff --git a/test/benchmark/sidb_logic.cpp b/test/benchmark/sidb_logic.cpp new file mode 100644 index 000000000..a074434cf --- /dev/null +++ b/test/benchmark/sidb_logic.cpp @@ -0,0 +1,76 @@ +// +// Created by Willem Lambooy on 19/02/2025. +// + +#include +#include + +#include +#include + +using namespace fiction; + +using lattice = sidb_100_cell_clk_lyt; +using lattice_siqad = sidb_100_cell_clk_lyt_siqad; + +TEST_CASE("Benchmark exact operational assessment", "[benchmark]") +{ + // crossing bestagon gate + lattice_siqad lyt{}; + + lyt.assign_cell_type({36, 1, 0}, sidb_technology::cell_type::INPUT); + lyt.assign_cell_type({2, 1, 0}, sidb_technology::cell_type::INPUT); + + lyt.assign_cell_type({0, 0, 0}, sidb_technology::cell_type::INPUT); + lyt.assign_cell_type({38, 0, 0}, sidb_technology::cell_type::INPUT); + + lyt.assign_cell_type({6, 2, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({20, 12, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({8, 3, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({14, 5, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({14, 11, 1}, sidb_technology::cell_type::NORMAL); + + lyt.assign_cell_type({12, 4, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({14, 15, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({26, 4, 0}, sidb_technology::cell_type::NORMAL); + + lyt.assign_cell_type({14, 9, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({24, 15, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({12, 16, 0}, sidb_technology::cell_type::NORMAL); + + lyt.assign_cell_type({18, 9, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({26, 16, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({24, 13, 1}, sidb_technology::cell_type::NORMAL); + + lyt.assign_cell_type({24, 5, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({30, 3, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({16, 13, 1}, sidb_technology::cell_type::NORMAL); + + lyt.assign_cell_type({32, 2, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({20, 8, 0}, sidb_technology::cell_type::NORMAL); + + lyt.assign_cell_type({30, 17, 0}, sidb_technology::cell_type::OUTPUT); + lyt.assign_cell_type({6, 18, 0}, sidb_technology::cell_type::OUTPUT); + + lyt.assign_cell_type({32, 18, 0}, sidb_technology::cell_type::OUTPUT); + lyt.assign_cell_type({8, 17, 0}, sidb_technology::cell_type::OUTPUT); + + lyt.assign_cell_type({2, 19, 0}, sidb_technology::cell_type::NORMAL); + lyt.assign_cell_type({36, 19, 0}, sidb_technology::cell_type::NORMAL); + + BENCHMARK("QuickExact") + { + is_operational_params params{}; + params.sim_engine = sidb_simulation_engine::QUICKEXACT; + return is_operational(lyt, create_crossing_wire_tt()); + }; + +#if (FICTION_ALGLIB_ENABLED) + BENCHMARK("ClusterComplete") + { + is_operational_params params{}; + params.sim_engine = sidb_simulation_engine::CLUSTERCOMPLETE; + return is_operational(lyt, create_crossing_wire_tt()); + }; +#endif // FICTION_ALGLIB_ENABLED +} From f9ac5d712a64687c9500a4deaac6c94d45ee1885 Mon Sep 17 00:00:00 2001 From: wlambooy Date: Wed, 19 Feb 2025 18:12:05 +0100 Subject: [PATCH 138/138] :alembic: Added benchmark results (slight improvement for `design_sidb_gates`) --- test/benchmark/sidb_logic.cpp | 284 ++++++++++++++++++++++++++++------ 1 file changed, 238 insertions(+), 46 deletions(-) diff --git a/test/benchmark/sidb_logic.cpp b/test/benchmark/sidb_logic.cpp index a074434cf..72111b241 100644 --- a/test/benchmark/sidb_logic.cpp +++ b/test/benchmark/sidb_logic.cpp @@ -5,72 +5,264 @@ #include #include +#include "../utils/blueprints/layout_blueprints.hpp" + +#include #include #include using namespace fiction; -using lattice = sidb_100_cell_clk_lyt; -using lattice_siqad = sidb_100_cell_clk_lyt_siqad; - TEST_CASE("Benchmark exact operational assessment", "[benchmark]") { - // crossing bestagon gate - lattice_siqad lyt{}; - - lyt.assign_cell_type({36, 1, 0}, sidb_technology::cell_type::INPUT); - lyt.assign_cell_type({2, 1, 0}, sidb_technology::cell_type::INPUT); + SECTION("Bestagon half adder") + { + const auto lyt = blueprints::bestagon_ha(); - lyt.assign_cell_type({0, 0, 0}, sidb_technology::cell_type::INPUT); - lyt.assign_cell_type({38, 0, 0}, sidb_technology::cell_type::INPUT); + BENCHMARK("QuickExact") + { + return is_operational( + lyt, create_half_adder_tt(), + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}); + }; - lyt.assign_cell_type({6, 2, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({20, 12, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({8, 3, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({14, 5, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({14, 11, 1}, sidb_technology::cell_type::NORMAL); +#if (FICTION_ALGLIB_ENABLED) + BENCHMARK("ClusterComplete") + { + return is_operational( + lyt, create_half_adder_tt(), + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::CLUSTERCOMPLETE}); + }; +#endif // FICTION_ALGLIB_ENABLED + } - lyt.assign_cell_type({12, 4, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({14, 15, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({26, 4, 0}, sidb_technology::cell_type::NORMAL); + SECTION("Bestagon crossing") + { + const auto lyt = blueprints::bestagon_crossing(); - lyt.assign_cell_type({14, 9, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({24, 15, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({12, 16, 0}, sidb_technology::cell_type::NORMAL); + BENCHMARK("QuickExact") + { + return is_operational( + lyt, create_crossing_wire_tt(), + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}); + }; - lyt.assign_cell_type({18, 9, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({26, 16, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({24, 13, 1}, sidb_technology::cell_type::NORMAL); +#if (FICTION_ALGLIB_ENABLED) + BENCHMARK("ClusterComplete") + { + return is_operational( + lyt, create_crossing_wire_tt(), + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::CLUSTERCOMPLETE}); + }; +#endif // FICTION_ALGLIB_ENABLED + } +} - lyt.assign_cell_type({24, 5, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({30, 3, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({16, 13, 1}, sidb_technology::cell_type::NORMAL); +TEST_CASE("Benchmark exact design using QuickCell", "[benchmark]") +{ + const auto lyt = blueprints::two_input_two_output_bestagon_skeleton(); - lyt.assign_cell_type({32, 2, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({20, 8, 0}, sidb_technology::cell_type::NORMAL); + SECTION("Bestagon half adder") + { + BENCHMARK("QuickExact") + { + const design_sidb_gates_params> params{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, + design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + {{16, 8, 0}, {22, 14, 0}}, + 3}; - lyt.assign_cell_type({30, 17, 0}, sidb_technology::cell_type::OUTPUT); - lyt.assign_cell_type({6, 18, 0}, sidb_technology::cell_type::OUTPUT); + return design_sidb_gates(lyt, std::vector{create_half_adder_tt()}, params); + }; - lyt.assign_cell_type({32, 18, 0}, sidb_technology::cell_type::OUTPUT); - lyt.assign_cell_type({8, 17, 0}, sidb_technology::cell_type::OUTPUT); +#if (FICTION_ALGLIB_ENABLED) + BENCHMARK("ClusterComplete") + { + const design_sidb_gates_params> params{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::CLUSTERCOMPLETE}, + design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + {{16, 8, 0}, {22, 14, 0}}, + 3}; - lyt.assign_cell_type({2, 19, 0}, sidb_technology::cell_type::NORMAL); - lyt.assign_cell_type({36, 19, 0}, sidb_technology::cell_type::NORMAL); + return design_sidb_gates(lyt, std::vector{create_half_adder_tt()}, params); + }; +#endif // FICTION_ALGLIB_ENABLED + } - BENCHMARK("QuickExact") + SECTION("Bestagon crossing") { - is_operational_params params{}; - params.sim_engine = sidb_simulation_engine::QUICKEXACT; - return is_operational(lyt, create_crossing_wire_tt()); - }; + BENCHMARK("QuickExact") + { + const design_sidb_gates_params> params{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::QUICKEXACT}, + design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + {{16, 8, 0}, {22, 14, 0}}, + 3}; + + return design_sidb_gates(lyt, std::vector{create_crossing_wire_tt()}, params); + }; #if (FICTION_ALGLIB_ENABLED) - BENCHMARK("ClusterComplete") - { - is_operational_params params{}; - params.sim_engine = sidb_simulation_engine::CLUSTERCOMPLETE; - return is_operational(lyt, create_crossing_wire_tt()); - }; + BENCHMARK("ClusterComplete") + { + const design_sidb_gates_params> params{ + is_operational_params{sidb_simulation_parameters{2, -0.32}, sidb_simulation_engine::CLUSTERCOMPLETE}, + design_sidb_gates_params>::design_sidb_gates_mode::QUICKCELL, + {{16, 8, 0}, {22, 14, 0}}, + 3}; + + return design_sidb_gates(lyt, std::vector{create_crossing_wire_tt()}, params); + }; #endif // FICTION_ALGLIB_ENABLED + } } + +// AMD Ryzen Threadripper PRO 5955X, Ubuntu 20.04, Ubuntu clang version 18.1.3 (19.02.2025) +// +// +// BEFORE #552 (-DFICTION_ENABLE_JEMALLOC=ON) +// +// ------------------------------------------------------------------------------- +// Benchmark exact operational assessment +// Bestagon half adder +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 3.78555 s +// 37.6511 ms 37.5784 ms 37.849 ms +// 568.885 us 253.745 us 1.20599 ms +// +// ClusterComplete 100 1 7.36722 s +// 64.115 ms 54.5074 ms 76.8617 ms +// 56.3622 ms 44.4604 ms 70.8 ms +// +// +// ------------------------------------------------------------------------------- +// Benchmark exact operational assessment +// Bestagon crossing +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 30.9174 s +// 310.861 ms 310.752 ms 310.975 ms +// 568.035 us 504.324 us 646.06 us +// +// ClusterComplete 100 1 3.28897 s +// 62.4506 ms 53.1562 ms 75.0693 ms +// 54.9345 ms 43.6231 ms 68.9101 ms +// +// +// ------------------------------------------------------------------------------- +// Benchmark exact design using QuickCell +// Bestagon half adder +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 1.30287 m +// 791.151 ms 787.981 ms 794.487 ms +// 16.5568 ms 14.8496 ms 18.5733 ms +// +// ClusterComplete 100 1 8.16662 m +// 831.868 ms 828.488 ms 837.709 ms +// 22.1086 ms 14.7688 ms 40.4548 ms +// +// +// ------------------------------------------------------------------------------- +// Benchmark exact design using QuickCell +// Bestagon crossing +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 1.27554 m +// 763.535 ms 760.857 ms 766.287 ms +// 13.866 ms 12.2747 ms 15.8419 ms +// +// ClusterComplete 100 1 1.26896 m +// 791.24 ms 774.817 ms 824.091 ms +// 113.249 ms 64.1338 ms 181.057 ms +// +// +// AFTER #552 (-DFICTION_ENABLE_JEMALLOC=ON) +// +// ------------------------------------------------------------------------------- +// Benchmark exact operational assessment +// Bestagon half adder +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 3.76167 s +// 37.6697 ms 37.6296 ms 37.7051 ms +// 190.5 us 149.566 us 282.061 us +// +// ClusterComplete 100 1 2.71245 s +// 41.8305 ms 35.1286 ms 54.3935 ms +// 45.2892 ms 29.0476 ms 76.5903 ms +// +// +// ------------------------------------------------------------------------------- +// Benchmark exact operational assessment +// Bestagon crossing +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 31.3176 s +// 315.491 ms 314.929 ms 316.207 ms +// 3.2295 ms 2.63159 ms 3.8207 ms +// +// ClusterComplete 100 1 3.48814 s +// 43.6875 ms 38.5003 ms 50.7581 ms +// 30.6895 ms 24.0144 ms 39.2663 ms +// +// +// ------------------------------------------------------------------------------- +// Benchmark exact design using QuickCell +// Bestagon half adder +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 1.19416 m +// 729.032 ms 727.554 ms 730.625 ms +// 7.84468 ms 6.91439 ms 8.96589 ms +// +// ClusterComplete 100 1 10.5641 m +// 779.777 ms 772.215 ms 809.633 ms +// 68.5302 ms 11.7131 ms 161.393 ms +// +// +// ------------------------------------------------------------------------------- +// Benchmark exact design using QuickCell +// Bestagon crossing +// ............................................................................... +// +// benchmark name samples iterations est run time +// mean low mean high mean +// std dev low std dev high std dev +// ------------------------------------------------------------------------------- +// QuickExact 100 1 1.13369 m +// 703.847 ms 702.198 ms 705.588 ms +// 8.66388 ms 7.72657 ms 9.97905 ms +// +// ClusterComplete 100 1 1.16481 m +// 705.672 ms 702.891 ms 709.29 ms +// 16.0869 ms 12.7729 ms 22.5207 ms