From 3c4403667c656608655591ab8aff72f43d46b885 Mon Sep 17 00:00:00 2001
From: Wojciech Sipak <wsipak@antmicro.com>
Date: Fri, 4 Oct 2024 17:01:49 +0200
Subject: [PATCH] exclude signals from coverage: propagate form axi4_to_ahb.sv

---
 design/el2_veer.sv         | 6 ++++++
 design/el2_veer_wrapper.sv | 9 +++++++++
 2 files changed, 15 insertions(+)

diff --git a/design/el2_veer.sv b/design/el2_veer.sv
index d2305761e34..de7fe13c5ff 100644
--- a/design/el2_veer.sv
+++ b/design/el2_veer.sv
@@ -374,8 +374,11 @@ import el2_pkg::*;
 
  //// AHB LITE BUS
    output logic [31:0]           haddr,
+   /* exclude signals that are tied to constant value in axi4_to_ahb.sv */
+   /*verilator coverage_off*/
    output logic [2:0]            hburst,
    output logic                  hmastlock,
+   /*verilator coverage_on*/
    output logic [3:0]            hprot,
    output logic [2:0]            hsize,
    output logic [1:0]            htrans,
@@ -404,8 +407,11 @@ import el2_pkg::*;
 
    //System Bus Debug Master
    output logic [31:0]          sb_haddr,
+   /* exclude signals that are tied to constant value in axi4_to_ahb.sv */
+   /*verilator coverage_off*/
    output logic [2:0]           sb_hburst,
    output logic                 sb_hmastlock,
+   /*verilator coverage_on*/
    output logic [3:0]           sb_hprot,
    output logic [2:0]           sb_hsize,
    output logic [1:0]           sb_htrans,
diff --git a/design/el2_veer_wrapper.sv b/design/el2_veer_wrapper.sv
index 7e77b82e544..41a56981ff0 100644
--- a/design/el2_veer_wrapper.sv
+++ b/design/el2_veer_wrapper.sv
@@ -294,8 +294,11 @@ import el2_pkg::*;
 `ifdef RV_BUILD_AHB_LITE
  //// AHB LITE BUS
    output logic [31:0]                     haddr,
+   /* exclude signals that are tied to constant value in axi4_to_ahb.sv */
+   /*verilator coverage_off*/
    output logic [2:0]                      hburst,
    output logic                            hmastlock,
+   /*verilator coverage_on*/
    output logic [3:0]                      hprot,
    output logic [2:0]                      hsize,
    output logic [1:0]                      htrans,
@@ -307,8 +310,11 @@ import el2_pkg::*;
 
    // LSU AHB Master
    output logic [31:0]                     lsu_haddr,
+   /* exclude signals that are tied to constant value in axi4_to_ahb.sv */
+   /*verilator coverage_off*/
    output logic [2:0]                      lsu_hburst,
    output logic                            lsu_hmastlock,
+   /*verilator coverage_on*/
    output logic [3:0]                      lsu_hprot,
    output logic [2:0]                      lsu_hsize,
    output logic [1:0]                      lsu_htrans,
@@ -320,8 +326,11 @@ import el2_pkg::*;
    input logic                             lsu_hresp,
    // Debug Syster Bus AHB
    output logic [31:0]                     sb_haddr,
+   /* exclude signals that are tied to constant value in axi4_to_ahb.sv */
+   /*verilator coverage_off*/
    output logic [2:0]                      sb_hburst,
    output logic                            sb_hmastlock,
+   /*verilator coverage_on*/
    output logic [3:0]                      sb_hprot,
    output logic [2:0]                      sb_hsize,
    output logic [1:0]                      sb_htrans,