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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,128 @@ | ||
| (237_coverage_dashboard)= | ||
| # Coverage dashboard | ||
|
|
||
| ## Summary reports (all tests) | ||
| * [all coverage](external:coverage_dashboard/all/index.html) | ||
|
|
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| ## Individual test reports | ||
| * [ahb_cmark](external:coverage_dashboard/all_ahb_cmark/index.html) | ||
| * [ahb_cmark_dccm](external:coverage_dashboard/all_ahb_cmark_dccm/index.html) | ||
| * [ahb_cmark_iccm](external:coverage_dashboard/all_ahb_cmark_iccm/index.html) | ||
| * [ahb_csr_access](external:coverage_dashboard/all_ahb_csr_access/index.html) | ||
| * [ahb_csr_misa](external:coverage_dashboard/all_ahb_csr_misa/index.html) | ||
| * [ahb_csr_mseccfg](external:coverage_dashboard/all_ahb_csr_mseccfg/index.html) | ||
| * [ahb_csr_mstatus](external:coverage_dashboard/all_ahb_csr_mstatus/index.html) | ||
| * [ahb_dhry](external:coverage_dashboard/all_ahb_dhry/index.html) | ||
| * [ahb_ecc](external:coverage_dashboard/all_ahb_ecc/index.html) | ||
| * [ahb_hello_world](external:coverage_dashboard/all_ahb_hello_world/index.html) | ||
| * [ahb_hello_world_dccm](external:coverage_dashboard/all_ahb_hello_world_dccm/index.html) | ||
| * [ahb_hello_world_iccm](external:coverage_dashboard/all_ahb_hello_world_iccm/index.html) | ||
| * [ahb_insns](external:coverage_dashboard/all_ahb_insns/index.html) | ||
| * [ahb_irq](external:coverage_dashboard/all_ahb_irq/index.html) | ||
| * [ahb_modesw](external:coverage_dashboard/all_ahb_modesw/index.html) | ||
| * [ahb_perf_counters](external:coverage_dashboard/all_ahb_perf_counters/index.html) | ||
| * [ahb_pmp](external:coverage_dashboard/all_ahb_pmp/index.html) | ||
| * [axi_cmark](external:coverage_dashboard/all_axi_cmark/index.html) | ||
| * [axi_cmark_dccm](external:coverage_dashboard/all_axi_cmark_dccm/index.html) | ||
| * [axi_cmark_iccm](external:coverage_dashboard/all_axi_cmark_iccm/index.html) | ||
| * [axi_csr_access](external:coverage_dashboard/all_axi_csr_access/index.html) | ||
| * [axi_csr_misa](external:coverage_dashboard/all_axi_csr_misa/index.html) | ||
| * [axi_csr_mseccfg](external:coverage_dashboard/all_axi_csr_mseccfg/index.html) | ||
| * [axi_csr_mstatus](external:coverage_dashboard/all_axi_csr_mstatus/index.html) | ||
| * [axi_dhry](external:coverage_dashboard/all_axi_dhry/index.html) | ||
| * [axi_ecc](external:coverage_dashboard/all_axi_ecc/index.html) | ||
| * [axi_hello_world](external:coverage_dashboard/all_axi_hello_world/index.html) | ||
| * [axi_hello_world_dccm](external:coverage_dashboard/all_axi_hello_world_dccm/index.html) | ||
| * [axi_hello_world_iccm](external:coverage_dashboard/all_axi_hello_world_iccm/index.html) | ||
| * [axi_insns](external:coverage_dashboard/all_axi_insns/index.html) | ||
| * [axi_irq](external:coverage_dashboard/all_axi_irq/index.html) | ||
| * [axi_modesw](external:coverage_dashboard/all_axi_modesw/index.html) | ||
| * [axi_perf_counters](external:coverage_dashboard/all_axi_perf_counters/index.html) | ||
| * [axi_pmp](external:coverage_dashboard/all_axi_pmp/index.html) | ||
| * [dccm_test_readwrite](external:coverage_dashboard/all_dccm_test_readwrite/index.html) | ||
| * [dec_ib_test_dec_ib](external:coverage_dashboard/all_dec_ib_test_dec_ib/index.html) | ||
| * [dec_tl_test_dec_tl](external:coverage_dashboard/all_dec_tl_test_dec_tl/index.html) | ||
| * [dma_test_address](external:coverage_dashboard/all_dma_test_address/index.html) | ||
| * [dma_test_debug_address](external:coverage_dashboard/all_dma_test_debug_address/index.html) | ||
| * [dma_test_debug_read](external:coverage_dashboard/all_dma_test_debug_read/index.html) | ||
| * [dma_test_debug_write](external:coverage_dashboard/all_dma_test_debug_write/index.html) | ||
| * [dma_test_ecc](external:coverage_dashboard/all_dma_test_ecc/index.html) | ||
| * [dma_test_read](external:coverage_dashboard/all_dma_test_read/index.html) | ||
| * [dma_test_reset](external:coverage_dashboard/all_dma_test_reset/index.html) | ||
| * [dma_test_write](external:coverage_dashboard/all_dma_test_write/index.html) | ||
| * [dmi_test_dmi_read_write](external:coverage_dashboard/all_dmi_test_dmi_read_write/index.html) | ||
| * [dmi_test_jtag_ir](external:coverage_dashboard/all_dmi_test_jtag_ir/index.html) | ||
| * [exu_alu_test_arith](external:coverage_dashboard/all_exu_alu_test_arith/index.html) | ||
| * [exu_alu_test_logic](external:coverage_dashboard/all_exu_alu_test_logic/index.html) | ||
| * [exu_alu_test_zba](external:coverage_dashboard/all_exu_alu_test_zba/index.html) | ||
| * [exu_alu_test_zbb](external:coverage_dashboard/all_exu_alu_test_zbb/index.html) | ||
| * [exu_alu_test_zbp](external:coverage_dashboard/all_exu_alu_test_zbp/index.html) | ||
| * [exu_alu_test_zbs](external:coverage_dashboard/all_exu_alu_test_zbs/index.html) | ||
| * [exu_div_test_div](external:coverage_dashboard/all_exu_div_test_div/index.html) | ||
| * [exu_mul_test_mul](external:coverage_dashboard/all_exu_mul_test_mul/index.html) | ||
| * [iccm_test_readwrite](external:coverage_dashboard/all_iccm_test_readwrite/index.html) | ||
| * [ifu_compress_test_compress](external:coverage_dashboard/all_ifu_compress_test_compress/index.html) | ||
| * [lib_ahb_to_axi4_test_read](external:coverage_dashboard/all_lib_ahb_to_axi4_test_read/index.html) | ||
| * [lib_ahb_to_axi4_test_write](external:coverage_dashboard/all_lib_ahb_to_axi4_test_write/index.html) | ||
| * [lib_axi4_to_ahb_test_axi](external:coverage_dashboard/all_lib_axi4_to_ahb_test_axi/index.html) | ||
| * [lib_axi4_to_ahb_test_axi_read_channel](external:coverage_dashboard/all_lib_axi4_to_ahb_test_axi_read_channel/index.html) | ||
| * [lib_axi4_to_ahb_test_axi_write_channel](external:coverage_dashboard/all_lib_axi4_to_ahb_test_axi_write_channel/index.html) | ||
| * [lsu_tl_test_lsu_tl](external:coverage_dashboard/all_lsu_tl_test_lsu_tl/index.html) | ||
| * [openocd_ahb_lite](external:coverage_dashboard/all_openocd_ahb_lite/index.html) | ||
| * [openocd_axi4](external:coverage_dashboard/all_openocd_axi4/index.html) | ||
| * [pic_gw_test_gateway](external:coverage_dashboard/all_pic_gw_test_gateway/index.html) | ||
| * [pic_test_clken](external:coverage_dashboard/all_pic_test_clken/index.html) | ||
| * [pic_test_config](external:coverage_dashboard/all_pic_test_config/index.html) | ||
| * [pic_test_prioritization](external:coverage_dashboard/all_pic_test_prioritization/index.html) | ||
| * [pic_test_reset](external:coverage_dashboard/all_pic_test_reset/index.html) | ||
| * [pic_test_servicing](external:coverage_dashboard/all_pic_test_servicing/index.html) | ||
| * [pmp_test_address_matching](external:coverage_dashboard/all_pmp_test_address_matching/index.html) | ||
| * [pmp_test_multiple_configs](external:coverage_dashboard/all_pmp_test_multiple_configs/index.html) | ||
| * [pmp_test_xwr_access](external:coverage_dashboard/all_pmp_test_xwr_access/index.html) | ||
| * [riscof_](external:coverage_dashboard/all_riscof_/index.html) | ||
| * [riscof_u](external:coverage_dashboard/all_riscof_u/index.html) | ||
| * [riscv-dv__riscv_arithmetic_basic_test](external:coverage_dashboard/all_riscv-dv__riscv_arithmetic_basic_test/index.html) | ||
| * [riscv-dv__riscv_bitmanip_balanced_test_veer](external:coverage_dashboard/all_riscv-dv__riscv_bitmanip_balanced_test_veer/index.html) | ||
| * [riscv-dv__riscv_bitmanip_full_test_veer](external:coverage_dashboard/all_riscv-dv__riscv_bitmanip_full_test_veer/index.html) | ||
| * [riscv-dv__riscv_ebreak_debug_mode_test](external:coverage_dashboard/all_riscv-dv__riscv_ebreak_debug_mode_test/index.html) | ||
| * [riscv-dv__riscv_ebreak_test](external:coverage_dashboard/all_riscv-dv__riscv_ebreak_test/index.html) | ||
| * [riscv-dv__riscv_full_interrupt_test](external:coverage_dashboard/all_riscv-dv__riscv_full_interrupt_test/index.html) | ||
| * [riscv-dv__riscv_hint_instr_test](external:coverage_dashboard/all_riscv-dv__riscv_hint_instr_test/index.html) | ||
| * [riscv-dv__riscv_illegal_instr_test](external:coverage_dashboard/all_riscv-dv__riscv_illegal_instr_test/index.html) | ||
| * [riscv-dv__riscv_jump_stress_test](external:coverage_dashboard/all_riscv-dv__riscv_jump_stress_test/index.html) | ||
| * [riscv-dv__riscv_loop_test](external:coverage_dashboard/all_riscv-dv__riscv_loop_test/index.html) | ||
| * [riscv-dv__riscv_mmu_stress_test](external:coverage_dashboard/all_riscv-dv__riscv_mmu_stress_test/index.html) | ||
| * [riscv-dv__riscv_no_fence_test](external:coverage_dashboard/all_riscv-dv__riscv_no_fence_test/index.html) | ||
| * [riscv-dv__riscv_non_compressed_instr_test](external:coverage_dashboard/all_riscv-dv__riscv_non_compressed_instr_test/index.html) | ||
| * [riscv-dv__riscv_pmp_disable_all_regions_test_veer](external:coverage_dashboard/all_riscv-dv__riscv_pmp_disable_all_regions_test_veer/index.html) | ||
| * [riscv-dv__riscv_pmp_full_random_test_veer](external:coverage_dashboard/all_riscv-dv__riscv_pmp_full_random_test_veer/index.html) | ||
| * [riscv-dv__riscv_pmp_out_of_bounds_test_veer](external:coverage_dashboard/all_riscv-dv__riscv_pmp_out_of_bounds_test_veer/index.html) | ||
| * [riscv-dv__riscv_pmp_region_exec_test_veer](external:coverage_dashboard/all_riscv-dv__riscv_pmp_region_exec_test_veer/index.html) | ||
| * [riscv-dv__riscv_pmp_test](external:coverage_dashboard/all_riscv-dv__riscv_pmp_test/index.html) | ||
| * [riscv-dv__riscv_rand_instr_test](external:coverage_dashboard/all_riscv-dv__riscv_rand_instr_test/index.html) | ||
| * [riscv-dv__riscv_rand_jump_test](external:coverage_dashboard/all_riscv-dv__riscv_rand_jump_test/index.html) | ||
| * [riscv-dv__riscv_unaligned_load_store_test](external:coverage_dashboard/all_riscv-dv__riscv_unaligned_load_store_test/index.html) | ||
| * [riscv-dv__riscv_user_mode_rand_test](external:coverage_dashboard/all_riscv-dv__riscv_user_mode_rand_test/index.html) | ||
| * [riscv-dv_u_riscv_arithmetic_basic_test](external:coverage_dashboard/all_riscv-dv_u_riscv_arithmetic_basic_test/index.html) | ||
| * [riscv-dv_u_riscv_bitmanip_balanced_test_veer](external:coverage_dashboard/all_riscv-dv_u_riscv_bitmanip_balanced_test_veer/index.html) | ||
| * [riscv-dv_u_riscv_bitmanip_full_test_veer](external:coverage_dashboard/all_riscv-dv_u_riscv_bitmanip_full_test_veer/index.html) | ||
| * [riscv-dv_u_riscv_ebreak_debug_mode_test](external:coverage_dashboard/all_riscv-dv_u_riscv_ebreak_debug_mode_test/index.html) | ||
| * [riscv-dv_u_riscv_ebreak_test](external:coverage_dashboard/all_riscv-dv_u_riscv_ebreak_test/index.html) | ||
| * [riscv-dv_u_riscv_full_interrupt_test](external:coverage_dashboard/all_riscv-dv_u_riscv_full_interrupt_test/index.html) | ||
| * [riscv-dv_u_riscv_hint_instr_test](external:coverage_dashboard/all_riscv-dv_u_riscv_hint_instr_test/index.html) | ||
| * [riscv-dv_u_riscv_illegal_instr_test](external:coverage_dashboard/all_riscv-dv_u_riscv_illegal_instr_test/index.html) | ||
| * [riscv-dv_u_riscv_jump_stress_test](external:coverage_dashboard/all_riscv-dv_u_riscv_jump_stress_test/index.html) | ||
| * [riscv-dv_u_riscv_loop_test](external:coverage_dashboard/all_riscv-dv_u_riscv_loop_test/index.html) | ||
| * [riscv-dv_u_riscv_mmu_stress_test](external:coverage_dashboard/all_riscv-dv_u_riscv_mmu_stress_test/index.html) | ||
| * [riscv-dv_u_riscv_no_fence_test](external:coverage_dashboard/all_riscv-dv_u_riscv_no_fence_test/index.html) | ||
| * [riscv-dv_u_riscv_non_compressed_instr_test](external:coverage_dashboard/all_riscv-dv_u_riscv_non_compressed_instr_test/index.html) | ||
| * [riscv-dv_u_riscv_pmp_disable_all_regions_test_veer](external:coverage_dashboard/all_riscv-dv_u_riscv_pmp_disable_all_regions_test_veer/index.html) | ||
| * [riscv-dv_u_riscv_pmp_full_random_test_veer](external:coverage_dashboard/all_riscv-dv_u_riscv_pmp_full_random_test_veer/index.html) | ||
| * [riscv-dv_u_riscv_pmp_out_of_bounds_test_veer](external:coverage_dashboard/all_riscv-dv_u_riscv_pmp_out_of_bounds_test_veer/index.html) | ||
| * [riscv-dv_u_riscv_pmp_region_exec_test_veer](external:coverage_dashboard/all_riscv-dv_u_riscv_pmp_region_exec_test_veer/index.html) | ||
| * [riscv-dv_u_riscv_pmp_test](external:coverage_dashboard/all_riscv-dv_u_riscv_pmp_test/index.html) | ||
| * [riscv-dv_u_riscv_rand_instr_test](external:coverage_dashboard/all_riscv-dv_u_riscv_rand_instr_test/index.html) | ||
| * [riscv-dv_u_riscv_rand_jump_test](external:coverage_dashboard/all_riscv-dv_u_riscv_rand_jump_test/index.html) | ||
| * [riscv-dv_u_riscv_unaligned_load_store_test](external:coverage_dashboard/all_riscv-dv_u_riscv_unaligned_load_store_test/index.html) | ||
| * [riscv-dv_u_riscv_user_mode_rand_test](external:coverage_dashboard/all_riscv-dv_u_riscv_user_mode_rand_test/index.html) | ||
| * [test_pyuvm](external:coverage_dashboard/all_test_pyuvm/index.html) |
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