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[ci] update t1 test case cycle data
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github-actions committed Nov 20, 2024
1 parent 8f90fbe commit ccd5806
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Showing 2 changed files with 7 additions and 7 deletions.
8 changes: 4 additions & 4 deletions .github/designs/blastoise/t1emu.json
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Expand Up @@ -2,7 +2,7 @@
"pytorch.demo": 77,
"pytorch.lenet": 1116581,
"pytorch.matmul": 14556,
"mlir.rvv_vp_intrinsic_add": 448,
"mlir.rvv_vp_intrinsic_add": 445,
"mlir.rvv_vp_intrinsic_add_scalable": 729,
"mlir.hello": 137,
"mlir.stripmining": 8869,
Expand All @@ -14,10 +14,10 @@
"rvv_bench.ascii_to_utf16": 11282,
"rvv_bench.ascii_to_utf32": 4694,
"rvv_bench.byteswap": 19955,
"rvv_bench.mandelbrot": 247231,
"rvv_bench.mandelbrot": 230851,
"rvv_bench.memcpy": 34534,
"rvv_bench.memset": 11501,
"rvv_bench.mergelines": 24911,
"rvv_bench.mergelines": 24842,
"rvv_bench.strlen": 22697,
"rvv_bench.utf8_count": 151124
"rvv_bench.utf8_count": 151155
}
6 changes: 3 additions & 3 deletions .github/designs/rookidee/t1emu.json
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Expand Up @@ -3,15 +3,15 @@
"asm.smoke": 7770,
"intrinsic.conv2d_less_m2": 2710,
"mlir.hello": 136,
"mlir.rvv_vp_intrinsic_add": 445,
"mlir.rvv_vp_intrinsic_add": 442,
"mlir.rvv_vp_intrinsic_add_scalable": 637,
"mlir.stripmining": 27810,
"rvv_bench.ascii_to_utf16": 16070,
"rvv_bench.ascii_to_utf32": 6057,
"rvv_bench.byteswap": 43275,
"rvv_bench.memcpy": 46320,
"rvv_bench.memset": 19350,
"rvv_bench.mergelines": 38578,
"rvv_bench.mergelines": 38541,
"rvv_bench.strlen": 34517,
"rvv_bench.utf8_count": 206393
"rvv_bench.utf8_count": 206417
}

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