From 3bd5801fcf0465bb557a447196300651e9afc5e4 Mon Sep 17 00:00:00 2001 From: drom Date: Mon, 12 Aug 2024 13:29:52 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20@=20circt/pe?= =?UTF-8?q?rf@7155120531cd12e76b8df51e09b3d90b512caa0e=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ...Medium1Large1Mega1.top.v.lo-2024-08-12.log | 99 +++++++++++++++++++ ...Large1Mega1.top.v.lo-vlint-2024-08-12.json | 49 +++++++++ test1-2024-08-12.log | 26 +++++ test1-vlint-2024-08-12.json | 4 + test2-2024-08-12.log | 20 ++++ test2-vlint-2024-08-12.json | 4 + test3-2024-08-12.log | 29 ++++++ test3-vlint-2024-08-12.json | 4 + 8 files changed, 235 insertions(+) create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-08-12.log create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-08-12.json create mode 100644 test1-2024-08-12.log create mode 100644 test1-vlint-2024-08-12.json create mode 100644 test2-2024-08-12.log create mode 100644 test2-vlint-2024-08-12.json create mode 100644 test3-2024-08-12.log create mode 100644 test3-vlint-2024-08-12.json diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-08-12.log b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-08-12.log new file mode 100644 index 0000000..d8c103f --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-08-12.log @@ -0,0 +1,99 @@ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 17.2444 seconds + + ----User Time---- ----Wall Time---- ----Name---- + 2.7270 ( 7.0%) 2.7270 ( 15.8%) FIR Parser + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse OMIR + 2.3346 ( 6.0%) 2.3346 ( 13.5%) Parse modules + 0.3446 ( 0.9%) 0.3446 ( 2.0%) Verify circuit + 16.4548 ( 42.5%) 7.1862 ( 41.7%) 'firrtl.circuit' Pipeline + 0.3417 ( 0.9%) 0.3417 ( 2.0%) LowerFIRRTLAnnotations + 0.0944 ( 0.2%) 0.0944 ( 0.5%) LowerIntrinsics + 0.0943 ( 0.2%) 0.0943 ( 0.5%) (A) circt::firrtl::InstanceGraph + 3.1383 ( 8.1%) 0.8059 ( 4.7%) 'firrtl.module' Pipeline + 1.3276 ( 3.4%) 0.3714 ( 2.2%) DropName + 1.8074 ( 4.7%) 0.4669 ( 2.7%) CSE + 0.0011 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.0000 ( 0.0%) 0.0000 ( 0.0%) InjectDUTHierarchy + 0.1131 ( 0.3%) 0.0289 ( 0.2%) 'firrtl.module' Pipeline + 0.1107 ( 0.3%) 0.0286 ( 0.2%) LowerCHIRRTLPass + 0.0988 ( 0.3%) 0.0988 ( 0.6%) InferWidths + 0.2062 ( 0.5%) 0.2062 ( 1.2%) MemToRegOfVec + 0.3814 ( 1.0%) 0.3814 ( 2.2%) InferResets + 0.0526 ( 0.1%) 0.0526 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0694 ( 0.2%) 0.0694 ( 0.4%) WireDFT + 0.5264 ( 1.4%) 0.1355 ( 0.8%) 'firrtl.module' Pipeline + 0.5245 ( 1.4%) 0.1349 ( 0.8%) FlattenMemory + 0.2674 ( 0.7%) 0.2674 ( 1.6%) LowerFIRRTLTypes + 0.6911 ( 1.8%) 0.1785 ( 1.0%) 'firrtl.module' Pipeline + 0.6701 ( 1.7%) 0.1732 ( 1.0%) ExpandWhens + 0.0178 ( 0.0%) 0.0058 ( 0.0%) SFCCompat + 0.3339 ( 0.9%) 0.3339 ( 1.9%) Inliner + 0.5831 ( 1.5%) 0.1484 ( 0.9%) 'firrtl.module' Pipeline + 0.5811 ( 1.5%) 0.1479 ( 0.9%) RandomizeRegisterInit + 0.9593 ( 2.5%) 0.9593 ( 5.6%) CheckCombLoops + 0.0525 ( 0.1%) 0.0525 ( 0.3%) (A) circt::firrtl::InstanceGraph + 3.8903 ( 10.0%) 1.0122 ( 5.9%) 'firrtl.module' Pipeline + 3.6050 ( 9.3%) 0.9579 ( 5.6%) Canonicalizer + 0.2822 ( 0.7%) 0.0901 ( 0.5%) InferReadWrite + 0.1474 ( 0.4%) 0.1474 ( 0.9%) PrefixModules + 0.0551 ( 0.1%) 0.0551 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.6680 ( 1.7%) 0.6680 ( 3.9%) IMConstProp + 0.0572 ( 0.1%) 0.0572 ( 0.3%) AddSeqMemPorts + 0.0570 ( 0.1%) 0.0570 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.1656 ( 0.4%) 0.1656 ( 1.0%) CreateSiFiveMetadata + 0.0457 ( 0.1%) 0.0457 ( 0.3%) ExtractInstances + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.0000 ( 0.0%) 0.0000 ( 0.0%) GrandCentral + 0.0003 ( 0.0%) 0.0003 ( 0.0%) BlackBoxReader + 0.3263 ( 0.8%) 0.0841 ( 0.5%) 'firrtl.module' Pipeline + 0.3243 ( 0.8%) 0.0837 ( 0.5%) DropName + 0.3227 ( 0.8%) 0.3227 ( 1.9%) SymbolDCE + 0.2447 ( 0.6%) 0.2447 ( 1.4%) InnerSymbolDCE + 2.0261 ( 5.2%) 1.1566 ( 6.7%) 'firrtl.circuit' Pipeline + 0.8694 ( 2.2%) 0.2230 ( 1.3%) 'firrtl.module' Pipeline + 0.8676 ( 2.2%) 0.2227 ( 1.3%) Canonicalizer + 0.5511 ( 1.4%) 0.5511 ( 3.2%) IMDeadCodeElim + 0.0599 ( 0.2%) 0.0599 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0000 ( 0.0%) 0.0000 ( 0.0%) EmitOMIR + 0.0253 ( 0.1%) 0.0253 ( 0.1%) ResolveTraces + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.2636 ( 0.7%) 0.2636 ( 1.5%) LowerXMR + 0.0532 ( 0.1%) 0.0532 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.7218 ( 1.9%) 0.7218 ( 4.2%) LowerFIRRTLToHW + 0.0568 ( 0.1%) 0.0568 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 5.3457 ( 13.8%) 1.4979 ( 8.7%) 'hw.module' Pipeline + 0.9674 ( 2.5%) 0.2490 ( 1.4%) CSE + 0.0010 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 3.1040 ( 8.0%) 1.0300 ( 6.0%) Canonicalizer + 0.6333 ( 1.6%) 0.1745 ( 1.0%) CSE + 0.0006 ( 0.0%) 0.0002 ( 0.0%) (A) DominanceInfo + 0.6348 ( 1.6%) 0.1966 ( 1.1%) LowerSeqFIRRTLToSV + 0.1869 ( 0.5%) 0.1869 ( 1.1%) HWMemSimImpl + 3.8134 ( 9.8%) 1.0918 ( 6.3%) 'hw.module' Pipeline + 1.0817 ( 2.8%) 0.2994 ( 1.7%) CSE + 0.0012 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 1.8291 ( 4.7%) 0.6485 ( 3.8%) Canonicalizer + 0.5883 ( 1.5%) 0.1950 ( 1.1%) CSE + 0.0010 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.3069 ( 0.8%) 0.0955 ( 0.6%) HWCleanup + 0.6170 ( 1.6%) 0.1546 ( 0.9%) 'hw.module' Pipeline + 0.0801 ( 0.2%) 0.0311 ( 0.2%) HWLegalizeModules + 0.5318 ( 1.4%) 0.1381 ( 0.8%) PrettifyVerilog + 0.2291 ( 0.6%) 0.2291 ( 1.3%) StripDebugInfoWithPred + 1.7384 ( 4.5%) 1.7384 ( 10.1%) ExportVerilog + 2.1263 ( 5.5%) 0.5583 ( 3.2%) 'builtin.module' Pipeline + 1.5680 ( 4.0%) 0.3954 ( 2.3%) 'hw.module' Pipeline + 1.5655 ( 4.0%) 0.3948 ( 2.3%) PrepareForEmission + -0.5529 ( -1.4%) -0.5529 ( -3.2%) Rest + 38.7266 (100.0%) 17.2444 (100.0%) Total + +{ + totalTime: 17.298, + maxMemory: 872304640 +} diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-08-12.json b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-08-12.json new file mode 100644 index 0000000..7261973 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-08-12.json @@ -0,0 +1,49 @@ +{ + "errors": { + "'table_1_ext'": 1, + "This may be because there's no search path specified with -I.": 1, + "'table_0_ext'": 1, + "'hi_us_0_ext'": 1, + "'table_ext'": 1, + "'hi_us_ext'": 1, + "'meta_0_0_ext'": 1, + "'data_ext'": 1, + "'ebtb_ext'": 1, + "'btb_0_ext'": 1, + "'meta_0_ext'": 1, + "'rob_debug_inst_mem_1_ext'": 1, + "'meta_2_ext'": 1, + "'tag_array_5_ext'": 1, + "'rob_debug_inst_mem_0_ext'": 1, + "'ghist_0_0_ext'": 1, + "'meta_1_ext'": 1, + "'rob_debug_inst_mem_ext'": 1, + "'ghist_0_ext'": 1, + "'meta_ext'": 1, + "'dataArrayB0Way_0_ext'": 1, + "'tag_array_4_ext'": 1, + "'array_0_0_ext'": 1, + "'tag_array_3_ext'": 1, + "'data_arrays_0_2_ext'": 1, + "'tag_array_2_ext'": 1, + "'data_arrays_0_1_ext'": 1, + "'data_arrays_0_0_ext'": 1, + "'tag_array_0_ext'": 1, + "'tag_array_ext'": 1, + "'data_arrays_0_ext'": 1, + "'plusarg_reader'": 142, + "'l2_tlb_ram_1_ext'": 1, + "'l2_tlb_ram_0_ext'": 1, + "'tag_array_1_ext'": 1, + "'l2_tlb_ram_ext'": 1, + "'cc_banks_0_ext'": 1, + "'cc_dir_ext'": 1, + "'ClockDividerN'": 1, + "'EICG_wrapper'": 1, + "'GenericDigitalOutIOCell'": 9, + "'GenericDigitalInIOCell'": 13 + }, + "warnings": { + "WIDTH": 113 + } +} \ No newline at end of file diff --git a/test1-2024-08-12.log b/test1-2024-08-12.log new file mode 100644 index 0000000..d32fa41 --- /dev/null +++ b/test1-2024-08-12.log @@ -0,0 +1,26 @@ +regress/test1.fir:7247:15: error: use of unknown declaration 'validif' + tmp499 <= validif(head(inp_a.inp_c.inp_j.inp_gc.inp_gkb.inp_flb.inp_fic, 1), SInt<13>("h-b9c")) + ^ +regress/test1.fir:28262:15: error: use of unknown declaration 'validif' + tmp550 <= validif(tail(asUInt(SInt<22>("h-3089")), 21), tmp548) + ^ +regress/test1.fir:51636:15: error: use of unknown declaration 'validif' + tmp541 <= validif(tail(inp_jc.inp_hd.inp_ae.inp_ei.inp_ahb.inp_mlc, 26), inp_a.inp_b.inp_d.inp_f.inp_g.inp_bb.inp_eb.inp_kd.inp_nk.inp_an.inp_gp.inp_mic) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.0693 seconds + + ----Wall Time---- ----Name---- + 0.0685 ( 99.0%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.0640 ( 92.4%) Parse modules + 0.0007 ( 1.0%) Rest + 0.0693 (100.0%) Total + +{ + totalTime: 0.078, + maxMemory: 0 +} diff --git a/test1-vlint-2024-08-12.json b/test1-vlint-2024-08-12.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test1-vlint-2024-08-12.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test2-2024-08-12.log b/test2-2024-08-12.log new file mode 100644 index 0000000..923bf5f --- /dev/null +++ b/test2-2024-08-12.log @@ -0,0 +1,20 @@ +regress/test2.fir:247424:17: error: use of unknown declaration 'validif' + tmp20070 <= validif(head(UInt<3>(6), 1), SInt<24>("b-11111101000010001010101")) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.9006 seconds + + ----Wall Time---- ----Name---- + 0.8989 ( 99.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.8532 ( 94.7%) Parse modules + 0.0017 ( 0.2%) Rest + 0.9006 (100.0%) Total + +{ + totalTime: 0.916, + maxMemory: 165953536 +} diff --git a/test2-vlint-2024-08-12.json b/test2-vlint-2024-08-12.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test2-vlint-2024-08-12.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test3-2024-08-12.log b/test3-2024-08-12.log new file mode 100644 index 0000000..2289e07 --- /dev/null +++ b/test3-2024-08-12.log @@ -0,0 +1,29 @@ +regress/test3.fir:20273:15: error: use of unknown declaration 'validif' + tmp236 <= validif(head(inp_h.inp_i.inp_k.inp_p.inp_gb.inp_pb.inp_nd[0][3][3].inp_ng.inp_li, 1), UInt<6>(33)) + ^ +regress/test3.fir:170544:16: error: use of unknown declaration 'validif' + tmp2807 <= validif(tail(UInt<29>("b111111100001000110000101110"), 28), SInt<4>("o-1")) + ^ +regress/test3.fir:324162:15: error: use of unknown declaration 'validif' + tmp523 <= validif(head(inp_e.inp_ob.inp_ge.inp_ki[1][2][3].inp_hk.inp_il, 1), inp_a.inp_c.inp_hc.inp_fd.inp_je.inp_dl) + ^ +regress/test3.fir:847311:15: error: use of unknown declaration 'validif' + tmp237 <= validif(tail(asUInt(inp_e.inp_i.inp_j.inp_bb[4][4].inp_oh), 18), tmp227) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.4309 seconds + + ----Wall Time---- ----Name---- + 0.4285 ( 99.5%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.3927 ( 91.1%) Parse modules + 0.0023 ( 0.5%) Rest + 0.4309 (100.0%) Total + +{ + totalTime: 0.441, + maxMemory: 130519040 +} diff --git a/test3-vlint-2024-08-12.json b/test3-vlint-2024-08-12.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test3-vlint-2024-08-12.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file