From 4e2e392a45e2a1581fab68540f776d3d03ea8356 Mon Sep 17 00:00:00 2001 From: drom Date: Tue, 12 Nov 2024 13:32:05 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20@=20circt/pe?= =?UTF-8?q?rf@7155120531cd12e76b8df51e09b3d90b512caa0e=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ...Medium1Large1Mega1.top.v.lo-2024-11-12.log | 99 +++++++++++++++++++ ...Large1Mega1.top.v.lo-vlint-2024-11-12.json | 49 +++++++++ test1-2024-11-12.log | 26 +++++ test1-vlint-2024-11-12.json | 4 + test2-2024-11-12.log | 20 ++++ test2-vlint-2024-11-12.json | 4 + test3-2024-11-12.log | 29 ++++++ test3-vlint-2024-11-12.json | 4 + 8 files changed, 235 insertions(+) create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-12.log create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-12.json create mode 100644 test1-2024-11-12.log create mode 100644 test1-vlint-2024-11-12.json create mode 100644 test2-2024-11-12.log create mode 100644 test2-vlint-2024-11-12.json create mode 100644 test3-2024-11-12.log create mode 100644 test3-vlint-2024-11-12.json diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-12.log b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-12.log new file mode 100644 index 0000000..6346af4 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-12.log @@ -0,0 +1,99 @@ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 16.0968 seconds + + ----User Time---- ----Wall Time---- ----Name---- + 2.6981 ( 7.6%) 2.6981 ( 16.8%) FIR Parser + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse OMIR + 2.3135 ( 6.5%) 2.3135 ( 14.4%) Parse modules + 0.3427 ( 1.0%) 0.3427 ( 2.1%) Verify circuit + 14.8574 ( 41.7%) 6.6573 ( 41.4%) 'firrtl.circuit' Pipeline + 0.3362 ( 0.9%) 0.3362 ( 2.1%) LowerFIRRTLAnnotations + 0.0921 ( 0.3%) 0.0921 ( 0.6%) LowerIntrinsics + 0.0920 ( 0.3%) 0.0920 ( 0.6%) (A) circt::firrtl::InstanceGraph + 2.8909 ( 8.1%) 0.7396 ( 4.6%) 'firrtl.module' Pipeline + 1.1898 ( 3.3%) 0.3071 ( 1.9%) DropName + 1.6980 ( 4.8%) 0.4316 ( 2.7%) CSE + 0.0008 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.0000 ( 0.0%) 0.0000 ( 0.0%) InjectDUTHierarchy + 0.1212 ( 0.3%) 0.0310 ( 0.2%) 'firrtl.module' Pipeline + 0.1145 ( 0.3%) 0.0305 ( 0.2%) LowerCHIRRTLPass + 0.0943 ( 0.3%) 0.0943 ( 0.6%) InferWidths + 0.2015 ( 0.6%) 0.2015 ( 1.3%) MemToRegOfVec + 0.3677 ( 1.0%) 0.3677 ( 2.3%) InferResets + 0.0496 ( 0.1%) 0.0496 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0643 ( 0.2%) 0.0643 ( 0.4%) WireDFT + 0.5146 ( 1.4%) 0.1321 ( 0.8%) 'firrtl.module' Pipeline + 0.5125 ( 1.4%) 0.1317 ( 0.8%) FlattenMemory + 0.2578 ( 0.7%) 0.2578 ( 1.6%) LowerFIRRTLTypes + 0.6749 ( 1.9%) 0.1732 ( 1.1%) 'firrtl.module' Pipeline + 0.6543 ( 1.8%) 0.1682 ( 1.0%) ExpandWhens + 0.0172 ( 0.0%) 0.0056 ( 0.0%) SFCCompat + 0.3188 ( 0.9%) 0.3188 ( 2.0%) Inliner + 0.5401 ( 1.5%) 0.1392 ( 0.9%) 'firrtl.module' Pipeline + 0.5380 ( 1.5%) 0.1385 ( 0.9%) RandomizeRegisterInit + 0.9281 ( 2.6%) 0.9281 ( 5.8%) CheckCombLoops + 0.0482 ( 0.1%) 0.0482 ( 0.3%) (A) circt::firrtl::InstanceGraph + 3.1375 ( 8.8%) 0.8008 ( 5.0%) 'firrtl.module' Pipeline + 2.8699 ( 8.1%) 0.7490 ( 4.7%) Canonicalizer + 0.2643 ( 0.7%) 0.0712 ( 0.4%) InferReadWrite + 0.1395 ( 0.4%) 0.1395 ( 0.9%) PrefixModules + 0.0533 ( 0.1%) 0.0533 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.6022 ( 1.7%) 0.6022 ( 3.7%) IMConstProp + 0.0534 ( 0.1%) 0.0534 ( 0.3%) AddSeqMemPorts + 0.0532 ( 0.1%) 0.0532 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.1596 ( 0.4%) 0.1596 ( 1.0%) CreateSiFiveMetadata + 0.0398 ( 0.1%) 0.0398 ( 0.2%) ExtractInstances + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.0000 ( 0.0%) 0.0000 ( 0.0%) GrandCentral + 0.0004 ( 0.0%) 0.0004 ( 0.0%) BlackBoxReader + 0.3210 ( 0.9%) 0.0824 ( 0.5%) 'firrtl.module' Pipeline + 0.3188 ( 0.9%) 0.0819 ( 0.5%) DropName + 0.3042 ( 0.9%) 0.3042 ( 1.9%) SymbolDCE + 0.2265 ( 0.6%) 0.2265 ( 1.4%) InnerSymbolDCE + 1.9575 ( 5.5%) 1.0917 ( 6.8%) 'firrtl.circuit' Pipeline + 0.8658 ( 2.4%) 0.2219 ( 1.4%) 'firrtl.module' Pipeline + 0.8639 ( 2.4%) 0.2214 ( 1.4%) Canonicalizer + 0.5056 ( 1.4%) 0.5056 ( 3.1%) IMDeadCodeElim + 0.0531 ( 0.1%) 0.0531 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0000 ( 0.0%) 0.0000 ( 0.0%) EmitOMIR + 0.0294 ( 0.1%) 0.0294 ( 0.2%) ResolveTraces + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.2483 ( 0.7%) 0.2483 ( 1.5%) LowerXMR + 0.0492 ( 0.1%) 0.0492 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.6783 ( 1.9%) 0.6783 ( 4.2%) LowerFIRRTLToHW + 0.0529 ( 0.1%) 0.0529 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 5.0804 ( 14.3%) 1.3879 ( 8.6%) 'hw.module' Pipeline + 0.9451 ( 2.7%) 0.2545 ( 1.6%) CSE + 0.0008 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 2.9430 ( 8.3%) 0.9549 ( 5.9%) Canonicalizer + 0.6106 ( 1.7%) 0.1699 ( 1.1%) CSE + 0.0007 ( 0.0%) 0.0002 ( 0.0%) (A) DominanceInfo + 0.5760 ( 1.6%) 0.1724 ( 1.1%) LowerSeqFIRRTLToSV + 0.1708 ( 0.5%) 0.1708 ( 1.1%) HWMemSimImpl + 3.3199 ( 9.3%) 0.9349 ( 5.8%) 'hw.module' Pipeline + 0.9124 ( 2.6%) 0.2603 ( 1.6%) CSE + 0.0012 ( 0.0%) 0.0004 ( 0.0%) (A) DominanceInfo + 1.6258 ( 4.6%) 0.5722 ( 3.6%) Canonicalizer + 0.5249 ( 1.5%) 0.1535 ( 1.0%) CSE + 0.0008 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.2492 ( 0.7%) 0.0761 ( 0.5%) HWCleanup + 0.5617 ( 1.6%) 0.1409 ( 0.9%) 'hw.module' Pipeline + 0.0545 ( 0.2%) 0.0146 ( 0.1%) HWLegalizeModules + 0.5022 ( 1.4%) 0.1276 ( 0.8%) PrettifyVerilog + 0.2081 ( 0.6%) 0.2081 ( 1.3%) StripDebugInfoWithPred + 1.6258 ( 4.6%) 1.6258 ( 10.1%) ExportVerilog + 2.0033 ( 5.6%) 0.5215 ( 3.2%) 'builtin.module' Pipeline + 1.4818 ( 4.2%) 0.3720 ( 2.3%) 'hw.module' Pipeline + 1.4790 ( 4.2%) 0.3715 ( 2.3%) PrepareForEmission + -0.5167 ( -1.5%) -0.5167 ( -3.2%) Rest + 35.6064 (100.0%) 16.0968 (100.0%) Total + +{ + totalTime: 16.138, + maxMemory: 883580928 +} diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-12.json b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-12.json new file mode 100644 index 0000000..7261973 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-12.json @@ -0,0 +1,49 @@ +{ + "errors": { + "'table_1_ext'": 1, + "This may be because there's no search path specified with -I.": 1, + "'table_0_ext'": 1, + "'hi_us_0_ext'": 1, + "'table_ext'": 1, + "'hi_us_ext'": 1, + "'meta_0_0_ext'": 1, + "'data_ext'": 1, + "'ebtb_ext'": 1, + "'btb_0_ext'": 1, + "'meta_0_ext'": 1, + "'rob_debug_inst_mem_1_ext'": 1, + "'meta_2_ext'": 1, + "'tag_array_5_ext'": 1, + "'rob_debug_inst_mem_0_ext'": 1, + "'ghist_0_0_ext'": 1, + "'meta_1_ext'": 1, + "'rob_debug_inst_mem_ext'": 1, + "'ghist_0_ext'": 1, + "'meta_ext'": 1, + "'dataArrayB0Way_0_ext'": 1, + "'tag_array_4_ext'": 1, + "'array_0_0_ext'": 1, + "'tag_array_3_ext'": 1, + "'data_arrays_0_2_ext'": 1, + "'tag_array_2_ext'": 1, + "'data_arrays_0_1_ext'": 1, + "'data_arrays_0_0_ext'": 1, + "'tag_array_0_ext'": 1, + "'tag_array_ext'": 1, + "'data_arrays_0_ext'": 1, + "'plusarg_reader'": 142, + "'l2_tlb_ram_1_ext'": 1, + "'l2_tlb_ram_0_ext'": 1, + "'tag_array_1_ext'": 1, + "'l2_tlb_ram_ext'": 1, + "'cc_banks_0_ext'": 1, + "'cc_dir_ext'": 1, + "'ClockDividerN'": 1, + "'EICG_wrapper'": 1, + "'GenericDigitalOutIOCell'": 9, + "'GenericDigitalInIOCell'": 13 + }, + "warnings": { + "WIDTH": 113 + } +} \ No newline at end of file diff --git a/test1-2024-11-12.log b/test1-2024-11-12.log new file mode 100644 index 0000000..e7962d7 --- /dev/null +++ b/test1-2024-11-12.log @@ -0,0 +1,26 @@ +regress/test1.fir:7247:15: error: use of unknown declaration 'validif' + tmp499 <= validif(head(inp_a.inp_c.inp_j.inp_gc.inp_gkb.inp_flb.inp_fic, 1), SInt<13>("h-b9c")) + ^ +regress/test1.fir:28262:15: error: use of unknown declaration 'validif' + tmp550 <= validif(tail(asUInt(SInt<22>("h-3089")), 21), tmp548) + ^ +regress/test1.fir:51636:15: error: use of unknown declaration 'validif' + tmp541 <= validif(tail(inp_jc.inp_hd.inp_ae.inp_ei.inp_ahb.inp_mlc, 26), inp_a.inp_b.inp_d.inp_f.inp_g.inp_bb.inp_eb.inp_kd.inp_nk.inp_an.inp_gp.inp_mic) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.0733 seconds + + ----Wall Time---- ----Name---- + 0.0726 ( 99.0%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.0680 ( 92.8%) Parse modules + 0.0007 ( 1.0%) Rest + 0.0733 (100.0%) Total + +{ + totalTime: 0.082, + maxMemory: 0 +} diff --git a/test1-vlint-2024-11-12.json b/test1-vlint-2024-11-12.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test1-vlint-2024-11-12.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test2-2024-11-12.log b/test2-2024-11-12.log new file mode 100644 index 0000000..4b853c3 --- /dev/null +++ b/test2-2024-11-12.log @@ -0,0 +1,20 @@ +regress/test2.fir:247424:17: error: use of unknown declaration 'validif' + tmp20070 <= validif(head(UInt<3>(6), 1), SInt<24>("b-11111101000010001010101")) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.8488 seconds + + ----Wall Time---- ----Name---- + 0.8472 ( 99.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.8054 ( 94.9%) Parse modules + 0.0016 ( 0.2%) Rest + 0.8488 (100.0%) Total + +{ + totalTime: 0.862, + maxMemory: 171630592 +} diff --git a/test2-vlint-2024-11-12.json b/test2-vlint-2024-11-12.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test2-vlint-2024-11-12.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test3-2024-11-12.log b/test3-2024-11-12.log new file mode 100644 index 0000000..34ae8df --- /dev/null +++ b/test3-2024-11-12.log @@ -0,0 +1,29 @@ +regress/test3.fir:20273:15: error: use of unknown declaration 'validif' + tmp236 <= validif(head(inp_h.inp_i.inp_k.inp_p.inp_gb.inp_pb.inp_nd[0][3][3].inp_ng.inp_li, 1), UInt<6>(33)) + ^ +regress/test3.fir:170544:16: error: use of unknown declaration 'validif' + tmp2807 <= validif(tail(UInt<29>("b111111100001000110000101110"), 28), SInt<4>("o-1")) + ^ +regress/test3.fir:324162:15: error: use of unknown declaration 'validif' + tmp523 <= validif(head(inp_e.inp_ob.inp_ge.inp_ki[1][2][3].inp_hk.inp_il, 1), inp_a.inp_c.inp_hc.inp_fd.inp_je.inp_dl) + ^ +regress/test3.fir:847311:15: error: use of unknown declaration 'validif' + tmp237 <= validif(tail(asUInt(inp_e.inp_i.inp_j.inp_bb[4][4].inp_oh), 18), tmp227) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.4023 seconds + + ----Wall Time---- ----Name---- + 0.4000 ( 99.4%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.3651 ( 90.8%) Parse modules + 0.0023 ( 0.6%) Rest + 0.4023 (100.0%) Total + +{ + totalTime: 0.412, + maxMemory: 139091968 +} diff --git a/test3-vlint-2024-11-12.json b/test3-vlint-2024-11-12.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test3-vlint-2024-11-12.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file