From 4fcf03c794f90ceab90f2fe2fadf9e257bf07425 Mon Sep 17 00:00:00 2001 From: drom Date: Fri, 15 Nov 2024 13:33:55 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20@=20circt/pe?= =?UTF-8?q?rf@7155120531cd12e76b8df51e09b3d90b512caa0e=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ...Medium1Large1Mega1.top.v.lo-2024-11-15.log | 99 +++++++++++++++++++ ...Large1Mega1.top.v.lo-vlint-2024-11-15.json | 49 +++++++++ test1-2024-11-15.log | 26 +++++ test1-vlint-2024-11-15.json | 4 + test2-2024-11-15.log | 20 ++++ test2-vlint-2024-11-15.json | 4 + test3-2024-11-15.log | 29 ++++++ test3-vlint-2024-11-15.json | 4 + 8 files changed, 235 insertions(+) create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-15.log create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-15.json create mode 100644 test1-2024-11-15.log create mode 100644 test1-vlint-2024-11-15.json create mode 100644 test2-2024-11-15.log create mode 100644 test2-vlint-2024-11-15.json create mode 100644 test3-2024-11-15.log create mode 100644 test3-vlint-2024-11-15.json diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-15.log b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-15.log new file mode 100644 index 0000000..af01d95 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-15.log @@ -0,0 +1,99 @@ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 16.2496 seconds + + ----User Time---- ----Wall Time---- ----Name---- + 2.5870 ( 7.1%) 2.5870 ( 15.9%) FIR Parser + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse OMIR + 2.1989 ( 6.0%) 2.1989 ( 13.5%) Parse modules + 0.3476 ( 1.0%) 0.3476 ( 2.1%) Verify circuit + 15.7439 ( 43.3%) 6.9105 ( 42.5%) 'firrtl.circuit' Pipeline + 0.3356 ( 0.9%) 0.3356 ( 2.1%) LowerFIRRTLAnnotations + 0.0930 ( 0.3%) 0.0930 ( 0.6%) LowerIntrinsics + 0.0929 ( 0.3%) 0.0929 ( 0.6%) (A) circt::firrtl::InstanceGraph + 2.8489 ( 7.8%) 0.7305 ( 4.5%) 'firrtl.module' Pipeline + 1.1932 ( 3.3%) 0.3129 ( 1.9%) DropName + 1.6527 ( 4.5%) 0.4167 ( 2.6%) CSE + 0.0008 ( 0.0%) 0.0002 ( 0.0%) (A) DominanceInfo + 0.0000 ( 0.0%) 0.0000 ( 0.0%) InjectDUTHierarchy + 0.1131 ( 0.3%) 0.0290 ( 0.2%) 'firrtl.module' Pipeline + 0.1099 ( 0.3%) 0.0279 ( 0.2%) LowerCHIRRTLPass + 0.0946 ( 0.3%) 0.0946 ( 0.6%) InferWidths + 0.2010 ( 0.6%) 0.2010 ( 1.2%) MemToRegOfVec + 0.3681 ( 1.0%) 0.3681 ( 2.3%) InferResets + 0.0502 ( 0.1%) 0.0502 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0662 ( 0.2%) 0.0662 ( 0.4%) WireDFT + 0.5233 ( 1.4%) 0.1344 ( 0.8%) 'firrtl.module' Pipeline + 0.5212 ( 1.4%) 0.1339 ( 0.8%) FlattenMemory + 0.2590 ( 0.7%) 0.2590 ( 1.6%) LowerFIRRTLTypes + 0.6770 ( 1.9%) 0.1743 ( 1.1%) 'firrtl.module' Pipeline + 0.6567 ( 1.8%) 0.1689 ( 1.0%) ExpandWhens + 0.0172 ( 0.0%) 0.0056 ( 0.0%) SFCCompat + 0.3177 ( 0.9%) 0.3177 ( 2.0%) Inliner + 0.5457 ( 1.5%) 0.1404 ( 0.9%) 'firrtl.module' Pipeline + 0.5438 ( 1.5%) 0.1401 ( 0.9%) RandomizeRegisterInit + 0.9566 ( 2.6%) 0.9566 ( 5.9%) CheckCombLoops + 0.0516 ( 0.1%) 0.0516 ( 0.3%) (A) circt::firrtl::InstanceGraph + 3.8027 ( 10.5%) 0.9717 ( 6.0%) 'firrtl.module' Pipeline + 3.5074 ( 9.6%) 0.9124 ( 5.6%) Canonicalizer + 0.2809 ( 0.8%) 0.0845 ( 0.5%) InferReadWrite + 0.1388 ( 0.4%) 0.1388 ( 0.9%) PrefixModules + 0.0527 ( 0.1%) 0.0527 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.6515 ( 1.8%) 0.6515 ( 4.0%) IMConstProp + 0.0522 ( 0.1%) 0.0522 ( 0.3%) AddSeqMemPorts + 0.0520 ( 0.1%) 0.0520 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.1594 ( 0.4%) 0.1594 ( 1.0%) CreateSiFiveMetadata + 0.0411 ( 0.1%) 0.0411 ( 0.3%) ExtractInstances + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.0000 ( 0.0%) 0.0000 ( 0.0%) GrandCentral + 0.0003 ( 0.0%) 0.0003 ( 0.0%) BlackBoxReader + 0.3227 ( 0.9%) 0.0824 ( 0.5%) 'firrtl.module' Pipeline + 0.3206 ( 0.9%) 0.0819 ( 0.5%) DropName + 0.3036 ( 0.8%) 0.3036 ( 1.9%) SymbolDCE + 0.2331 ( 0.6%) 0.2331 ( 1.4%) InnerSymbolDCE + 1.9526 ( 5.4%) 1.0908 ( 6.7%) 'firrtl.circuit' Pipeline + 0.8618 ( 2.4%) 0.2206 ( 1.4%) 'firrtl.module' Pipeline + 0.8599 ( 2.4%) 0.2202 ( 1.4%) Canonicalizer + 0.5056 ( 1.4%) 0.5056 ( 3.1%) IMDeadCodeElim + 0.0512 ( 0.1%) 0.0512 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0000 ( 0.0%) 0.0000 ( 0.0%) EmitOMIR + 0.0240 ( 0.1%) 0.0240 ( 0.1%) ResolveTraces + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.2500 ( 0.7%) 0.2500 ( 1.5%) LowerXMR + 0.0478 ( 0.1%) 0.0478 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.6791 ( 1.9%) 0.6791 ( 4.2%) LowerFIRRTLToHW + 0.0527 ( 0.1%) 0.0527 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 5.0523 ( 13.9%) 1.3734 ( 8.5%) 'hw.module' Pipeline + 0.9335 ( 2.6%) 0.2537 ( 1.6%) CSE + 0.0008 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 2.9354 ( 8.1%) 0.9455 ( 5.8%) Canonicalizer + 0.6083 ( 1.7%) 0.1732 ( 1.1%) CSE + 0.0007 ( 0.0%) 0.0002 ( 0.0%) (A) DominanceInfo + 0.5690 ( 1.6%) 0.2116 ( 1.3%) LowerSeqFIRRTLToSV + 0.1763 ( 0.5%) 0.1763 ( 1.1%) HWMemSimImpl + 3.3261 ( 9.1%) 0.9309 ( 5.7%) 'hw.module' Pipeline + 0.9156 ( 2.5%) 0.2606 ( 1.6%) CSE + 0.0012 ( 0.0%) 0.0004 ( 0.0%) (A) DominanceInfo + 1.6286 ( 4.5%) 0.5916 ( 3.6%) Canonicalizer + 0.5285 ( 1.5%) 0.1548 ( 1.0%) CSE + 0.0010 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.2460 ( 0.7%) 0.0755 ( 0.5%) HWCleanup + 0.5639 ( 1.6%) 0.1413 ( 0.9%) 'hw.module' Pipeline + 0.0570 ( 0.2%) 0.0159 ( 0.1%) HWLegalizeModules + 0.5020 ( 1.4%) 0.1276 ( 0.8%) PrettifyVerilog + 0.2138 ( 0.6%) 0.2138 ( 1.3%) StripDebugInfoWithPred + 1.6288 ( 4.5%) 1.6288 ( 10.0%) ExportVerilog + 1.9885 ( 5.5%) 0.5204 ( 3.2%) 'builtin.module' Pipeline + 1.4680 ( 4.0%) 0.3702 ( 2.3%) 'hw.module' Pipeline + 1.4649 ( 4.0%) 0.3695 ( 2.3%) PrepareForEmission + -0.5156 ( -1.4%) -0.5156 ( -3.2%) Rest + 36.3552 (100.0%) 16.2496 (100.0%) Total + +{ + totalTime: 16.294, + maxMemory: 876449792 +} diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-15.json b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-15.json new file mode 100644 index 0000000..7261973 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-15.json @@ -0,0 +1,49 @@ +{ + "errors": { + "'table_1_ext'": 1, + "This may be because there's no search path specified with -I.": 1, + "'table_0_ext'": 1, + "'hi_us_0_ext'": 1, + "'table_ext'": 1, + "'hi_us_ext'": 1, + "'meta_0_0_ext'": 1, + "'data_ext'": 1, + "'ebtb_ext'": 1, + "'btb_0_ext'": 1, + "'meta_0_ext'": 1, + "'rob_debug_inst_mem_1_ext'": 1, + "'meta_2_ext'": 1, + "'tag_array_5_ext'": 1, + "'rob_debug_inst_mem_0_ext'": 1, + "'ghist_0_0_ext'": 1, + "'meta_1_ext'": 1, + "'rob_debug_inst_mem_ext'": 1, + "'ghist_0_ext'": 1, + "'meta_ext'": 1, + "'dataArrayB0Way_0_ext'": 1, + "'tag_array_4_ext'": 1, + "'array_0_0_ext'": 1, + "'tag_array_3_ext'": 1, + "'data_arrays_0_2_ext'": 1, + "'tag_array_2_ext'": 1, + "'data_arrays_0_1_ext'": 1, + "'data_arrays_0_0_ext'": 1, + "'tag_array_0_ext'": 1, + "'tag_array_ext'": 1, + "'data_arrays_0_ext'": 1, + "'plusarg_reader'": 142, + "'l2_tlb_ram_1_ext'": 1, + "'l2_tlb_ram_0_ext'": 1, + "'tag_array_1_ext'": 1, + "'l2_tlb_ram_ext'": 1, + "'cc_banks_0_ext'": 1, + "'cc_dir_ext'": 1, + "'ClockDividerN'": 1, + "'EICG_wrapper'": 1, + "'GenericDigitalOutIOCell'": 9, + "'GenericDigitalInIOCell'": 13 + }, + "warnings": { + "WIDTH": 113 + } +} \ No newline at end of file diff --git a/test1-2024-11-15.log b/test1-2024-11-15.log new file mode 100644 index 0000000..68fe12b --- /dev/null +++ b/test1-2024-11-15.log @@ -0,0 +1,26 @@ +regress/test1.fir:7247:15: error: use of unknown declaration 'validif' + tmp499 <= validif(head(inp_a.inp_c.inp_j.inp_gc.inp_gkb.inp_flb.inp_fic, 1), SInt<13>("h-b9c")) + ^ +regress/test1.fir:28262:15: error: use of unknown declaration 'validif' + tmp550 <= validif(tail(asUInt(SInt<22>("h-3089")), 21), tmp548) + ^ +regress/test1.fir:51636:15: error: use of unknown declaration 'validif' + tmp541 <= validif(tail(inp_jc.inp_hd.inp_ae.inp_ei.inp_ahb.inp_mlc, 26), inp_a.inp_b.inp_d.inp_f.inp_g.inp_bb.inp_eb.inp_kd.inp_nk.inp_an.inp_gp.inp_mic) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.0780 seconds + + ----Wall Time---- ----Name---- + 0.0773 ( 99.1%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.0729 ( 93.4%) Parse modules + 0.0007 ( 0.9%) Rest + 0.0780 (100.0%) Total + +{ + totalTime: 0.086, + maxMemory: 0 +} diff --git a/test1-vlint-2024-11-15.json b/test1-vlint-2024-11-15.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test1-vlint-2024-11-15.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test2-2024-11-15.log b/test2-2024-11-15.log new file mode 100644 index 0000000..a3f55c8 --- /dev/null +++ b/test2-2024-11-15.log @@ -0,0 +1,20 @@ +regress/test2.fir:247424:17: error: use of unknown declaration 'validif' + tmp20070 <= validif(head(UInt<3>(6), 1), SInt<24>("b-11111101000010001010101")) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.8219 seconds + + ----Wall Time---- ----Name---- + 0.8202 ( 99.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.7775 ( 94.6%) Parse modules + 0.0016 ( 0.2%) Rest + 0.8219 (100.0%) Total + +{ + totalTime: 0.834, + maxMemory: 171724800 +} diff --git a/test2-vlint-2024-11-15.json b/test2-vlint-2024-11-15.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test2-vlint-2024-11-15.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test3-2024-11-15.log b/test3-2024-11-15.log new file mode 100644 index 0000000..97ccb98 --- /dev/null +++ b/test3-2024-11-15.log @@ -0,0 +1,29 @@ +regress/test3.fir:20273:15: error: use of unknown declaration 'validif' + tmp236 <= validif(head(inp_h.inp_i.inp_k.inp_p.inp_gb.inp_pb.inp_nd[0][3][3].inp_ng.inp_li, 1), UInt<6>(33)) + ^ +regress/test3.fir:170544:16: error: use of unknown declaration 'validif' + tmp2807 <= validif(tail(UInt<29>("b111111100001000110000101110"), 28), SInt<4>("o-1")) + ^ +regress/test3.fir:324162:15: error: use of unknown declaration 'validif' + tmp523 <= validif(head(inp_e.inp_ob.inp_ge.inp_ki[1][2][3].inp_hk.inp_il, 1), inp_a.inp_c.inp_hc.inp_fd.inp_je.inp_dl) + ^ +regress/test3.fir:847311:15: error: use of unknown declaration 'validif' + tmp237 <= validif(tail(asUInt(inp_e.inp_i.inp_j.inp_bb[4][4].inp_oh), 18), tmp227) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.4110 seconds + + ----Wall Time---- ----Name---- + 0.4086 ( 99.4%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.3737 ( 90.9%) Parse modules + 0.0023 ( 0.6%) Rest + 0.4110 (100.0%) Total + +{ + totalTime: 0.421, + maxMemory: 135749632 +} diff --git a/test3-vlint-2024-11-15.json b/test3-vlint-2024-11-15.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test3-vlint-2024-11-15.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file