From 61db2425b562010084dd842a4609c090f0807e22 Mon Sep 17 00:00:00 2001 From: drom Date: Thu, 14 Nov 2024 13:34:54 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20@=20circt/pe?= =?UTF-8?q?rf@7155120531cd12e76b8df51e09b3d90b512caa0e=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ...Medium1Large1Mega1.top.v.lo-2024-11-14.log | 99 +++++++++++++++++++ ...Large1Mega1.top.v.lo-vlint-2024-11-14.json | 49 +++++++++ test1-2024-11-14.log | 26 +++++ test1-vlint-2024-11-14.json | 4 + test2-2024-11-14.log | 20 ++++ test2-vlint-2024-11-14.json | 4 + test3-2024-11-14.log | 29 ++++++ test3-vlint-2024-11-14.json | 4 + 8 files changed, 235 insertions(+) create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-14.log create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-14.json create mode 100644 test1-2024-11-14.log create mode 100644 test1-vlint-2024-11-14.json create mode 100644 test2-2024-11-14.log create mode 100644 test2-vlint-2024-11-14.json create mode 100644 test3-2024-11-14.log create mode 100644 test3-vlint-2024-11-14.json diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-14.log b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-14.log new file mode 100644 index 0000000..40a36c8 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-11-14.log @@ -0,0 +1,99 @@ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 16.9967 seconds + + ----User Time---- ----Wall Time---- ----Name---- + 2.7321 ( 7.3%) 2.7321 ( 16.1%) FIR Parser + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse OMIR + 2.3384 ( 6.2%) 2.3384 ( 13.8%) Parse modules + 0.3511 ( 0.9%) 0.3511 ( 2.1%) Verify circuit + 15.7928 ( 42.2%) 7.1579 ( 42.1%) 'firrtl.circuit' Pipeline + 0.3425 ( 0.9%) 0.3425 ( 2.0%) LowerFIRRTLAnnotations + 0.0979 ( 0.3%) 0.0979 ( 0.6%) LowerIntrinsics + 0.0978 ( 0.3%) 0.0978 ( 0.6%) (A) circt::firrtl::InstanceGraph + 2.9593 ( 7.9%) 0.7585 ( 4.5%) 'firrtl.module' Pipeline + 1.2505 ( 3.3%) 0.3255 ( 1.9%) DropName + 1.7055 ( 4.6%) 0.4323 ( 2.5%) CSE + 0.0009 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.0000 ( 0.0%) 0.0000 ( 0.0%) InjectDUTHierarchy + 0.1327 ( 0.4%) 0.0337 ( 0.2%) 'firrtl.module' Pipeline + 0.1247 ( 0.3%) 0.0329 ( 0.2%) LowerCHIRRTLPass + 0.1008 ( 0.3%) 0.1008 ( 0.6%) InferWidths + 0.2558 ( 0.7%) 0.2558 ( 1.5%) MemToRegOfVec + 0.3888 ( 1.0%) 0.3888 ( 2.3%) InferResets + 0.0541 ( 0.1%) 0.0541 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0719 ( 0.2%) 0.0719 ( 0.4%) WireDFT + 0.5324 ( 1.4%) 0.1367 ( 0.8%) 'firrtl.module' Pipeline + 0.5303 ( 1.4%) 0.1361 ( 0.8%) FlattenMemory + 0.2628 ( 0.7%) 0.2628 ( 1.5%) LowerFIRRTLTypes + 0.6895 ( 1.8%) 0.1775 ( 1.0%) 'firrtl.module' Pipeline + 0.6673 ( 1.8%) 0.1723 ( 1.0%) ExpandWhens + 0.0183 ( 0.0%) 0.0057 ( 0.0%) SFCCompat + 0.3346 ( 0.9%) 0.3346 ( 2.0%) Inliner + 0.5648 ( 1.5%) 0.1459 ( 0.9%) 'firrtl.module' Pipeline + 0.5628 ( 1.5%) 0.1454 ( 0.9%) RandomizeRegisterInit + 0.9900 ( 2.6%) 0.9900 ( 5.8%) CheckCombLoops + 0.0507 ( 0.1%) 0.0507 ( 0.3%) (A) circt::firrtl::InstanceGraph + 3.4242 ( 9.1%) 0.8872 ( 5.2%) 'firrtl.module' Pipeline + 3.1230 ( 8.3%) 0.8214 ( 4.8%) Canonicalizer + 0.2977 ( 0.8%) 0.0794 ( 0.5%) InferReadWrite + 0.1512 ( 0.4%) 0.1512 ( 0.9%) PrefixModules + 0.0597 ( 0.2%) 0.0597 ( 0.4%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.6999 ( 1.9%) 0.6999 ( 4.1%) IMConstProp + 0.0629 ( 0.2%) 0.0629 ( 0.4%) AddSeqMemPorts + 0.0627 ( 0.2%) 0.0627 ( 0.4%) (A) circt::firrtl::InstanceGraph + 0.1666 ( 0.4%) 0.1666 ( 1.0%) CreateSiFiveMetadata + 0.0437 ( 0.1%) 0.0437 ( 0.3%) ExtractInstances + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.0001 ( 0.0%) 0.0001 ( 0.0%) GrandCentral + 0.0003 ( 0.0%) 0.0003 ( 0.0%) BlackBoxReader + 0.3320 ( 0.9%) 0.0849 ( 0.5%) 'firrtl.module' Pipeline + 0.3300 ( 0.9%) 0.0844 ( 0.5%) DropName + 0.3280 ( 0.9%) 0.3280 ( 1.9%) SymbolDCE + 0.2387 ( 0.6%) 0.2387 ( 1.4%) InnerSymbolDCE + 2.0336 ( 5.4%) 1.1501 ( 6.8%) 'firrtl.circuit' Pipeline + 0.8835 ( 2.4%) 0.2261 ( 1.3%) 'firrtl.module' Pipeline + 0.8815 ( 2.4%) 0.2258 ( 1.3%) Canonicalizer + 0.5429 ( 1.4%) 0.5429 ( 3.2%) IMDeadCodeElim + 0.0566 ( 0.2%) 0.0566 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0000 ( 0.0%) 0.0000 ( 0.0%) EmitOMIR + 0.0249 ( 0.1%) 0.0249 ( 0.1%) ResolveTraces + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.2649 ( 0.7%) 0.2649 ( 1.6%) LowerXMR + 0.0550 ( 0.1%) 0.0550 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.7052 ( 1.9%) 0.7052 ( 4.1%) LowerFIRRTLToHW + 0.0566 ( 0.2%) 0.0566 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 5.3322 ( 14.2%) 1.4892 ( 8.8%) 'hw.module' Pipeline + 0.9630 ( 2.6%) 0.2626 ( 1.5%) CSE + 0.0010 ( 0.0%) 0.0004 ( 0.0%) (A) DominanceInfo + 3.1011 ( 8.3%) 1.0386 ( 6.1%) Canonicalizer + 0.6450 ( 1.7%) 0.1819 ( 1.1%) CSE + 0.0008 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.6167 ( 1.6%) 0.2236 ( 1.3%) LowerSeqFIRRTLToSV + 0.1815 ( 0.5%) 0.1815 ( 1.1%) HWMemSimImpl + 3.5048 ( 9.4%) 1.0149 ( 6.0%) 'hw.module' Pipeline + 0.9539 ( 2.5%) 0.2744 ( 1.6%) CSE + 0.0011 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 1.7404 ( 4.6%) 0.6200 ( 3.6%) Canonicalizer + 0.5391 ( 1.4%) 0.1733 ( 1.0%) CSE + 0.0010 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.2640 ( 0.7%) 0.0785 ( 0.5%) HWCleanup + 0.5812 ( 1.6%) 0.1457 ( 0.9%) 'hw.module' Pipeline + 0.0610 ( 0.2%) 0.0162 ( 0.1%) HWLegalizeModules + 0.5153 ( 1.4%) 0.1308 ( 0.8%) PrettifyVerilog + 0.2179 ( 0.6%) 0.2179 ( 1.3%) StripDebugInfoWithPred + 1.6717 ( 4.5%) 1.6717 ( 9.8%) ExportVerilog + 2.0702 ( 5.5%) 0.5389 ( 3.2%) 'builtin.module' Pipeline + 1.5313 ( 4.1%) 0.3865 ( 2.3%) 'hw.module' Pipeline + 1.5289 ( 4.1%) 0.3859 ( 2.3%) PrepareForEmission + -0.5339 ( -1.4%) -0.5339 ( -3.1%) Rest + 37.4646 (100.0%) 16.9967 (100.0%) Total + +{ + totalTime: 17.039, + maxMemory: 875130880 +} diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-14.json b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-14.json new file mode 100644 index 0000000..7261973 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-11-14.json @@ -0,0 +1,49 @@ +{ + "errors": { + "'table_1_ext'": 1, + "This may be because there's no search path specified with -I.": 1, + "'table_0_ext'": 1, + "'hi_us_0_ext'": 1, + "'table_ext'": 1, + "'hi_us_ext'": 1, + "'meta_0_0_ext'": 1, + "'data_ext'": 1, + "'ebtb_ext'": 1, + "'btb_0_ext'": 1, + "'meta_0_ext'": 1, + "'rob_debug_inst_mem_1_ext'": 1, + "'meta_2_ext'": 1, + "'tag_array_5_ext'": 1, + "'rob_debug_inst_mem_0_ext'": 1, + "'ghist_0_0_ext'": 1, + "'meta_1_ext'": 1, + "'rob_debug_inst_mem_ext'": 1, + "'ghist_0_ext'": 1, + "'meta_ext'": 1, + "'dataArrayB0Way_0_ext'": 1, + "'tag_array_4_ext'": 1, + "'array_0_0_ext'": 1, + "'tag_array_3_ext'": 1, + "'data_arrays_0_2_ext'": 1, + "'tag_array_2_ext'": 1, + "'data_arrays_0_1_ext'": 1, + "'data_arrays_0_0_ext'": 1, + "'tag_array_0_ext'": 1, + "'tag_array_ext'": 1, + "'data_arrays_0_ext'": 1, + "'plusarg_reader'": 142, + "'l2_tlb_ram_1_ext'": 1, + "'l2_tlb_ram_0_ext'": 1, + "'tag_array_1_ext'": 1, + "'l2_tlb_ram_ext'": 1, + "'cc_banks_0_ext'": 1, + "'cc_dir_ext'": 1, + "'ClockDividerN'": 1, + "'EICG_wrapper'": 1, + "'GenericDigitalOutIOCell'": 9, + "'GenericDigitalInIOCell'": 13 + }, + "warnings": { + "WIDTH": 113 + } +} \ No newline at end of file diff --git a/test1-2024-11-14.log b/test1-2024-11-14.log new file mode 100644 index 0000000..31249bf --- /dev/null +++ b/test1-2024-11-14.log @@ -0,0 +1,26 @@ +regress/test1.fir:7247:15: error: use of unknown declaration 'validif' + tmp499 <= validif(head(inp_a.inp_c.inp_j.inp_gc.inp_gkb.inp_flb.inp_fic, 1), SInt<13>("h-b9c")) + ^ +regress/test1.fir:28262:15: error: use of unknown declaration 'validif' + tmp550 <= validif(tail(asUInt(SInt<22>("h-3089")), 21), tmp548) + ^ +regress/test1.fir:51636:15: error: use of unknown declaration 'validif' + tmp541 <= validif(tail(inp_jc.inp_hd.inp_ae.inp_ei.inp_ahb.inp_mlc, 26), inp_a.inp_b.inp_d.inp_f.inp_g.inp_bb.inp_eb.inp_kd.inp_nk.inp_an.inp_gp.inp_mic) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.0704 seconds + + ----Wall Time---- ----Name---- + 0.0695 ( 98.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.0649 ( 92.3%) Parse modules + 0.0008 ( 1.2%) Rest + 0.0704 (100.0%) Total + +{ + totalTime: 0.078, + maxMemory: 0 +} diff --git a/test1-vlint-2024-11-14.json b/test1-vlint-2024-11-14.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test1-vlint-2024-11-14.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test2-2024-11-14.log b/test2-2024-11-14.log new file mode 100644 index 0000000..90fe132 --- /dev/null +++ b/test2-2024-11-14.log @@ -0,0 +1,20 @@ +regress/test2.fir:247424:17: error: use of unknown declaration 'validif' + tmp20070 <= validif(head(UInt<3>(6), 1), SInt<24>("b-11111101000010001010101")) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.9179 seconds + + ----Wall Time---- ----Name---- + 0.9162 ( 99.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.8686 ( 94.6%) Parse modules + 0.0017 ( 0.2%) Rest + 0.9179 (100.0%) Total + +{ + totalTime: 0.931, + maxMemory: 164376576 +} diff --git a/test2-vlint-2024-11-14.json b/test2-vlint-2024-11-14.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test2-vlint-2024-11-14.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test3-2024-11-14.log b/test3-2024-11-14.log new file mode 100644 index 0000000..1361d3d --- /dev/null +++ b/test3-2024-11-14.log @@ -0,0 +1,29 @@ +regress/test3.fir:20273:15: error: use of unknown declaration 'validif' + tmp236 <= validif(head(inp_h.inp_i.inp_k.inp_p.inp_gb.inp_pb.inp_nd[0][3][3].inp_ng.inp_li, 1), UInt<6>(33)) + ^ +regress/test3.fir:170544:16: error: use of unknown declaration 'validif' + tmp2807 <= validif(tail(UInt<29>("b111111100001000110000101110"), 28), SInt<4>("o-1")) + ^ +regress/test3.fir:324162:15: error: use of unknown declaration 'validif' + tmp523 <= validif(head(inp_e.inp_ob.inp_ge.inp_ki[1][2][3].inp_hk.inp_il, 1), inp_a.inp_c.inp_hc.inp_fd.inp_je.inp_dl) + ^ +regress/test3.fir:847311:15: error: use of unknown declaration 'validif' + tmp237 <= validif(tail(asUInt(inp_e.inp_i.inp_j.inp_bb[4][4].inp_oh), 18), tmp227) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.4365 seconds + + ----Wall Time---- ----Name---- + 0.4340 ( 99.4%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.3977 ( 91.1%) Parse modules + 0.0024 ( 0.6%) Rest + 0.4365 (100.0%) Total + +{ + totalTime: 0.447, + maxMemory: 125886464 +} diff --git a/test3-vlint-2024-11-14.json b/test3-vlint-2024-11-14.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test3-vlint-2024-11-14.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file