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ipq8064: mtd: spi-nor: micron-st: Add n25q064a WP support
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These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
OnHub devices are write-protected by default (same as any other
ChromeOS/Chromebook system).

TODO: send upstream.

Signed-off-by: Brian Norris <[email protected]>
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computersforpeace committed Jul 25, 2024
1 parent bbcd511 commit fc3dbb6
Showing 1 changed file with 25 additions and 0 deletions.
25 changes: 25 additions & 0 deletions target/linux/ipq806x/patches-6.6/901-mtd-spi-nor-n25q064a-wp.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
From 1e019e728800d4033b4b3b1b5570f5da5ed309f2 Mon Sep 17 00:00:00 2001
From: Brian Norris <[email protected]>
Date: Thu, 15 Dec 2022 01:49:20 -0800
Subject: [PATCH] mtd: spi-nor: micron-st: Add n25q064a WP support

These flash chips are used on Google / TP-Link / ASUS OnHub devices, and
OnHub devices are write-protected by default (same as any other
ChromeOS/Chromebook system).

Signed-off-by: Brian Norris <[email protected]>
---
drivers/mtd/spi-nor/micron-st.c | 2 ++
1 file changed, 2 insertions(+)

--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -183,6 +183,8 @@ static const struct flash_info st_nor_pa
{ "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128)
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) },
{ "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128)
+ FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+ SPI_NOR_BP3_SR_BIT6)
NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ) },
{ "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256)
FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |

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