diff --git a/coverage/rvi_smclic.cgf b/coverage/rvi_smclic.cgf
new file mode 100644
index 000000000..19d397e09
--- /dev/null
+++ b/coverage/rvi_smclic.cgf
@@ -0,0 +1,54 @@
+clicdirect-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+cliclevel-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+cliclevel-02:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+cliclevel-03:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+cliclevel-04:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+clicnomint-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+clicnomint-02:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+clicnomint-03:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+clicwfi-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Smclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
diff --git a/coverage/rvi_ssclic.cgf b/coverage/rvi_ssclic.cgf
new file mode 100644
index 000000000..214f65747
--- /dev/null
+++ b/coverage/rvi_ssclic.cgf
@@ -0,0 +1,96 @@
+sclicdeleg-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicmdisable-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+sclicmdisable-02:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+sclicmdisable-03:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+sclicnodeleg-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicorder-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicorder-02:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicorder-03:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicorder-04:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicprivorder-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicprivorder-02:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicprivorder-03:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+
+sclicsdisable-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+sclicsdisable-02:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+sclicsdisable-03:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 0: 0
+
+sclicwfi-01:
+  config:
+    - check ISA:=regex(.*I.*Zicsr.*Ssclic.*); def rvtest_mtrap_routine=True
+  csr_comb:
+    mcause >> (xlen-1) == 1: 0
+