-
Notifications
You must be signed in to change notification settings - Fork 3
/
emuc128.cs
788 lines (716 loc) · 32.2 KB
/
emuc128.cs
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
// emuc128.cs - Class EmuC128 - Commodore 128 Emulator
//
////////////////////////////////////////////////////////////////////////////////
//
// simple-emu-c64
// C64/6502 Emulator for Microsoft Windows Console
//
// MIT License
//
// Copyright (c) 2020-2023 by David R. Van Wagner
// davevw.com
//
// Permission is hereby granted, free of charge, to any person obtaining a copy
// of this software and associated documentation files (the "Software"), to deal
// in the Software without restriction, including without limitation the rights
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
// copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
// The above copyright notice and this permission notice shall be included in all
// copies or substantial portions of the Software.
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.
//
////////////////////////////////////////////////////////////////////////////////
//
// This is a 6502 Emulator, designed for running Commodore 128 text mode,
// with only a few hooks: CHRIN/CHROUT/COLOR-$D021/241/243/READY/GETIN/STOP
// and RAM/ROM/IO banking from 6510, and C128 MMU
// READY hook is used to load program specified on command line
//
// LIMITATIONS:
// Only keyboard/console I/O. No text pokes, no graphics. Just stdio.
// No key scan codes (197), or keyboard buffer (198, 631-640), but INPUT S$ works
// No keyboard color switching. No border displayed. No border color.
// No screen editing (gasp!) Just short and sweet for running C128 BASIC in
// terminal/console window via 8502 (6502) chip emulation in software
// No PETSCII graphic characters, only supports printables CHR$(32) to CHR$(126),
// and CHR$(147) clear screen, home/up/down/left/right, reverse on/off
// No timers. No interrupts except BRK. No NMI/RESTORE key. ESC is STOP key.
// but TI$/TI are simulated.
//
// $00 On chip (8502) data direction register missing in this emulation
// $01 On chip (8502) I/O register minimally implemented
//
// $0002-$3FFF RAM (BANK 0 or BANK 1)
//
// $4000-$7FFF BASIC ROM LO
// $4000-$7FFF Banked RAM (BANK 0 or BANK 1)
//
// $8000-$BFFF BASIC ROM HI
// $8000-$BFFF Banked RAM (BANK 0 or BANK 1)
//
// $C000-$FFFF Banked KERNAL/CHAR(DXXX) ROM
// $C000-$FFFF Banked RAM (BANK 0 or BANK 1)
//
// $D000-$D7FF I/O minimally implemented, reads as zeros
// $D800-$DFFF VIC-II color RAM nybbles in I/O space (1K x 4bits)
// $D000-$DFFF Banked Character ROM
// $D000-$DFFF Banked RAM (BANK 0 or BANK 1)
//
// Requires user provided Commodore 128 BASIC/KERNAL ROMs (e.g. from VICE)
// as they are not provided, others copyrights may still be in effect.
//
////////////////////////////////////////////////////////////////////////////////
using System;
using System.IO;
using System.Text;
namespace simple_emu_c64
{
public class EmuC128 : EmuCBM
{
public EmuC128(string basic_lo_file, string basic_hi_file, string chargen_file, string kernal_file) : base(new C128Memory(basic_lo_file, basic_hi_file, chargen_file, kernal_file))
{
}
private int startup_state = 0;
//private int go_state = 0;
private bool esc_mode = false;
protected override bool ExecutePatch()
{
if (PC == 0xFFD2)
{
if (A == 27)
esc_mode = !esc_mode;
else if (esc_mode)
{
esc_mode = false;
return false; // suppress output to Console
}
return base.ExecutePatch();
}
if (memory[PC] == 0x6C && memory[(ushort)(PC + 1)] == 0x30 && memory[(ushort)(PC + 2)] == 0x03) // catch JMP(LOAD_VECTOR), redirect to jump table
{
int addr128k = 0x330;
if (IsRam(ref addr128k) && addr128k == 0x330)
{
CheckBypassSETLFS();
CheckBypassSETNAM();
// note: A register has same purpose LOAD/VERIFY
X = memory[0xC3];
Y = memory[0xC4];
PC = 0xFFD5; // use KERNAL JUMP TABLE instead, so LOAD is hooked by base
return true; // re-execute
}
}
if (memory[PC] == 0x6C && memory[(ushort)(PC + 1)] == 0x32 && memory[(ushort)(PC + 2)] == 0x03) // catch JMP(SAVE_VECTOR), redirect to jump table
{
int addr128k = 0x332;
if (IsRam(ref addr128k) && addr128k == 0x332)
{
CheckBypassSETLFS();
CheckBypassSETNAM();
X = memory[0xAE];
Y = memory[0xAF];
A = 0xC1;
PC = 0xFFD8; // use KERNAL JUMP TABLE instead, so SAVE is hooked by base
return true; // re-execute
}
}
// Note: BANK # (0-15) for file i/o is in $C6
// Note: BANK # (0-15) for filename is in $C7
// Note: BANK # to MMU CR translation table in Kernal at $F7F0
if (PC == 0xFFBD && IsKernal(PC)) // SETNAM
{
// set to name BANK (reference $FF68 JSETBNK)
var save_mcr = memory[0xFF00];
memory[0xFF00] = 0; // switch in KERNAL where mcr table is located
memory[0xFF00]= memory[(ushort)(0xF7F0 + memory[0xC7])]; // switch to name bank
var result = base.ExecutePatch(); // DELEGATE TO emucbm
memory[0xFF00] = save_mcr; // restore MCR
return result;
}
else if ((PC == 0xFFD5 || PC == 0xFFD8) && IsKernal(PC)) // LOAD OR SAVE
{
// set to data i/o BANK
var save_mcr = memory[0xFF00];
memory[0xFF00] = 0; // switch in KERNAL where mcr table is located
memory[0xFF00] = memory[(ushort)(0xF7F0 + memory[0xC6])]; // switch to i/o bank
var result = base.ExecutePatch(); // DELEGATE TO emucbm
memory[0xFF00] = save_mcr; // restore MCR
return result;
}
else if ((PC == 0x4D37 || PC == LOAD_TRAP) && (IsBasicLow(PC) || IsBasicHigh(PC))) // READY
{
//go_state = 0;
if (startup_state == 0 && (StartupPRG != null || PC == LOAD_TRAP))
{
bool is_basic;
if (PC == LOAD_TRAP)
{
is_basic = (
FileVerify == false
&& FileSec == 0 // relative load, not absolute
&& LO(FileAddr) == memory[45] // requested load address matches BASIC start
&& HI(FileAddr) == memory[46]);
if (FileLoad(out byte err))
{
memory[0xAE] = (byte)FileAddr;
memory[0xAF] = (byte)(FileAddr >> 8);
}
else
{
System.Diagnostics.Debug.WriteLine(string.Format("FileLoad() failed: err={0}, file {1}", err, StartupPRG));
C = true; // signal error
SetA(err); // FILE NOT FOUND or VERIFY
// so doesn't repeat
StartupPRG = null;
LOAD_TRAP = -1;
return true; // overriden, and PC changed, so caller should reloop before execution to allow breakpoint/trace/ExecutePatch/etc.
}
}
else
{
FileName = StartupPRG;
FileAddr = (ushort)(memory[45] | (memory[46] << 8));
is_basic = LoadStartupPrg();
//memory[0xAE] = (byte)FileAddr;
//memory[0xAF] = (byte)(FileAddr >> 8);
}
StartupPRG = null;
if (is_basic)
{
// initialize first couple bytes (may only be necessary for UNNEW?)
ushort addr = (ushort)(memory[45] | (memory[46] << 8));
memory[addr] = 1;
memory[(ushort)(addr + 1)] = 1;
startup_state = 1; // should be able to regain control when returns...
return ExecuteJSR(0xAF87); // LINKPRG
}
else
{
LOAD_TRAP = -1;
X = LO(FileAddr);
Y = HI(FileAddr);
C = false;
}
}
else if (startup_state == 1)
{
ushort addr = (ushort)(memory[0x24] | (memory[0x25] << 8) + 2);
memory[47] = (byte)addr;
memory[48] = (byte)(addr >> 8);
SetA(0);
startup_state = 2; // should be able to regain control when returns...
return ExecuteJSR(0x51F8); // CLEAR/CLR
}
else if (startup_state == 2)
{
if (PC == LOAD_TRAP)
{
X = LO(FileAddr);
Y = HI(FileAddr);
}
else
{
CBM_Console.Push("RUN\r");
PC = 0xA47B; // skip READY message, but still set direct mode, and continue to MAIN
}
C = false; // signal success
startup_state = 0;
LOAD_TRAP = -1;
return true; // overriden, and PC changed, so caller should reloop before execution to allow breakpoint/trace/ExecutePatch/etc.
}
}
else if (PC == 0x05A4A) // GO next token is not TO, used to catch 2001 as ASCII
{
ushort addr = (ushort)(memory[0x3D] | (memory[0x3E] << 8)); // pointer to current token in buffer
var s = new StringBuilder();
while (s.Length < 80) // some limit
{
char c = (char)memory[addr++];
if (c >= '0' && c <= '9')
s.Append(c);
else if (c == 0 || s.Length > 0)
break;
}
ushort go_num;
if (ushort.TryParse(s.ToString(), out go_num) && go_num == 2001)
{
Program.go_num = go_num;
exit = true;
return true;
}
}
else if (PC == 0x05A4D) // GO value expression evaluated to byte stored in .X, catch other byte values that are not 64
{
if (X != 64)
{
Program.go_num = X;
exit = true;
return true;
}
}
//else if (PC == 0xC815) // Execute after GO
//{
// if (go_state == 0 && A >= (byte)'0' && A <= (byte)'9')
// {
// go_state = 1;
// return ExecuteJSR(0xCD8A); // Evaluate expression, check data type
// }
// else if (go_state == 1)
// {
// go_state = 2;
// return ExecuteJSR(0xD7F7); // Convert fp to 2 byte integer
// }
// else if (go_state == 2)
// {
// Program.go_num = (ushort)(Y + (A << 8));
// exit = true;
// return true;
// }
//}
if (Program.go_num == 64)
{
exit = true;
return true;
}
return base.ExecutePatch();
}
public bool IsBasicLow(ushort addr)
=> ((C128Memory)memory).IsBasicLow(addr);
public bool IsBasicHigh(ushort addr)
=> ((C128Memory)memory).IsBasicHigh(addr);
public bool IsKernal(ushort addr)
=> ((C128Memory)memory).IsKernal(addr);
public bool IsRam(ref int addr)
=> ((C128Memory)memory).IsRam(ref addr);
private void CheckBypassSETNAM()
{
var save_mcr = memory[0xFF00];
memory[0xFF00] = 0; // switch in KERNAL where mcr table is located
// In case caller bypassed calling SETNAM, get from lower memory
byte name_len = memory[0xB7];
ushort name_addr = (ushort)(memory[0xBB] | (memory[0xBC] << 8));
StringBuilder name = new StringBuilder();
memory[0xFF00] = memory[(ushort)(0xF7F0 + memory[0xC7])]; // switch to name bank
for (byte i = 0; i < name_len; ++i)
name.Append((char)memory[(ushort)(name_addr + i)]);
memory[0xFF00] = save_mcr; // restore MCR
if (FileName != name.ToString())
{
System.Diagnostics.Debug.WriteLine(string.Format("bypassed SETNAM {0}", name.ToString()));
FileName = name.ToString();
}
}
private void CheckBypassSETLFS()
{
// In case caller bypassed calling SETLFS, get from lower memory
if (
FileNum != memory[0xB8]
|| FileDev != memory[0xBA]
|| FileSec != memory[0xB9]
)
{
FileNum = memory[0xB8];
FileDev = memory[0xBA];
FileSec = memory[0xB9];
System.Diagnostics.Debug.WriteLine(string.Format("bypassed SETLFS {0},{1},{2}", FileNum, FileDev, FileSec));
}
}
///////////////////////////////////////////////////////////////////////
class C128Memory : Emu6502.Memory
{
byte[] ram; // 128K, banked
byte[] basic_rom_lo;
byte[] basic_rom_hi;
byte[] chargen_rom;
byte[] kernal_rom;
byte[] io;
VDC8563 vdc = new VDC8563();
// note ram starts at 0x0000
const int basic_lo_addr = 0x4000;
const int basic_lo_size = 0x4000;
const int basic_hi_addr = 0x8000;
const int basic_hi_size = 0x4000;
const int kernal_addr = 0xC000;
const int io_addr = 0xD000;
const int io_size = 0x1000;
const int color_addr = 0xD800;
const int color_size = 0x0400;
const int mmu_addr = 0xD500;
const int mmu_size = 0xC;
const int chargen_addr = io_addr;
const int chargen_size = io_size;
public void ApplyColor()
{
CBM_Console.Reverse = (this[243] != 0);
if (CBM_Console.Color)
{
if (CBM_Console.Reverse && CBM_Console.Encoding != CBM_Console.CBMEncoding.petscii)
{
Console.BackgroundColor = ToConsoleColor(this[241]);
Console.ForegroundColor = ToConsoleColor(this[0xD021]);
}
else
{
Console.ForegroundColor = ToConsoleColor(this[241]);
Console.BackgroundColor = ToConsoleColor(this[0xD021]);
}
}
else
{
if (CBM_Console.Reverse && CBM_Console.Encoding != CBM_Console.CBMEncoding.petscii)
{
Console.BackgroundColor = startup_fg;
Console.ForegroundColor = startup_bg;
}
else
{
Console.ForegroundColor = startup_fg;
Console.BackgroundColor = startup_bg;
}
}
}
private ConsoleColor ToConsoleColor(byte CommodoreColor)
{
switch (CommodoreColor & 0xF)
{
case 0: return ConsoleColor.Black;
case 1: return ConsoleColor.White;
case 2: return ConsoleColor.Red;
case 3: return ConsoleColor.Cyan;
case 4: return ConsoleColor.DarkMagenta;
case 5: return ConsoleColor.DarkGreen;
case 6: return ConsoleColor.DarkBlue;
case 7: return ConsoleColor.Yellow;
case 8: return ConsoleColor.DarkYellow;
case 9: return ConsoleColor.DarkRed;
case 10: return ConsoleColor.Magenta;
case 11: return ConsoleColor.DarkCyan;
case 12: return ConsoleColor.DarkGray;
case 13: return ConsoleColor.Green;
case 14: return ConsoleColor.Blue;
case 15: return ConsoleColor.Gray;
default: throw new InvalidOperationException("Missing case number in ToConsoleColor");
}
}
private void CheckLowercase()
{
CBM_Console.Lowercase = ((ram[0xD7] & 0x80) == 0) && ((ram[0xA2C] & 2) != 0)
|| ((ram[0xD7] & 0x80) != 0) && ((ram[0xF1] & 0x80) != 0);
}
public C128Memory(string basic_lo_file, string basic_hi_file, string chargen_file, string kernal_file)
{
ram = new byte[128 * 1024];
basic_rom_lo = File.ReadAllBytes(basic_lo_file);
basic_rom_hi = File.ReadAllBytes(basic_hi_file);
kernal_rom = File.ReadAllBytes(kernal_file);
chargen_rom = File.ReadAllBytes(chargen_file);
for (int i = 0; i < ram.Length; ++i)
ram[i] = 0;
io = new byte[io_size];
for (int i = 0; i < io.Length; ++i)
io[i] = 0x0;
io[mmu_addr - io_addr] = 0; // default MMU CR
io[0xD505 - io_addr] = 0xB9; // 40/80 up, no /GAME, no /EXROM, C128 mode, Fast serial out, 8502 select
io[0xD506 - io_addr] = 0; // no common RAM at startup
io[0xD507 - io_addr] = 0; // zero page default
io[0xD508 - io_addr] = 0; // zero page bank
io[0xD509 - io_addr] = 1; // stack page default
io[0xD50A - io_addr] = 0; // stack page bank
io[0xD50B - io_addr] = 0x20; // MMU verison register value 128K, verison 0
io[0xDC00 - io_addr] = 0xFF; // CIA #1 PORT A
io[0xDC01 - io_addr] = 0xFF; // CIA #1 PORT B
io[0xDD00 - io_addr] = 0xFF; // CIA #2 PORT A including SERIAL CLK/DATA INPUT pulled HIGH, no devices present
io[0xDD01 - io_addr] = 0xFF; // CIA #2 PORT B
}
public byte this[ushort addr]
{
get
{
int addr128k = addr;
if (addr >= 0xFF00 && addr <= 0xFF04)
return io[mmu_addr + (addr & 0xF) - io_addr];
else if (IsRam(ref addr128k))
return ram[addr128k];
else if (IsIO(addr))
{
if (IsColor(addr))
return (byte)((io[addr - io_addr] & 0xF) | 0xF0);
else if (addr == 0xD011)
io[addr - io_addr] ^= 0x80; // toggle 9th raster line bit, so seems like raster is moving
else if (addr == 0xD600)
return vdc.AddressRegister;
else if (addr == 0xD601)
return vdc.DataRegister;
return io[addr - io_addr];
}
else if (IsBasicLow(addr))
return basic_rom_lo[addr - basic_lo_addr];
else if (IsBasicHigh(addr))
return basic_rom_hi[addr - basic_hi_addr];
else if (IsChargen(addr))
return chargen_rom[addr - chargen_addr];
else if (IsKernal(addr))
return kernal_rom[addr - kernal_addr];
else
return 0xFF;
}
set
{
if (addr == 0xFF00) // CR mirror
io[mmu_addr - io_addr] = value; // CR
else if (addr == 0xFF01) // LCRA
io[mmu_addr - io_addr] = io[mmu_addr - io_addr + 1];
else if (addr == 0xFF02) // LCRA
io[mmu_addr - io_addr] = io[mmu_addr - io_addr + 2];
else if (addr == 0xFF03) // LCRA
io[mmu_addr - io_addr] = io[mmu_addr - io_addr + 3];
else if (addr == 0xFF04) // LCRA
io[mmu_addr - io_addr] = io[mmu_addr - io_addr + 4];
else if (IsIO(addr))
{
if (addr == 0xD021) // background
{
io[addr - io_addr] = (byte)((value & 0xF) | 0xF0); // store value so can be retrieved
ApplyColor();
}
else if (addr == 0xD505)
{
System.Diagnostics.Debug.WriteLine($"Mode Configuration Register set 0x{value:X02}");
if ((value & 0x40) != 0)
Program.go_num = 64;
}
else if (addr >= mmu_addr && addr < mmu_addr + mmu_size - 1) // MMU up to but not including version register
io[addr - io_addr] = value;
else if (addr == 0xD600)
vdc.AddressRegister = value;
else if (addr == 0xD601)
vdc.DataRegister = value;
// but do not set other I/O values
}
else
{
int addr128k = addr;
if (IsRam(ref addr128k, isWrite: true))
{
ram[addr128k] = value;
if (addr128k == 241 || addr128k == 243)
ApplyColor();
else if (addr128k == 0xA2C || addr128k == 0xF1)
CheckLowercase();
else if (addr128k == 244)
CBM_Console.QuoteMode = (value != 0);
else if (addr128k == 245)
CBM_Console.InsertMode = (value != 0);
}
}
}
}
private bool IsChargen(ushort addr)
{
byte mmu_cr = io[mmu_addr - io_addr];
return (addr >= chargen_addr && addr < chargen_addr + chargen_size && (mmu_cr & 0x30) == 0);
}
public bool IsKernal(ushort addr)
{
byte mmu_cr = io[mmu_addr - io_addr];
return (addr >= kernal_addr && !(addr >= chargen_addr && addr < chargen_addr + chargen_size) && (mmu_cr & 0x30) == 0);
}
public bool IsBasicHigh(ushort addr)
{
byte mmu_cr = io[mmu_addr - io_addr];
return (addr >= basic_hi_addr && addr < basic_hi_addr + basic_hi_size && (mmu_cr & 0x0C) == 0);
}
public bool IsBasicLow(ushort addr)
{
byte mmu_cr = io[mmu_addr - io_addr];
return (addr >= basic_lo_addr && addr < basic_lo_addr + basic_lo_size && (mmu_cr & 0x02) == 0);
}
public bool IsColor(ushort addr)
{
return IsIO(addr) && addr >= color_addr && addr < color_addr + color_size;
}
public bool IsIO(ushort addr)
{
byte mmu_cr = io[mmu_addr - io_addr];
return (addr >= io_addr && addr < io_addr + io_size && (mmu_cr & 0x01) == 0);
}
public bool IsRam(ref int addr, bool isWrite = false)
{
byte mmu_cr = io[mmu_addr - io_addr]; // MMU configuration register
byte ram_cr = io[0xD506 - io_addr]; // RAM configuration register
int page0_addr = (io[0xD507 - io_addr] | (io[0xD508 - io_addr] << 8)) << 8;
int page1_addr = (io[0xD509 - io_addr] | (io[0xD50A - io_addr] << 8)) << 8;
// note: ignore (mmu_cr & 0x80) != 0 because expansion RAM not implemented in hardware
if (addr >= kernal_addr && (mmu_cr & 0x30) != 0x30 && !isWrite)
return false;
if (addr >= basic_hi_addr && addr < basic_hi_addr + basic_hi_size && (mmu_cr & 0x0C) != 0x0C && !isWrite)
return false;
if (addr >= basic_lo_addr && addr < basic_lo_addr + basic_lo_size && (mmu_cr & 0x02) != 0x02 && !isWrite)
return false;
if (addr >= io_addr && addr < io_addr + io_size && (mmu_cr & 0x01) != 0x01)
return false;
// bank 1
if ((mmu_cr & 0x40) != 0)
addr |= 0x10000;
// remap/swap zero page and stack
if (addr >= page0_addr && addr < page0_addr + 0x100)
{
addr = (addr & 0xFF) | (page0_addr & 0x10000);
}
else if (addr >= page1_addr && addr < page1_addr + 0x100)
{
addr = (addr & 0xFF) | 0x100 | (page1_addr & 0x10000);
}
else if ((ushort)addr < 0x100)
{
addr |= page0_addr;
}
else if ((ushort)addr >= 0x100 && (ushort)addr < 0x200)
{
addr = (addr & 0xFF) | page1_addr;
}
var hasCommonRam = ((ram_cr & 0x0C) != 0);
if (hasCommonRam && addr >= 0x10000)
{
int size;
switch (ram_cr & 3)
{
case 0: size = 1024; break;
case 1: size = 4096; break;
case 2: size = 8192; break;
case 3: size = 16384; break;
default: throw new Exception("shouldn't happen");
}
var isBottomShared = ((ram_cr & 4) != 0);
var isTopShared = ((ram_cr & 8) != 0);
if (isBottomShared && (ushort)addr < size)
addr = (ushort)addr; // common RAM is in BANK 0
else if (isTopShared && (ushort)addr + size >= 0x10000)
addr = (ushort)addr; // common RAM is in BANK 0
}
return true;
}
}
///////////////////////////////////////////////////////////////////////
class VDC8563
{
byte[] registers;
byte[] ram;
int register;
byte data;
bool ready = false;
public VDC8563()
{
registers = new byte[]
{
126, 80, 102, 73, 32, 224, 25, 29,
252, 231, 160, 231, 0, 0, 0, 0,
0, 0, 15, 228, 8, 0, 120, 232,
32, 71, 240, 0, 63, 21, 79, 0,
0, 0, 125, 100, 245, 63
};
ram = new byte[64 * 1024];
for (int i = 0; i < ram.Length; ++i)
ram[i] = 0;
}
public byte AddressRegister
{
get
{
if (ready)
{
return 128;
}
else
{
ready = true; // simulate delay in processing
return 0;
}
}
set
{
register = value & 0x3F;
if (register < registers.Length)
data = registers[register];
else
data = 0xFF;
ready = false; // simulate delay in processing
}
}
public byte DataRegister
{
get
{
if (ready)
return data;
else
{
ready = true;
return 0xFF;
}
}
set
{
ready = false; // simulate delay in processing
if (register == 5 || register == 9 || register == 11 || register == 23 || register == 29)
data &= 0x1F; // only 5 bits
else if (register == 8)
data &= 3; // only 2 bits
else if (register == 10)
register &= 0x7F; // only 7 bits
else if (register == 28)
register &= 0xF0; // only upper 4 bits
else if (register == 36)
register &= 0x0F; // only 4 bits
else if (register == 37)
register &= 0x3F; // only 6 bits
if (register < registers.Length)
{
registers[register] = data;
if (register == 31)
{
ushort dest = (ushort)(registers[18] + (registers[19] << 8));
if ((registers[24] & 0x80) == 0)
ram[dest++] = data;
else
{
ushort src = (ushort)(registers[32] + (registers[33] << 8));
ram[dest++] = ram[src++];
registers[32] = (byte)src;
registers[33] = (byte)(src >> 8);
}
registers[18] = (byte)dest;
registers[19] = (byte)(dest >> 8);
}
else if (register == 30)
{
ushort dest = (ushort)(registers[18] + (registers[19] << 8));
if ((registers[24] & 0x80) == 0)
{
for (int i = 0; i < value; ++i)
ram[dest++] = registers[31];
}
else
{
ushort src = (ushort)(registers[32] + (registers[33] << 8));
for (int i = 0; i < value; ++i)
ram[dest++] = ram[src++];
registers[32] = (byte)src;
registers[33] = (byte)(src >> 8);
}
registers[18] = (byte)dest;
registers[19] = (byte)(dest >> 8);
}
}
}
}
}
}
}