From 2b92c3de290832bcd5f62d8082044180ff6af6b8 Mon Sep 17 00:00:00 2001 From: vincentpcng <129542523+vincentpcng@users.noreply.github.com> Date: Wed, 11 Dec 2024 19:38:08 -0800 Subject: [PATCH] Platform DCS-7060DX5-32 MMU rollback to avoid dependancy on Broadcom (#21035) Why I did it This commit is to avoid Broadcom driver dependency on the MMU config Work item tracking Microsoft ADO (number only): How I did it We upload the basic version of the Broadcom configure with limited configuration. How to verify it We verified the change internally in Arista --- .../Arista-7060DX5-32/BALANCED | 1 - .../Arista-7060DX5-32/buffers.json.j2 | 2 - .../Arista-7060DX5-32/buffers_defaults_t0.j2 | 1 - .../Arista-7060DX5-32/buffers_defaults_t1.j2 | 1 - .../Arista-7060DX5-32/pg_profile_lookup.ini | 1 - .../Arista-7060DX5-32/qos.json.j2 | 1 - .../th4-a7060dx5-32.config.bcm | 995 ------------------ 7 files changed, 1002 deletions(-) delete mode 120000 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED delete mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 delete mode 120000 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 delete mode 120000 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 delete mode 120000 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini delete mode 100644 device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED deleted file mode 120000 index 2c9506a909fb..000000000000 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/BALANCED +++ /dev/null @@ -1 +0,0 @@ -../../../common/profiles/th4/gen/BALANCED \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 deleted file mode 100644 index 0b1cb2c541b6..000000000000 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers.json.j2 +++ /dev/null @@ -1,2 +0,0 @@ -{%- set default_topo = 't1' %} -{%- include 'buffers_config.j2' %} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 deleted file mode 120000 index 9524e6a476ac..000000000000 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t0.j2 +++ /dev/null @@ -1 +0,0 @@ -BALANCED/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 deleted file mode 120000 index c25cc95d6d57..000000000000 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/buffers_defaults_t1.j2 +++ /dev/null @@ -1 +0,0 @@ -BALANCED/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini deleted file mode 120000 index 297cddb2d223..000000000000 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/pg_profile_lookup.ini +++ /dev/null @@ -1 +0,0 @@ -BALANCED/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 deleted file mode 100644 index 3e548325ea30..000000000000 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/qos.json.j2 +++ /dev/null @@ -1 +0,0 @@ -{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm index f4f77baf443a..0c7dd34d35b8 100644 --- a/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm +++ b/device/arista/x86_64-arista_7060dx5_32/Arista-7060DX5-32/th4-a7060dx5-32.config.bcm @@ -647,998 +647,3 @@ device: FP_CONFIG: FP_ING_OPERMODE: GLOBAL_PIPE_AWARE ... ---- -device: - 0: - TM_THD_CONFIG: - SKIP_BUFFER_RESERVATION: 1 - THRESHOLD_MODE: LOSSY_AND_LOSSLESS - - TM_SCHEDULER_CONFIG: - NUM_MC_Q: NUM_MC_Q_2 -... ---- -device: - 0: - TM_ING_THD_PORT_PRI_GRP: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - TM_PRI_GRP_ID: [[0,7]] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 0 - HEADROOM_LIMIT_CELLS: 0 - - TM_ING_THD_PORT_SERVICE_POOL: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMIT_CELLS: 0 - - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: 0 - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_THD_UC_Q: - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_UC_Q_ID: [[0,11]] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 0 - - TM_THD_MC_Q: - ? - PORT_ID: 0 - TM_MC_Q_ID: [[0,47]] - : - MIN_GUARANTEE_CELLS: 0 - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_MC_Q_ID: [[0,5]] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 0 - - TM_THD_Q_GRP: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - : - UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 - MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 -... ---- -device: - 0: - TM_ING_PORT: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - : - PAUSE: 0 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[0,67], [204,219], [221,253],[255,271]] - TM_PRI_GRP_ID: [[0,7]] - : - PFC: 0 - LOSSLESS: 0 - ING_MIN_MODE: USE_PRI_GRP_MIN - - TM_PORT_UC_Q_TO_SERVICE_POOL: - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_UC_Q_ID: [[0,11]] - : - USE_QGROUP_MIN: 0 - - TM_PORT_MC_Q_TO_SERVICE_POOL: - ? - PORT_ID: 0 - TM_MC_Q_ID: [[0,47]] - : - USE_QGROUP_MIN: 0 - ? - PORT_ID: [[1,67], [204,219], [221,253],[255,271]] - TM_MC_Q_ID: [[0,5]] - : - USE_QGROUP_MIN: 0 -... ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: 0 - TM_HEADROOM_POOL_ID: [[0,3]] - : - LIMIT_CELLS: 0 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_ING_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_OFFSET_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: [[0,3]] - : - SHARED_LIMIT_CELLS: 0 - SHARED_RESUME_LIMIT_CELLS: 0 - COLOR_SPECIFIC_LIMITS: 0 - YELLOW_SHARED_LIMIT_CELLS: 0 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 - RED_SHARED_LIMIT_CELLS: 0 - RED_SHARED_RESUME_LIMIT_CELLS: 0 -... - -### Mapping ---- -device: - 0: - TM_ING_UC_ING_PRI_MAP: - ? - # Profile 1 - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 2, 5, 6, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 2 - TM_ING_UC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 5, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 2 - : - TM_PRI_GRP_ID: 2 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 6 - : - TM_PRI_GRP_ID: 6 - ? - TM_ING_UC_ING_PRI_MAP_ID: 2 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 3 - TM_ING_UC_ING_PRI_MAP_ID: 3 - ING_PRI: [[0,15]] - : - TM_PRI_GRP_ID: 7 - - TM_ING_NONUC_ING_PRI_MAP: - ? - # Profile 1 - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 2, 5, 6, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 2 - TM_ING_NONUC_ING_PRI_MAP_ID: 1 - ING_PRI: [0, 1, 5, [8,15]] - : - TM_PRI_GRP_ID: 0 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 2 - : - TM_PRI_GRP_ID: 2 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 3 - : - TM_PRI_GRP_ID: 3 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 4 - : - TM_PRI_GRP_ID: 4 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 6 - : - TM_PRI_GRP_ID: 6 - ? - TM_ING_NONUC_ING_PRI_MAP_ID: 2 - ING_PRI: 7 - : - TM_PRI_GRP_ID: 7 - ? - # Profile 3 - TM_ING_NONUC_ING_PRI_MAP_ID: 3 - ING_PRI: [[0,15]] - : - TM_PRI_GRP_ID: 7 - - TM_PRI_GRP_POOL_MAP: - ? - TM_PRI_GRP_POOL_MAP_ID: 1 - TM_PRI_GRP_ID: [[0,6]] - : - TM_ING_SERVICE_POOL_ID: 0 - TM_HEADROOM_POOL_ID: 0 - ? - TM_PRI_GRP_POOL_MAP_ID: 1 - TM_PRI_GRP_ID: 7 - : - TM_ING_SERVICE_POOL_ID: 1 - TM_HEADROOM_POOL_ID: 1 - - TM_ING_PORT: - ? - PORT_ID: [0] - : - ING_PRI_MAP_ID: 3 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [[1,4], [204,207]] - : - ING_PRI_MAP_ID: 1 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - ING_PRI_MAP_ID: 2 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [50] - : - ING_PRI_MAP_ID: 1 - PRI_GRP_MAP_ID: 1 - ? - PORT_ID: [33, 67, 237, 271] - : - ING_PRI_MAP_ID: 1 - PRI_GRP_MAP_ID: 1 - - TM_PORT_UC_Q_TO_SERVICE_POOL: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: [[0,6], [8,9]] - : - TM_EGR_SERVICE_POOL_ID: 0 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: 7 - : - TM_EGR_SERVICE_POOL_ID: 1 - - TM_PORT_MC_Q_TO_SERVICE_POOL: - ? - PORT_ID: [0] - TM_MC_Q_ID: [[0,47]] - : - TM_EGR_SERVICE_POOL_ID: 1 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_MC_Q_ID: [[0,1]] - : - TM_EGR_SERVICE_POOL_ID: 0 -... - -### Scheduler ---- -device: - 0: - TM_SCHEDULER_PROFILE: - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [0, 1] - : - NUM_UC_Q: 1 - NUM_MC_Q: 1 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [2, 5, 6, 7, 8, 9] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [3, 4] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 1 - ? - TM_SCHEDULER_PROFILE_ID: 1 - TM_SCHEDULER_NODE_ID: [10, 11] - : - NUM_UC_Q: 0 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 - - TM_SCHEDULER_PROFILE: - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [0, 1] - : - NUM_UC_Q: 1 - NUM_MC_Q: 1 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [5, 7, 8, 9] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [2, 3, 4, 6] - : - NUM_UC_Q: 1 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 1 - ? - TM_SCHEDULER_PROFILE_ID: 2 - TM_SCHEDULER_NODE_ID: [10, 11] - : - NUM_UC_Q: 0 - NUM_MC_Q: 0 - FLOW_CTRL_UC: 0 -... ---- -device: - 0: - TM_SCHEDULER_PORT_PROFILE: - ? - PORT_ID: [[1,4], [204,207]] - : - TM_SCHEDULER_PROFILE_ID: 1 - WRR: 0 - TM_SCHEDULER_PORT_PROFILE: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - TM_SCHEDULER_PROFILE_ID: 2 - WRR: 0 -... - -### Pools -### hard code service pool size for TH4 per architecture requirement. ---- -device: - 0: - TM_ING_THD_HEADROOM_POOL: - ? - BUFFER_POOL: 0 - TM_HEADROOM_POOL_ID: 0 - : - LIMIT_CELLS: 45696 - - TM_ING_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_ING_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 173222 - SHARED_RESUME_OFFSET_CELLS: 74 - COLOR_SPECIFIC_LIMITS: 0 - ? - BUFFER_POOL: 0 - TM_ING_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_OFFSET_CELLS: 74 - COLOR_SPECIFIC_LIMITS: 0 - - TM_EGR_THD_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 173222 - SHARED_RESUME_LIMIT_CELLS: 21643 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 16240 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 16230 - RED_SHARED_LIMIT_CELLS: 13533 - RED_SHARED_RESUME_LIMIT_CELLS: 13523 - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_LIMIT_CELLS: 73 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 57 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 - RED_SHARED_LIMIT_CELLS: 48 - RED_SHARED_RESUME_LIMIT_CELLS: 46 - - TM_THD_MC_EGR_SERVICE_POOL: - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 15779 - SHARED_RESUME_LIMIT_CELLS: 1962 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 1480 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 1470 - RED_SHARED_LIMIT_CELLS: 1233 - RED_SHARED_RESUME_LIMIT_CELLS: 1223 - ? - BUFFER_POOL: 0 - TM_EGR_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_LIMIT_CELLS: 73 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 57 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 55 - RED_SHARED_LIMIT_CELLS: 46 - RED_SHARED_RESUME_LIMIT_CELLS: 46 -... - -### Thresholds -###################################### ---- -device: - 0: - TM_ING_THD_PORT_PRI_GRP: - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_PRI_GRP_ID: [0, 1, 5, 7] - : - SHARED_LIMIT_CELLS_STATIC: 227317 - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 0 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - HEADROOM_LIMIT_CELLS: 0 - ? - PORT_ID: [[1,4], [204,207]] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 18 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 18 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - HEADROOM_LIMIT_CELLS: 2874 - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 18 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 18 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - HEADROOM_LIMIT_CELLS: 675 - ? - PORT_ID: [50] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - ? - PORT_ID: [33, 67, 237, 271] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - ? - PORT_ID: [0] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - RESUME_OFFSET_CELLS: 0 - RESUME_FLOOR_CELLS: 0 - HEADROOM_LIMIT_AUTO: 0 - - TM_ING_THD_PORT_SERVICE_POOL: - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_ING_SERVICE_POOL_ID: [0, 1] - : - MIN_GUARANTEE_CELLS: 0 - SHARED_LIMIT_CELLS: 227317 - RESUME_LIMIT_CELLS: 227317 - - TM_THD_UC_Q: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: [0, 1, 5, 7, 8, 9] - : - SHARED_LIMITS: 1 - COLOR_SPECIFIC_LIMITS: 1 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - MIN_GUARANTEE_CELLS: 7 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1 - RESUME_OFFSET_CELLS: 2 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_UC_Q_ID: [2, 3, 4, 6] - : - SHARED_LIMITS: 0 - COLOR_SPECIFIC_LIMITS: 0 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 - MIN_GUARANTEE_CELLS: 0 - DYNAMIC_SHARED_LIMITS: 0 - SHARED_LIMIT_CELLS_STATIC: 227317 - RESUME_OFFSET_CELLS: 2 - - TM_THD_MC_Q: - ? - PORT_ID: [0] - TM_MC_Q_ID: [0, 1, 2, 3] - : - MIN_GUARANTEE_CELLS: 37 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_2 - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_CELLS: 2 - ? - PORT_ID: [0] - TM_MC_Q_ID: [4, 5, 6, 7, 8, 9] - : - MIN_GUARANTEE_CELLS: 7 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1_4 - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_CELLS: 2 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_MC_Q_ID: [0, 1] - : - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 1 - SHARED_LIMIT_DYNAMIC: ALPHA_1 - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_CELLS: 2 - - TM_EGR_THD_UC_PORT_SERVICE_POOL: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 0 - : - SHARED_LIMIT_CELLS: 173222 - SHARED_RESUME_LIMIT_CELLS: 21651 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 16239 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 16237 - RED_SHARED_LIMIT_CELLS: 13532 - RED_SHARED_RESUME_LIMIT_CELLS: 13530 - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 1 - : - SHARED_LIMIT_CELLS: 605 - SHARED_RESUME_LIMIT_CELLS: 73 - COLOR_SPECIFIC_LIMITS: 1 - YELLOW_SHARED_LIMIT_CELLS: 56 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 - RED_SHARED_LIMIT_CELLS: 47 - RED_SHARED_RESUME_LIMIT_CELLS: 45 - - TM_EGR_THD_MC_PORT_SERVICE_POOL: - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 0 - : - COLOR_SPECIFIC_LIMITS: 1 - RED_SHARED_LIMIT_CELLS: 1232 - YELLOW_SHARED_LIMIT_CELLS: 1479 - SHARED_LIMIT_CELLS: 15779 - RED_SHARED_RESUME_LIMIT_CELLS: 1230 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 1477 - SHARED_RESUME_LIMIT_CELLS: 1970 - ? - PORT_ID: [[0,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - TM_EGR_SERVICE_POOL_ID: 1 - : - COLOR_SPECIFIC_LIMITS: 1 - RED_SHARED_LIMIT_CELLS: 47 - YELLOW_SHARED_LIMIT_CELLS: 56 - SHARED_LIMIT_CELLS: 605 - RED_SHARED_RESUME_LIMIT_CELLS: 45 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 54 - SHARED_RESUME_LIMIT_CELLS: 73 - - -... -### THDR Limits ---- -device: - 0: - TM_THD_REPL_SERVICE_POOL: - COLOR_SPECIFIC_LIMITS: 1 - SHARED_LIMIT_CELLS: 2961 - SHARED_RESUME_LIMIT_CELLS: 2947 - YELLOW_SHARED_LIMIT_CELLS: 2220 - YELLOW_SHARED_RESUME_LIMIT_CELLS: 2206 - RED_SHARED_LIMIT_CELLS: 1850 - RED_SHARED_RESUME_LIMIT_CELLS: 1836 - - TM_THD_REPL_Q: - ? - REPL_Q_NUM: [0,8] - : - COLOR_SPECIFIC_LIMITS: 1 - COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 - SHARED_LIMITS: 1 - DYNAMIC_SHARED_LIMITS: 1 - RESUME_OFFSET_CELLS: 14 - SHARED_LIMIT_DYNAMIC: ALPHA_1 - YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 - RED_LIMIT_DYNAMIC: PERCENTAGE_675 - RESUME_OFFSET_YELLOW_CELLS: 14 - RESUME_OFFSET_RED_CELLS: 14 - - TM_THD_REPL_Q: - ? - REPL_Q_NUM: [0,5] - : - MIN_GUARANTEE_CELLS: 0 - ? - REPL_Q_NUM: [6,8] - : - MIN_GUARANTEE_CELLS: 37 - -... -### Mirror-on-drop ---- -device: - 0: - TM_MIRROR_ON_DROP_CONTROL: - RESERVED_LIMIT_CELLS: 2580 - - TM_MIRROR_ON_DROP_PROFILE: - ? - TM_MIRROR_ON_DROP_PROFILE_ID: 0 - : - PERCENTAGE_0_25: 65535 - PERCENTAGE_25_50: 65535 - PERCENTAGE_50_75: 65535 - PERCENTAGE_75_100: 65535 - - TM_MIRROR_ON_DROP_DESTINATION: - ? - TM_MIRROR_ON_DROP_DESTINATION_ID: 0 - : - TM_MC_Q_ID: 1 - PORT_ID: 1 -... - -### OBM ---- -device: - 0: - TM_OBM_PORT_PKT_PARSE: - ? - PORT_ID: [[1,4], [204,207]] - : - DSCP_MAP: 1 - HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET - DEFAULT_PKT_PRI: 0 - - TM_OBM_PORT_PKT_PARSE: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - DSCP_MAP: 1 - HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET - DEFAULT_PKT_PRI: 0 - - TM_OBM_PORT_PKT_PRI_TC_MAP: - ? - PORT_ID: [[1,4], [204,207]] - PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP - PKT_PRI: [3, 4] - : - TRAFFIC_CLASS: OBM_TC_LOSSLESS0 - - TM_OBM_PORT_PKT_PRI_TC_MAP: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - PKT_PRI_TYPE: PKT_PRI_TYPE_DSCP - PKT_PRI: [2, 3, 4, 6] - : - TRAFFIC_CLASS: OBM_TC_LOSSLESS0 - - TM_OBM_THD_PORT: - ? - PORT_ID: [[1,4], [204,207]] - : - THD_AUTO: 0 - LOSSY_LOW_MAX_BYTES: 37376 - LOSSLESS0_MAX_BYTES: 235264 - MAX_BYTES: 235264 - - TM_OBM_THD_PORT: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - THD_AUTO: 0 - LOSSY_LOW_MAX_BYTES: 37376 - LOSSLESS0_MAX_BYTES: 235264 - MAX_BYTES: 235264 - - TM_OBM_THD_PORT_FLOW_CTRL: - ? - PORT_ID: [[1,4], [204,207]] - : - THD_AUTO: 0 - LOSSLESS0_XOFF_BYTES: 5184 - LOSSLESS0_XON_BYTES: 4672 - XOFF_BYTES: 5184 - XON_BYTES: 4672 - - TM_OBM_THD_PORT_FLOW_CTRL: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - THD_AUTO: 0 - LOSSLESS0_XOFF_BYTES: 5184 - LOSSLESS0_XON_BYTES: 4672 - XOFF_BYTES: 5184 - XON_BYTES: 4672 - - TM_OBM_PORT_FLOW_CTRL: - ? - PORT_ID: [[1,4], [204,207]] - : - FLOW_CTRL: 1 - FLOW_CTRL_TYPE: PFC - LOSSLESS0_FLOW_CTRL: 1 - - TM_OBM_PORT_FLOW_CTRL: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - FLOW_CTRL: 1 - FLOW_CTRL_TYPE: PFC - LOSSLESS0_FLOW_CTRL: 1 -... - -### PFC ---- -device: - 0: - PC_MAC_CONTROL: - ? - PORT_ID: [[1,4], [17,20], [33,37], [50,54], 67, [204,207], [221,224], [237,241], [255,258], 271] - : - PAUSE_TX: 0 - PAUSE_RX: 0 - - TM_PFC_EGR: - ? - PORT_ID: [[1,4], [204,207]] - : - TM_PFC_PRI_PROFILE_ID: 1 - - TM_PFC_EGR: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - TM_PFC_PRI_PROFILE_ID: 2 -... ---- -device: - 0: - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1 - PFC_PRI: 3 - : - TM_PRI_GRP_ID: 3 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 1 - PFC_PRI: 4 - : - TM_PRI_GRP_ID: 4 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 2 - : - TM_PRI_GRP_ID: 2 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 3 - : - TM_PRI_GRP_ID: 3 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 4 - : - TM_PRI_GRP_ID: 4 - - TM_PFC_PRI_TO_PRI_GRP_MAP: - ? - TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 2 - PFC_PRI: 6 - : - TM_PRI_GRP_ID: 6 - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 1 - PFC_PRI: 3 - : - PFC: 1 - COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 1 - PFC_PRI: 4 - : - PFC: 1 - COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 2 - : - PFC: 1 - COS_LIST: [0, 0, 1, 0, 0, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 3 - : - PFC: 1 - COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 4 - : - PFC: 1 - COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0, 0, 0] - - TM_PFC_PRI_PROFILE: - ? - TM_PFC_PRI_PROFILE_ID: 2 - PFC_PRI: 6 - : - PFC: 1 - COS_LIST: [0, 0, 0, 0, 0, 0, 1, 0, 0, 0] - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[1,4], [204,207]] - TM_PRI_GRP_ID: [3, 4] - : - PFC: 1 - LOSSLESS: 1 - - TM_ING_PORT_PRI_GRP: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - TM_PRI_GRP_ID: [2, 3, 4, 6] - : - PFC: 1 - LOSSLESS: 1 - - PC_PFC: - ? - PORT_ID: [[1,4], [204,207]] - : - ENABLE_RX: 1 - ENABLE_TX: 1 - - PC_PFC: - ? - PORT_ID: [[17,20], [34,37], [51,54], [221,224], [238,241], [255,258]] - : - ENABLE_RX: 1 - ENABLE_TX: 1 -...