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llvm: Update baseline to dd42651295d0e1566b34104b007ad19865c57fcc
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github-actions[bot] committed Jan 20, 2025
1 parent 2b1a2b2 commit 297679c
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2 changes: 1 addition & 1 deletion llvm-project
Submodule llvm-project updated 98 files
+1 −1 .github/workflows/containers/github-action-ci-windows/Dockerfile
+2 −0 .github/workflows/premerge.yaml
+3 −3 clang-tools-extra/docs/clang-tidy/Contributing.rst
+1 −1 clang/docs/ClangTransformerTutorial.rst
+1 −1 clang/docs/LanguageExtensions.rst
+8 −3 clang/docs/ReleaseNotes.rst
+9 −0 clang/lib/AST/ByteCode/Compiler.cpp
+1 −1 clang/lib/AST/Decl.cpp
+20 −0 clang/test/AST/ByteCode/cxx17.cpp
+5 −2 flang/unittests/Optimizer/CMakeLists.txt
+1 −1 libcxx/docs/Status/Cxx20Papers.csv
+5 −0 libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/offset_range.pass.cpp
+5 −0 llvm/Maintainers.md
+1 −1 llvm/docs/DeveloperPolicy.rst
+1 −1 llvm/docs/GitHub.rst
+1 −1 llvm/docs/MyFirstTypoFix.rst
+1 −1 llvm/include/llvm/CodeGen/CallingConvLower.h
+1 −1 llvm/include/llvm/CodeGen/LivePhysRegs.h
+3 −2 llvm/include/llvm/CodeGen/MachineOperand.h
+2 −2 llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+2 −3 llvm/include/llvm/CodeGen/Register.h
+1 −1 llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+1 −1 llvm/include/llvm/CodeGen/VirtRegMap.h
+4 −0 llvm/include/llvm/MC/MCRegister.h
+3 −4 llvm/include/llvm/MC/MCRegisterInfo.h
+1 −1 llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
+2 −2 llvm/lib/CodeGen/CallingConvLower.cpp
+4 −4 llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
+2 −2 llvm/lib/CodeGen/EarlyIfConversion.cpp
+1 −1 llvm/lib/CodeGen/ExecutionDomainFix.cpp
+6 −4 llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
+1 −1 llvm/lib/CodeGen/InterferenceCache.cpp
+3 −3 llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
+2 −2 llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
+2 −1 llvm/lib/CodeGen/LiveRegMatrix.cpp
+1 −1 llvm/lib/CodeGen/MachineBasicBlock.cpp
+1 −1 llvm/lib/CodeGen/MachineOperand.cpp
+1 −1 llvm/lib/CodeGen/MachinePipeliner.cpp
+3 −3 llvm/lib/CodeGen/MachineRegisterInfo.cpp
+6 −6 llvm/lib/CodeGen/PrologEpilogInserter.cpp
+1 −1 llvm/lib/CodeGen/RDFLiveness.cpp
+2 −2 llvm/lib/CodeGen/RegAllocGreedy.cpp
+4 −4 llvm/lib/CodeGen/RegUsageInfoCollector.cpp
+2 −1 llvm/lib/CodeGen/RegisterClassInfo.cpp
+1 −1 llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+5 −8 llvm/lib/CodeGen/TargetRegisterInfo.cpp
+4 −4 llvm/lib/CodeGen/VirtRegMap.cpp
+1 −0 llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt
+8 −12 llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.cpp
+6 −0 llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
+2 −1 llvm/lib/MC/ELFObjectWriter.cpp
+3 −2 llvm/lib/Support/VirtualFileSystem.cpp
+1 −3 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+1 −1 llvm/lib/Target/AArch64/AArch64FrameLowering.h
+1 −1 llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+1 −1 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+8 −1 llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+1 −1 llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
+1 −1 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+1 −1 llvm/lib/Target/X86/X86ArgumentStackSlotRebase.cpp
+12 −0 llvm/lib/Target/X86/X86ISelLowering.cpp
+1 −2 llvm/lib/Target/X86/X86RegisterInfo.cpp
+2 −2 llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
+21 −193 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+6 −0 llvm/lib/Transforms/Vectorize/VPlan.h
+126 −0 llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7 −0 llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+9 −3 llvm/lib/Transforms/Vectorize/VPlanUtils.h
+46 −0 llvm/test/CodeGen/AArch64/aarch64-large-stack-spbump.mir
+4,636 −0 llvm/test/CodeGen/AArch64/fsh.ll
+9 −2 llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
+4 −4 llvm/test/CodeGen/AMDGPU/wqm.ll
+9 −31 llvm/test/CodeGen/X86/combine-ptest.ll
+0 −2 llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
+0 −14 llvm/test/Transforms/LoopVectorize/X86/multi-exit-cost.ll
+120 −0 llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
+4 −1 llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
+2 −4 llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
+205 −0 llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-outside-iv-users.ll
+3 −3 llvm/utils/TableGen/AsmMatcherEmitter.cpp
+44 −34 mlir/include/mlir/Dialect/IRDL/IR/IRDLOps.td
+171 −33 mlir/lib/Dialect/IRDL/IR/IRDL.cpp
+16 −0 mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
+2 −2 mlir/test/CAPI/irdl.c
+10 −10 mlir/test/Dialect/IRDL/cmath.irdl.mlir
+2 −2 mlir/test/Dialect/IRDL/cpred.irdl.mlir
+6 −6 mlir/test/Dialect/IRDL/cyclic-types.irdl.mlir
+133 −5 mlir/test/Dialect/IRDL/invalid.irdl.mlir
+31 −1 mlir/test/Dialect/IRDL/regions-ops.irdl.mlir
+4 −4 mlir/test/Dialect/IRDL/test-type.irdl.mlir
+28 −28 mlir/test/Dialect/IRDL/testd.irdl.mlir
+6 −6 mlir/test/Dialect/IRDL/variadics-error.irdl.mlir
+16 −16 mlir/test/Dialect/IRDL/variadics.irdl.mlir
+71 −0 mlir/test/Dialect/SCF/value-bounds-op-interface-impl.mlir
+1 −1 mlir/test/Dialect/Transform/irdl.mlir
+5 −5 mlir/test/tblgen-to-irdl/CMathDialect.td
+28 −7 mlir/test/tblgen-to-irdl/TestDialect.td
+41 −4 mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp

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