diff --git a/compiler/codegen/OMRCodeGenerator.hpp b/compiler/codegen/OMRCodeGenerator.hpp
index c788b610466..755538f3de5 100644
--- a/compiler/codegen/OMRCodeGenerator.hpp
+++ b/compiler/codegen/OMRCodeGenerator.hpp
@@ -1685,6 +1685,9 @@ class OMR_EXTENSIBLE CodeGenerator
    bool getSupportsArrayTranslateTROT() {return _flags4.testAny(SupportsArrayTranslateTROT);}
    void setSupportsArrayTranslateTROT() {_flags4.set(SupportsArrayTranslateTROT);}
 
+   bool getSupportsEncodeUtf16LittleWithSurrogateTest() { return false; }
+   bool getSupportsEncodeUtf16BigWithSurrogateTest() { return false; }
+
    bool getSupportsArraySet() {return _flags1.testAny(SupportsArraySet);}
    void setSupportsArraySet() {_flags1.set(SupportsArraySet);}
 
diff --git a/compiler/control/OMROptions.hpp b/compiler/control/OMROptions.hpp
index d8b12f53162..388c8a2892f 100644
--- a/compiler/control/OMROptions.hpp
+++ b/compiler/control/OMROptions.hpp
@@ -907,7 +907,7 @@ enum TR_CompilationOptions
    TR_DisableInvariantCodeMotion                      = 0x00008000 + 28,
    TR_EnableSelfTuningScratchMemoryUsageBeforeCompile = 0x00010000 + 28,
    TR_EnableSelfTuningScratchMemoryUsageInTrMemory    = 0x00020000 + 28,
-   // Available                                       = 0x00040000 + 28,
+   TR_DisableUTF16BEEncoder                           = 0x00040000 + 28,
    // Available                                       = 0x00080000 + 28,
    TR_DisableDAATrailingZero                          = 0x00100000 + 28,
    TR_DisableDynamicRIBufferProcessing                = 0x00200000 + 28,
diff --git a/compiler/runtime/Helpers.inc b/compiler/runtime/Helpers.inc
index 6e4ffdb899c..fae1b17c348 100644
--- a/compiler/runtime/Helpers.inc
+++ b/compiler/runtime/Helpers.inc
@@ -202,7 +202,9 @@ SETVAL(TR_IA32JitMethodMonitorExitReserved,TR_LXRH+28)
 SETVAL(TR_IA32arrayTranslateTRTO, TR_LXRH+29)
 SETVAL(TR_IA32arrayTranslateTROTNoBreak, TR_LXRH+30)
 SETVAL(TR_IA32arrayTranslateTROT, TR_LXRH+31)
-SETVAL(TR_IA32numRuntimeHelpers,TR_LXRH+32)
+SETVAL(TR_IA32encodeUTF16Big,TR_LXRH+32)
+SETVAL(TR_IA32encodeUTF16Little,TR_LXRH+33)
+SETVAL(TR_IA32numRuntimeHelpers,TR_LXRH+34)
 
 SETVAL(TR_AMD64floatRemainder,TR_LXRH+0)
 SETVAL(TR_AMD64doubleRemainder,TR_LXRH+1)
@@ -234,10 +236,12 @@ SETVAL(TR_AMD64clockGetTime,TR_LXRH+26)
 SETVAL(TR_AMD64arrayTranslateTRTO, TR_LXRH+27)
 SETVAL(TR_AMD64arrayTranslateTROTNoBreak, TR_LXRH+28)
 SETVAL(TR_AMD64arrayTranslateTROT, TR_LXRH+29)
-SETVAL(TR_AMD64doAESENCEncrypt,TR_LXRH+30)
-SETVAL(TR_AMD64doAESENCDecrypt,TR_LXRH+31)
-SETVAL(TR_AMD64java_util_zip_CRC32C_updateBytes,TR_LXRH+32)
-SETVAL(TR_AMD64numRuntimeHelpers,TR_LXRH+33)
+SETVAL(TR_AMD64encodeUTF16Big,TR_LXRH+30)
+SETVAL(TR_AMD64encodeUTF16Little,TR_LXRH+31)
+SETVAL(TR_AMD64doAESENCEncrypt,TR_LXRH+32)
+SETVAL(TR_AMD64doAESENCDecrypt,TR_LXRH+33)
+SETVAL(TR_AMD64java_util_zip_CRC32C_updateBytes,TR_LXRH+34)
+SETVAL(TR_AMD64numRuntimeHelpers,TR_LXRH+35)
 
 SETVAL(TR_PPClongDivide,TR_FSRH)
 SETVAL(TR_PPCnativeStaticHelper,TR_FSRH+1)
@@ -320,17 +324,19 @@ SETVAL(TR_PPCquadWordArrayCopy_vsx, TR_FSRH+77)
 SETVAL(TR_PPCforwardQuadWordArrayCopy_vsx, TR_FSRH+78)
 SETVAL(TR_PPCpostP10ForwardCopy, TR_FSRH+79)
 SETVAL(TR_PPCpostP10GenericCopy, TR_FSRH+80)
-SETVAL(TR_PPCP256Multiply, TR_FSRH+81)
-SETVAL(TR_PPCP256Mod, TR_FSRH+82)
-SETVAL(TR_PPCP256addNoMod, TR_FSRH+83)
-SETVAL(TR_PPCP256subNoMod, TR_FSRH+84)
-SETVAL(TR_PPCAESCBCDecrypt, TR_FSRH+85)
-SETVAL(TR_PPCAESCBCEncrypt, TR_FSRH+86)
-SETVAL(TR_PPCinterpreterUnresolvedConstantDynamicGlue, TR_FSRH+87)
-SETVAL(TR_PPCcrc32_vpmsum, TR_FSRH+88)
-SETVAL(TR_PPCcrc32_no_vpmsum, TR_FSRH+89)
-SETVAL(TR_PPCcrc32_oneByte, TR_FSRH+90)
-SETVAL(TR_PPCnumRuntimeHelpers,TR_FSRH+91)
+SETVAL(TR_PPCencodeUTF16Big, TR_FSRH+81)
+SETVAL(TR_PPCencodeUTF16Little, TR_FSRH+82)
+SETVAL(TR_PPCP256Multiply, TR_FSRH+83)
+SETVAL(TR_PPCP256Mod, TR_FSRH+84)
+SETVAL(TR_PPCP256addNoMod, TR_FSRH+85)
+SETVAL(TR_PPCP256subNoMod, TR_FSRH+86)
+SETVAL(TR_PPCAESCBCDecrypt, TR_FSRH+87)
+SETVAL(TR_PPCAESCBCEncrypt, TR_FSRH+88)
+SETVAL(TR_PPCinterpreterUnresolvedConstantDynamicGlue, TR_FSRH+89)
+SETVAL(TR_PPCcrc32_vpmsum, TR_FSRH+90)
+SETVAL(TR_PPCcrc32_no_vpmsum, TR_FSRH+91)
+SETVAL(TR_PPCcrc32_oneByte, TR_FSRH+92)
+SETVAL(TR_PPCnumRuntimeHelpers,TR_FSRH+93)
 
 SETVAL(TR_ARMdouble2Long,TR_FSRH)
 SETVAL(TR_ARMdoubleRemainder,TR_FSRH+1)