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.secure_xml
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.secure_xml
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<raConfiguration version="8">
<generalSettings>
<option key="#Board#" value="board.ra8d1ek"/>
<option key="CPU" value="RA8D1"/>
<option key="Core" value="CM85"/>
<option key="#TargetName#" value="R7FA8D1BHECBD"/>
<option key="#TargetARCHITECTURE#" value="cortex-m85"/>
<option key="#DeviceCommand#" value="R7FA8D1BH"/>
<option key="#RTOS#" value="_none"/>
<option key="#pinconfiguration#" value="R7FA8D1BH2CBD.pincfg"/>
<option key="#FSPVersion#" value="5.1.0"/>
<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra8d1_ek##"/>
<option key="#SELECTED_TOOLCHAIN#" value="gcc-arm-embedded"/>
<option key="#ToolchainVersion#" value="10.3.1.20210824"/>
</generalSettings>
<raBspConfiguration/>
<raClockConfiguration>
<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
<node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
<node id="board.clock.pll.mul" option="board.clock.pll.mul.48_00"/>
<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
<node id="board.clock.pll1p.div" option="board.clock.pll1p.div.2"/>
<node id="board.clock.pll1p.display" option="board.clock.pll1p.display.value"/>
<node id="board.clock.pll1q.div" option="board.clock.pll1q.div.2"/>
<node id="board.clock.pll1q.display" option="board.clock.pll1q.display.value"/>
<node id="board.clock.pll1r.div" option="board.clock.pll1r.div.2"/>
<node id="board.clock.pll1r.display" option="board.clock.pll1r.display.value"/>
<node id="board.clock.pll2.source" option="board.clock.pll2.source.xtal"/>
<node id="board.clock.pll2.div" option="board.clock.pll2.div.1"/>
<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.40_00"/>
<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
<node id="board.clock.pll2p.div" option="board.clock.pll2p.div.2"/>
<node id="board.clock.pll2p.display" option="board.clock.pll2p.display.value"/>
<node id="board.clock.pll2q.div" option="board.clock.pll2q.div.2"/>
<node id="board.clock.pll2q.display" option="board.clock.pll2q.display.value"/>
<node id="board.clock.pll2r.div" option="board.clock.pll2r.div.2"/>
<node id="board.clock.pll2r.display" option="board.clock.pll2r.display.value"/>
<node id="board.clock.clock.source" option="board.clock.clock.source.pll1p"/>
<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
<node id="board.clock.sciclk.source" option="board.clock.sciclk.source.pll1q"/>
<node id="board.clock.spiclk.source" option="board.clock.spiclk.source.disabled"/>
<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
<node id="board.clock.lcdclk.source" option="board.clock.lcdclk.source.disabled"/>
<node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
<node id="board.clock.uck.source" option="board.clock.uck.source.disabled"/>
<node id="board.clock.u60ck.source" option="board.clock.u60ck.source.disabled"/>
<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.pll2p"/>
<node id="board.clock.cpuclk.div" option="board.clock.cpuclk.div.1"/>
<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
<node id="board.clock.pclka.div" option="board.clock.pclka.div.4"/>
<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.8"/>
<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.8"/>
<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.4"/>
<node id="board.clock.pclke.div" option="board.clock.pclke.div.2"/>
<node id="board.clock.sdclkout.enable" option="board.clock.sdclkout.enable.enabled"/>
<node id="board.clock.bclk.div" option="board.clock.bclk.div.4"/>
<node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
<node id="board.clock.fclk.div" option="board.clock.fclk.div.8"/>
<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
<node id="board.clock.sciclk.div" option="board.clock.sciclk.div.4"/>
<node id="board.clock.spiclk.div" option="board.clock.spiclk.div.4"/>
<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.8"/>
<node id="board.clock.lcdclk.div" option="board.clock.lcdclk.div.2"/>
<node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.3"/>
<node id="board.clock.uck.div" option="board.clock.uck.div.5"/>
<node id="board.clock.u60ck.div" option="board.clock.u60ck.div.5"/>
<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.4"/>
<node id="board.clock.cpuclk.display" option="board.clock.cpuclk.display.value"/>
<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
<node id="board.clock.pclke.display" option="board.clock.pclke.display.value"/>
<node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
<node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
<node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
<node id="board.clock.sciclk.display" option="board.clock.sciclk.display.value"/>
<node id="board.clock.spiclk.display" option="board.clock.spiclk.display.value"/>
<node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
<node id="board.clock.lcdclk.display" option="board.clock.lcdclk.display.value"/>
<node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
<node id="board.clock.uck.display" option="board.clock.uck.display.value"/>
<node id="board.clock.u60ck.display" option="board.clock.u60ck.display.value"/>
<node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
</raClockConfiguration>
<raPinConfiguration>
<pincfg active="true" name="" symbol="">
<configSetting altId="p107.output.low" configurationId="p107"/>
<configSetting altId="p414.output.low" configurationId="p414"/>
<configSetting altId="p600.output.low" configurationId="p600"/>
<configSetting altId="sci3.rxd3.p408" configurationId="sci3.rxd3" isUsedByDriver="true"/>
<configSetting altId="sci3.txd3.p409" configurationId="sci3.txd3" isUsedByDriver="true"/>
<configSetting altId="sdram.a1.p300" configurationId="sdram.a1"/>
<configSetting altId="sdram.a10.p309" configurationId="sdram.a10"/>
<configSetting altId="sdram.a11.p310" configurationId="sdram.a11"/>
<configSetting altId="sdram.a12.p311" configurationId="sdram.a12"/>
<configSetting altId="sdram.a13.p312" configurationId="sdram.a13"/>
<configSetting altId="sdram.a14.p905" configurationId="sdram.a14"/>
<configSetting altId="sdram.a15.p906" configurationId="sdram.a15"/>
<configSetting altId="sdram.a16.p907" configurationId="sdram.a16"/>
<configSetting altId="sdram.a2.p301" configurationId="sdram.a2"/>
<configSetting altId="sdram.a3.p302" configurationId="sdram.a3"/>
<configSetting altId="sdram.a4.p303" configurationId="sdram.a4"/>
<configSetting altId="sdram.a5.p304" configurationId="sdram.a5"/>
<configSetting altId="sdram.a6.p305" configurationId="sdram.a6"/>
<configSetting altId="sdram.a7.p306" configurationId="sdram.a7"/>
<configSetting altId="sdram.a8.p307" configurationId="sdram.a8"/>
<configSetting altId="sdram.a9.p308" configurationId="sdram.a9"/>
<configSetting altId="sdram.cas.p909" configurationId="sdram.cas"/>
<configSetting altId="sdram.cke.p113" configurationId="sdram.cke"/>
<configSetting altId="sdram.dq0.p601" configurationId="sdram.dq0"/>
<configSetting altId="sdram.dq1.p602" configurationId="sdram.dq1"/>
<configSetting altId="sdram.dq10.p611" configurationId="sdram.dq10"/>
<configSetting altId="sdram.dq11.p612" configurationId="sdram.dq11"/>
<configSetting altId="sdram.dq12.p613" configurationId="sdram.dq12"/>
<configSetting altId="sdram.dq13.p614" configurationId="sdram.dq13"/>
<configSetting altId="sdram.dq14.p615" configurationId="sdram.dq14"/>
<configSetting altId="sdram.dq15.pa08" configurationId="sdram.dq15"/>
<configSetting altId="sdram.dq16.pa12" configurationId="sdram.dq16"/>
<configSetting altId="sdram.dq2.p603" configurationId="sdram.dq2"/>
<configSetting altId="sdram.dq3.p604" configurationId="sdram.dq3"/>
<configSetting altId="sdram.dq4.p605" configurationId="sdram.dq4"/>
<configSetting altId="sdram.dq5.p606" configurationId="sdram.dq5"/>
<configSetting altId="sdram.dq6.p607" configurationId="sdram.dq6"/>
<configSetting altId="sdram.dq7.pa00" configurationId="sdram.dq7"/>
<configSetting altId="sdram.dq8.p609" configurationId="sdram.dq8"/>
<configSetting altId="sdram.dq9.p610" configurationId="sdram.dq9"/>
<configSetting altId="sdram.dqm0.pa10" configurationId="sdram.dqm0"/>
<configSetting altId="sdram.dqm1.p112" configurationId="sdram.dqm1"/>
<configSetting altId="sdram.ras.p908" configurationId="sdram.ras"/>
<configSetting altId="sdram.sdclk.pa09" configurationId="sdram.sdclk"/>
<configSetting altId="sdram.sdcs.p115" configurationId="sdram.sdcs"/>
<configSetting altId="sdram.we.p114" configurationId="sdram.we"/>
</pincfg>
</raPinConfiguration>
</raConfiguration>