diff --git a/Changelog.md b/Changelog.md index 4fcc82ad..b992f8f3 100644 --- a/Changelog.md +++ b/Changelog.md @@ -13,6 +13,14 @@ ## API Breaks ## Documentation --> +# 2.2.8 + +## Steps + +* `Checker.*Violations` + + * Changed `TIMING_VIOLATION_CORNERS` to a PDK variable + # 2.2.7 ## Steps diff --git a/openlane/config/pdk_compat.py b/openlane/config/pdk_compat.py index 0b0b5056..8f9d7681 100644 --- a/openlane/config/pdk_compat.py +++ b/openlane/config/pdk_compat.py @@ -228,6 +228,7 @@ def process_sta(key: str): ] new["DEFAULT_CORNER"] = f"nom_{default_pvt}" + new["TIMING_VIOLATION_CORNERS"] = ["*tt*"] new["LIB"] = lib_sta # x4. Constraints (sky130/gf180mcu) diff --git a/openlane/steps/checker.py b/openlane/steps/checker.py index b22a07dd..cab542e0 100644 --- a/openlane/steps/checker.py +++ b/openlane/steps/checker.py @@ -464,7 +464,7 @@ def __init_subclass__(cls, **kwargs): cls.base_corner_var_name, List[str], "A list of wildcards matching IPVT corners to use during checking for timing violations.", - default=["*tt*"], + pdk=True, deprecated_names=["TIMING_VIOLATIONS_CORNERS"], ), cls.get_corner_variable(), diff --git a/pyproject.toml b/pyproject.toml index 6be5fcd3..8b52b7f8 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -1,6 +1,6 @@ [tool.poetry] name = "openlane" -version = "2.2.7" +version = "2.2.8" description = "An infrastructure for implementing chip design flows" authors = ["Efabless Corporation and Contributors "] readme = "Readme.md" diff --git a/test/steps/excluded_step_tests b/test/steps/excluded_step_tests index e69de29b..1ea9c89e 100644 --- a/test/steps/excluded_step_tests +++ b/test/steps/excluded_step_tests @@ -0,0 +1,2 @@ +checker.holdviolations/004-success-hold-overwrite +checker.holdviolations/005-fail-different-corner