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Rename at least nets to be compatible with D1.4 recommendation (preferably also ports of the RTM_Connector sheet)
Change NOT USED to ASSEMBLY VARIANT, precisely highlight signals that are available in assembly variant
J31 / 8-10 / ab do not follow the recommendation, evaluate the possibility of keeping current RTM_FPGA_CFG as an assembly option while routing proper signals to these ports
Conider routing RTM_CLK and AMC_CLK to clock cross-bar to enable distribution of clocks from RTM to FMC (e.g. sourcing from uRFB).
The text was updated successfully, but these errors were encountered:
Up to my understanding, GPTs are just transceiver clocks. In Ultrascale architecture, it is possible to also output signal from the REFCLK pin pair. See #37.
Regarding compatibility - I think generally it would be better to stick to the standard. Even if it's not that widespread. Especially if it does not cost us that much (like f.e. in case of AFCv4).
J31 / 8-10 / ab
do not follow the recommendation, evaluate the possibility of keeping currentRTM_FPGA_CFG
as an assembly option while routing proper signals to these portsThe text was updated successfully, but these errors were encountered: