Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

SheepShaver x86_64 no jit: crash on boot #143

Closed
rakslice opened this issue Dec 2, 2020 · 0 comments · Fixed by #144
Closed

SheepShaver x86_64 no jit: crash on boot #143

rakslice opened this issue Dec 2, 2020 · 0 comments · Fixed by #144
Labels
bug Something isn't working

Comments

@rakslice
Copy link
Contributor

rakslice commented Dec 2, 2020

While talking about #142, I did some testing on master here, and found:

i686 jit true -> boots to desktop ok
i686 jit false -> boots to desktop ok
x86_64 jit true -> boots to desktop ok
x86_64 jit false -> segfault on the boot screen before the first extension icon appears, no PPC stack trace

The x86_64 test there was on Debian 9:

Linux debcdehax 4.9.0-14-amd64 #1 SMP Debian 4.9.240-2 (2020-10-30) x86_64 GNU/Linux

Built with its:

$ gcc --version
gcc (Debian 6.3.0-18+deb9u1) 6.3.0 20170516
Copyright (C) 2016 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

The backtrace:

Thread 1 "SheepShaver" received signal SIGSEGV, Segmentation fault.
powerpc_cpu::execute_loadstore<op_template_nop<unsigned int>, input_gpr_except<bit_field<11, 15>, 0>, gpr_operand<bit_field<16, 20> >, false, 4, false, false> (this=0x79bfbfc0, opcode=<optimized out>) at ../kpx_cpu/src/cpu/ppc/ppc-execute.cpp:576
576                     memory_helper<SZ, RX>::store(ea, operand_RS::get(this, opcode));
(gdb) bt
#0  powerpc_cpu::execute_loadstore<op_template_nop<unsigned int>, input_gpr_except<bit_field<11, 15>, 0>, gpr_operand<bit_field<16, 20> >, false, 4, false, false> (this=0x79bfbfc0, opcode=<optimized out>) at ../kpx_cpu/src/cpu/ppc/ppc-execute.cpp:576
#1  0x00000000780b6518 in nv_mem_fun1_t<void, powerpc_cpu, unsigned int>::operator() (x=<optimized out>, p=0x79bfbfc0, this=0x1038f960)
    at ../kpx_cpu/include/nvmemfun.hpp:108
#2  powerpc_cpu::execute (this=0x79bfbfc0, entry=entry@entry=1085341696) at ../kpx_cpu/src/cpu/ppc/ppc-cpu.cpp:697
#3  0x00000000780cd69e in emul_ppc (entry=entry@entry=1085341696) at ../kpx_cpu/sheepshaver_glue.cpp:938
#4  0x0000000078065707 in jump_to_rom (entry=1085341696) at main_unix.cpp:1271
#5  emul_func (arg=0x0) at main_unix.cpp:1291
#6  main (argc=<optimized out>, argv=<optimized out>) at main_unix.cpp:1112

Disassembling at the point where the segfault happens:

(gdb) disas /r $pc,+30
Dump of assembler code from 0x780c3688 to 0x780c36a6:
=> 0x00000000780c3688 <powerpc_cpu::execute_loadstore<op_template_nop<unsigned int>, input_gpr_except<bit_field<11, 15>, 0>, gpr_operand<bit_field<1                                
6, 20> >, false, 4, false, false>(unsigned int)+40>:    67 89 10        mov    %edx,(%eax)
   0x00000000780c368b <powerpc_cpu::execute_loadstore<op_template_nop<unsigned int>, input_gpr_except<bit_field<11, 15>, 0>, gpr_operand<bit_field<1                                
6, 20> >, false, 4, false, false>(unsigned int)+43>:    83 87 ac 03 00 00 04    addl   $0x4,0x3ac(%rdi)
   0x00000000780c3692 <powerpc_cpu::execute_loadstore<op_template_nop<unsigned int>, input_gpr_except<bit_field<11, 15>, 0>, gpr_operand<bit_field<1                                
6, 20> >, false, 4, false, false>(unsigned int)+50>:    c3      retq
   0x00000000780c3693:  90      nop

etc...

The problem is that sigsegv.cpp's ix86_skip_instruction() doesn't know what to make of the 0x67 x86_64 32-bit address mode prefix on that instruction there.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
bug Something isn't working
Projects
None yet
Development

Successfully merging a pull request may close this issue.

2 participants