diff --git a/tcl/target/altera_fpgasoc.cfg b/tcl/target/altera_fpgasoc.cfg
index 0fc8d6735..f0c84be47 100644
--- a/tcl/target/altera_fpgasoc.cfg
+++ b/tcl/target/altera_fpgasoc.cfg
@@ -7,16 +7,6 @@ if { [info exists CHIPNAME] } {
    set _CHIPNAME fpgasoc
 }
 
-# CoreSight Debug Access Port
-if { [info exists DAP_TAPID] } {
-        set _DAP_TAPID $DAP_TAPID
-} else {
-        set _DAP_TAPID 0x4ba00477
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
-        -expected-id $_DAP_TAPID
-
 # Subsidiary TAP: fpga
 if { [info exists FPGA_TAPID] } {
    set _FPGA_TAPID $FPGA_TAPID
@@ -25,7 +15,15 @@ if { [info exists FPGA_TAPID] } {
 }
 jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id $_FPGA_TAPID
 
+# CoreSight Debug Access Port
+if { [info exists DAP_TAPID] } {
+        set _DAP_TAPID $DAP_TAPID
+} else {
+        set _DAP_TAPID 0x4ba00477
+}
 
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
+        -expected-id $_DAP_TAPID
 #
 # Cortex-A9 target
 #