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Update ci
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LuigiGiuffrida98 committed Feb 18, 2024
1 parent e5e54a5 commit 285cc21
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1 change: 1 addition & 0 deletions .github/workflows/lint.yml
Original file line number Diff line number Diff line change
Expand Up @@ -56,4 +56,5 @@ jobs:
- name: Run Gen
run: |
make mcu-gen
git config --global --add safe.directory .
util/git-diff.py --error-msg "::error ::Found differences in SystemVerilog files generated with default configuration."
1 change: 1 addition & 0 deletions .github/workflows/simulate.yml
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Expand Up @@ -17,4 +17,5 @@ jobs:
conda activate core-v-mini-mcu
make clean-all
make mcu-gen MEMORY_BANKS=6
git config --global --add safe.directory .
python3 .github/workflows/sim-apps-job/test-apps.py

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